mirror of https://github.com/VLSIDA/OpenRAM.git
Only setup bitcell when running top-level OpenRAM
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@ -168,8 +168,6 @@ def init_openram(config_file, is_unit_test=True):
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from sram_factory import factory
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factory.reset()
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setup_bitcell()
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global OPTS
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global CHECKPOINT_OPTS
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@ -31,8 +31,12 @@ if len(args) != 1:
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# These depend on arguments, so don't load them until now.
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import debug
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# Parse config file and set up all the options
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g.init_openram(config_file=args[0], is_unit_test=False)
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# Ensure that the right bitcell exists or use the parameterised one
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g.setup_bitcell()
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# Only print banner here so it's not in unit tests
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g.print_banner()
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