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base
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fix merge conflicts
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2020-07-21 11:38:34 -07:00 |
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bitcells
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update to new metal stack names
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2020-07-31 05:27:19 -07:00 |
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characterizer
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update pex to work with dev changes
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2020-08-03 17:14:34 -07:00 |
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custom
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Change s8 to sky130
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2020-06-12 14:23:26 -07:00 |
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drc
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PEP8 cleanup
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2020-04-15 11:24:28 -07:00 |
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example_configs
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fix merge conflicts
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2020-07-21 11:38:34 -07:00 |
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modules
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fix merge conflicts
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2020-07-21 11:38:34 -07:00 |
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sram
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update pex to work with dev changes
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2020-08-03 17:14:34 -07:00 |
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verify
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fix pinv unit test
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2020-08-04 04:40:20 -07:00 |
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debug.py
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DRC/LVS and errors fixes.
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2020-06-30 07:16:05 -07:00 |
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globals.py
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Change s8 to sky130
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2020-06-12 14:23:26 -07:00 |
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openram.py
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Add words_per_row and others in config file.
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2020-07-13 12:37:56 -07:00 |
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options.py
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Add words_per_row and others in config file.
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2020-07-13 12:37:56 -07:00 |
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sram_factory.py
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Auto-generate port dependent cell names.
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2020-06-05 15:09:22 -07:00 |
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