15 Commits

Author	SHA1	Message	Date
mrg	eb40e2fdae	Added remaining gds/sp files for multiport in scn3m.	2019-05-21 09:23:25 -07:00
mrg	94e736881f	Multiport scn3me_subm has drc errors	2019-05-08 16:19:48 -07:00
mrg	aca46beb74	Add multiport bitcell spice	2019-05-08 16:17:19 -07:00
Matt Guthaus	c24879162a	Add back scn3me_subm tech files	2019-05-08 16:06:21 -07:00
Matt Guthaus	1a54fd0d1c	Remove scn3me_subm since it does not have 4 metal layers	2019-03-11 14:20:02 -07:00
Matt Guthaus	58e41a998f	Replace write driver with human readable sp file.	2018-11-27 11:49:08 -08:00
Matt Guthaus	f8fc7c12b3	Remove ms_flop and replace with dff. Might break setup_hold tests.	2018-09-13 11:02:28 -07:00
Matt Guthaus	368ab718d6	Change internal nets of 6T cell and write driver to have useful names for debugging.	2018-07-26 11:26:47 -07:00
Matt Guthaus	8d9b79dfd8	Add dff_buf for buffered flop arrays.	2018-03-04 16:13:10 -08:00
Matt Guthaus	2b839d34a3	Get rid of netgen error of undefined dlatch. Fix sp_read to find correct subckt name and pins.	2018-02-27 08:59:46 -08:00
Matt Guthaus	0804a1eceb	Add new DFF. Create DFF module. Start dff_array, not tested.	2018-02-14 15:16:28 -08:00
Matt Guthaus	fb90b8f5fe	Fix pin nameon sense amp spice. Fix NAND2 bug in hierarchical decoder.	2018-02-02 14:08:56 -08:00
Matt Guthaus	64546ad3dd	Change wen to en in spice lib files. Check lvs report insted of stdout with netgen.	2018-02-01 05:38:48 -08:00
Matt Guthaus	512448f9e8	Fix pin names to lower case. Fix write driver DRC errors and LVS error.	2018-01-31 17:37:16 -08:00
Matt Guthaus	f48272bde6	RELEASE 1.0	2016-11-08 09:57:35 -08:00