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OpenRAM
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4,797 Commits 4 Branches 63 Tags 78 MiB
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4797 Commits

Author SHA1 Message Date
samuelkcrow 910980328c clarify file location message for user 2022-03-02 12:47:05 -08:00
samuelkcrow d47b5612d5 characterizer and functional simulator working from command line 2022-03-02 12:18:54 -08:00
samuelkcrow a87b2e9446 Adding characterizer executable 2022-03-01 15:12:03 -08:00
mrg 4fac069c3c Skip hspice tests in docker 2022-03-01 14:44:04 -08:00
mrg f7e3672c89 Route horizontal supplies in write driver. 2022-03-01 14:37:51 -08:00
mrg 36bbf81624 Upgrade to magic 8.3.274 2022-03-01 14:37:30 -08:00
mrg 0908aa9e25 Add route vertical pins 2022-03-01 14:37:09 -08:00
mrg c12c006799 Add verbose option 2022-03-01 10:50:49 -08:00
mrg 38494458e3 Fix incorrect port 1w to 1r 2022-03-01 10:44:56 -08:00
mrg c223c1ad1c Run docker pull before running all tests for regression 2022-03-01 10:33:40 -08:00
mrg 184888b370 Skip 16 way test for now 2022-02-28 12:03:01 -08:00
mrg 27b4d2edb1 Add 16 way mux SRAM tests 2022-02-28 11:53:24 -08:00
mrg 54bd022efc Rework precharge route supply horizontally 2022-02-28 11:36:10 -08:00
mrg 8b4ef9b6c1 Upgrade to newest magic bug fixes 2022-02-28 09:11:09 -08:00
mrg 2520d9f590 Remove commented code in precharge array 2022-02-25 16:21:12 -08:00
mrg 9b90a44d4a Move output in freepdk45 sense amp down to prevent router conflict with supply 2022-02-25 16:20:47 -08:00
mrg 7b77378927 Add layer to horizontal pin help and use in precharge 2022-02-25 10:45:25 -08:00
mrg 12a6f1f2ee Add missing well tap 2022-02-25 10:44:40 -08:00
mrg 82c2bc329f Split bank and col mux tests. 2022-02-23 15:39:32 -08:00
mrg 5376b5bf20 Fix offset to center select signal between bitlines 2022-02-23 15:38:11 -08:00
mrg 6389d4ac82 Skip all func tests 2022-02-23 15:31:15 -08:00
mrg baf369fc96 Convert power to rails rather than pins in sense amp and precharge 2022-02-23 14:06:49 -08:00
mrg d4c14d7d19 Add horizontal pin helper function 2022-02-23 14:06:19 -08:00
mrg 5451a8d07a Don't make internal bus pins because magic will extract ports 2022-02-23 14:06:01 -08:00
mrg 6a295aeb38 Give feedback warnings in magic output 2022-02-23 13:05:03 -08:00
mrg 744dfc5fa7 Use older version of netgen 2022-02-23 13:04:53 -08:00
mrg 1742927751 Split port data tests into individual tests 2022-02-23 11:12:32 -08:00
Bugra Onal f971a83e68 Base-verilog 2022-02-23 10:34:48 -08:00
mrg b71230efd7 Update Magic and klayout versions in docker 2022-02-23 10:20:18 -08:00
mrg 16d54e4fcb Use vlsida repo for sram library 2022-02-23 10:19:46 -08:00
mrg 53e4c45038 Add tap to nand in pnand 2022-02-23 09:30:31 -08:00
mrg abac5a11ab Move power supply stack to design 2022-02-18 15:02:45 -08:00
mrg 80a4fc7e84 Add PYTHONPATH in setup file 2022-02-18 15:02:16 -08:00
mrg dd2effd28d Initial work on separate delay and func simulation 2022-02-16 10:54:39 -08:00
Bugra Onal 9c35add8d6 Base template additions 2022-02-16 10:53:18 -08:00
mrg 4590874ffa Merge branch 'dev' into sky130_fixes 2022-02-16 09:31:49 -08:00
Jesse Cirimelli-Low 1a0861539a Merge branch 'opc_fix' into dev 2022-02-15 14:38:20 -08:00
Jesse Cirimelli-Low a54eb90371 place decoder rail contacts at least m2 min spacing away 2022-02-15 14:37:07 -08:00
mrg bb24503f32 Add back klayout lvs model install. 2022-02-11 13:48:52 -08:00
mrg abbdaeb60f Merge branch 'lvs' into sky130_fixes 2022-02-11 13:24:27 -08:00
mrg a75d9fcc76 Fix failing test output of Makefile 2022-02-11 13:11:24 -08:00
mrg ab3acb99da Fix offsets of new nwell/pwell contacts. 2022-02-11 12:09:42 -08:00
mrg ed5765ea87 Merge branch 'klayout' into dev 2022-02-10 11:30:32 -08:00
mrg a35ab45843 Conditionally set TEST_TECHS. Skip pand4 for sky130. 2022-02-10 11:30:20 -08:00
mrg c471823626 Run individual tests on all technologies by default 2022-02-10 11:18:52 -08:00
Bugra Onal 6dc42a7bbb Verilog Template additions 2022-02-07 11:23:43 -08:00
Bugra Onal 4d38e7df3c Base verilog template init 2022-02-02 12:24:44 -08:00
mrg 51097b2c8b Revert rm in makefile 2022-02-02 09:38:27 -08:00
mrg 39f1199b63 Always delete result subdir to prevent bad and ok simultaneously 2022-02-02 09:36:19 -08:00
mrg 8fdd4966a7 Initial update of new psdm/nsdm implants 2022-02-02 09:36:05 -08:00