mirror of https://github.com/VLSIDA/OpenRAM.git
Move power supply stack to design
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@ -68,6 +68,14 @@ class design(hierarchy_design):
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self.setup_multiport_constants()
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try:
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from tech import power_grid
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self.supply_stack = power_grid
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except ImportError:
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# if no power_grid is specified by tech we use sensible defaults
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# Route a M3/M4 grid
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self.supply_stack = self.m3_stack
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def check_pins(self):
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for pin_name in self.pins:
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pins = self.get_pins(pin_name)
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@ -41,13 +41,6 @@ class sram_base(design, verilog, lef):
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if not self.num_spare_cols:
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self.num_spare_cols = 0
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try:
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from tech import power_grid
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self.supply_stack = power_grid
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except ImportError:
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# if no power_grid is specified by tech we use sensible defaults
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# Route a M3/M4 grid
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self.supply_stack = self.m3_stack
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def add_pins(self):
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""" Add pins for entire SRAM. """
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