OpenRAM

Author	SHA1	Message	Date
Matt Guthaus	7c254d540d	Change channel route api to use pin maps instead of an insteads for cases where there are multiple instances that have the pins (e.g. decoders)	2018-07-25 11:37:06 -07:00
Matt Guthaus	f7a2766c29	First draft of naive channel route in hierarchy_layout. It doesn't implement horizontal conflicts or try to minimize the number of channels.	2018-07-25 11:13:30 -07:00
Matt Guthaus	3f57853969	Use lower case names except for leaf cells and top level	2018-07-18 15:10:57 -07:00
Matt Guthaus	a9c0ec5549	Add LVS correspondence points to each bank type	2018-07-18 14:29:04 -07:00
Matt Guthaus	ffc866ef78	Single bank working except for channel routing error in 4-way case.	2018-07-17 14:40:04 -07:00
Matt Guthaus	7a69fc1bca	Add col addr routing and data routing	2018-07-17 14:24:44 -07:00
Matt Guthaus	ac22b1145f	Convert bank to use create_bus routines. Modify control logic to have correct offset in SRAM.	2018-07-16 14:13:41 -07:00
Matt Guthaus	f3ae29fe0b	Getting single bank to work reliably. Removed tri_gate from bank for now. Will add it in multibank arrays only. Not needed for separate DIN and DOUT ports.	2018-07-13 14:45:46 -07:00
Matt Guthaus	0c23efe49b	Reference local sram instance in sram.py.	2018-07-13 09:30:14 -07:00
Matt Guthaus	e6b1fcb44c	Refactor banks to use inheritance with a top-level SRAM wrapper class.	2018-07-12 10:30:45 -07:00
Matt Guthaus	d95a1925d4	Refactor banked SRAM into multiple files and dynamically load in SRAM	2018-07-10 14:17:09 -07:00