9 Commits

Author	SHA1	Message	Date
Eren Dogan	0a1de57cae	Update copyright year	2024-01-03 14:32:44 -08:00
mole99	8032fa75a4	Add LEF output for ROM	2023-12-21 08:07:49 +01:00
Gary Mejia	9a36cce7ae	Fixed formatting on all files	2023-06-14 12:28:36 -07:00
Gary Mejia	692acd2066	Verilog ROM model created for testing	2023-06-12 15:35:54 -07:00
Sage Walker	b2bcbddd01	ROM binary file support	2023-04-03 16:04:12 -07:00
mrg	56e14113aa	Change rom_base_bank name and top pin names	2023-03-30 11:30:50 -07:00
Jacob Walker	eec0f02bb8	skip test file	2023-03-30 11:30:50 -07:00
Jacob Walker	b50ec272da	updated top level rom unit tests	2023-03-30 11:30:50 -07:00
Jacob Walker	41f0b9a412	rom compiler top level	2023-03-30 11:30:50 -07:00