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luke/OpenRAM
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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 01:24:39 +02:00
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4,969 Commits 5 Branches 63 Tags
array_gen-to-dev
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Author SHA1 Message Date
Sage Walker b279791762 added control buf test 2023-10-31 23:24:21 -07:00
Sage Walker cb8567c66f spacing tweaks for gf180 address control gate 2023-10-31 23:24:21 -07:00
Sage Walker d6cb15c82d Switched to GF180D for extra metal layers, Fixed drc parameters so contacts are valid. ptx.py modified to achieve proper layer placement with gf180. ROM array and precharge DRC clean. 2023-10-31 23:24:21 -07:00
Sage Walker 0040efb86f workaround for magic drc in gf180 2023-10-31 23:24:21 -07:00
Sage Walker b0a0226e87 rom array compatability changes 2023-10-31 23:24:21 -07:00
Sage Walker 1255a81487 ROM binary file support 2023-10-31 23:24:21 -07:00
Sage Walker c09a981734 make pdk uses conda for gf180 with configure options for local pdk sources 2023-10-31 23:24:21 -07:00
Sage Walker bb8f3f7eb8 add rom to index 2023-05-03 21:12:09 -07:00
Sage Walker a5a0cffe65 basic rom usage info 2023-04-19 23:32:06 -07:00
Sage Walker 7ed7ff4e9a fixed bug with tempdir in macros makefile 2023-04-03 17:06:09 -07:00
Sage Walker b2bcbddd01 ROM binary file support 2023-04-03 16:04:12 -07:00
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