OpenRAM/compiler/tests/configs/config.py

# See LICENSE for licensing information.
#
# Copyright (c) 2016-2023 Regents of the University of California and The Board
# of Regents for the Oklahoma Agricultural and Mechanical College
# (acting for and on behalf of Oklahoma State University)
# All rights reserved.
#
from openram import OPTS
word_size = 1
num_words = 16

tech_name = OPTS.tech_name

nominal_corner_only = True
check_lvsdrc = True

#route_supplies = False

output_name = "sram"
rom_data_dir = "tests/configs"
Update copyright. Add header to all OpenRAM files. 2019-04-26 21:21:50 +02:00			`# See LICENSE for licensing information.`
			`#`
Update copyright year 2023-01-29 07:56:27 +01:00			`# Copyright (c) 2016-2023 Regents of the University of California and The Board`
Fix space before comment 2019-06-14 17:43:41 +02:00			`# of Regents for the Oklahoma Agricultural and Mechanical College`
			`# (acting for and on behalf of Oklahoma State University)`
			`# All rights reserved.`
Update copyright. Add header to all OpenRAM files. 2019-04-26 21:21:50 +02:00			`#`
Use library imports globally 2022-11-27 22:01:20 +01:00			`from openram import OPTS`
Added scn4m_subm. Added scn4m_subm files (instead of scn4me_subm). Fixed missing cifoutput/cifinput in magic tech file and gds files. Fixed incorrect M3/via3/M4 design rules. 2018-09-13 21:53:35 +02:00			`word_size = 1`
			`num_words = 16`

Make unit test configs generic to tech_name 2019-11-17 01:44:31 +01:00			`tech_name = OPTS.tech_name`
Fix wrong supply voltage in config files. 2019-11-20 18:50:27 +01:00
Change default nominal corners to false and enable in test config. 2019-11-29 21:08:53 +01:00			`nominal_corner_only = True`
Cleanup options for front-end. Improve info output. 2019-04-01 19:35:17 +02:00			`check_lvsdrc = True`
Added scn4m_subm. Added scn4m_subm files (instead of scn4me_subm). Fixed missing cifoutput/cifinput in magic tech file and gds files. Fixed incorrect M3/via3/M4 design rules. 2018-09-13 21:53:35 +02:00
Reimplement off grid pins. Long pins aren't accessed on end pins anymore. Fix problem with multiple non-enclosed space causing blockages. Add partial pin offgrid enclosure algorithm. 2022-05-03 00:43:14 +02:00			`#route_supplies = False`
Rework replica_bitcell_array supplies Uses layer and direction preferences in tech file. Places straps on left/right or top/bottom. 2022-04-19 17:50:11 +02:00
By default uniquify instances based on macro name. 2022-03-12 03:01:45 +01:00			`output_name = "sram"`
Simplify ROM test. 2023-03-14 00:42:24 +01:00			`rom_data_dir = "tests/configs"`