luke/yosys
1
0
Fork 0
mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-06 10:03:36 +02:00
Code Issues Packages Projects Releases Wiki Activity
17,817 Commits 159 Branches 71 Tags
a06d5b3a5e3401ccbcb16a8e251ee2c5079daae1
Commit Graph
17817 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
Miodrag Milanovic a06d5b3a5e Update ABC as per 2026-09-09 2026-09-09 14:46:05 +02:00
Miodrag Milanović c1baef8d8a Merge pull request #6185 from YosysHQ/release/v0.69 
Release version 0.69
 2026-09-09 06:15:52 +00:00
Miodrag Milanovic 5c7b22f37d Next dev cycle 2026-09-09 08:00:21 +02:00
Miodrag Milanovic 9f75ca1f98 Release version 0.69 v0.69 2026-09-09 07:26:44 +02:00
Miodrag Milanović 72dc977396 Merge pull request #6184 from YosysHQ/mmicko/svelab-update 
sv-elab: Update to release 2026-09-08
 2026-09-08 10:31:12 +00:00
Miodrag Milanovic a80623137a sv-elab: Update to release 2026-09-08 2026-09-08 11:58:13 +02:00
Miodrag Milanović f1442ce42e Merge pull request #6182 from YosysHQ/lofty/revert-read_xaiger2 
Temporarily revert #6101 and #6077
 2026-09-08 04:53:08 +00:00
Lofty 51583d854a Revert "Merge pull request #6077 from YosysHQ/lofty/abc-refactor-8" 
This reverts commit fd6367405e, reversing
changes made to 0f2bcb94b7.
 2026-09-07 17:29:08 +01:00
nella 7c26ff16c6 Merge pull request #6162 from YosysHQ/nella/scl-cache-dir 
liberty_cache: per user SCL cache directory [sc-843]
 2026-09-07 14:52:21 +00:00
Miodrag Milanović 95e245f563 Merge pull request #6181 from YosysHQ/mmicko/wheels 
cmake: fix wheels build
 2026-09-07 11:18:08 +00:00
Miodrag Milanovic 7a29365a3e cmake: fix wheels build 2026-09-07 12:38:32 +02:00
Miodrag Milanović c2bf7dc67b Merge pull request #6180 from YosysHQ/mmicko/unused 
cmake: replace -Werror=unused with more specific options
 2026-09-07 10:06:32 +00:00
Miodrag Milanovic 756434cc23 cmake: replace -Werror=unused with more specific options 2026-09-07 11:27:12 +02:00
nella 435977e970 Merge pull request #6176 from YosysHQ/nella/cell-rank 
dfflibmap: rank cells on an explicit tuple [sc-906]
 2026-09-04 23:24:10 +00:00
nella dbef3ec8a5 Merge branch 'main' into nella/cell-rank 2026-09-04 16:06:21 -07:00
nella 0f87e78af3 Merge pull request #6167 from YosysHQ/nella/opt-dff-quadratics 
opt_dff: avoid quadratic sigmapping in mux tree feedback search [sc-839]
 2026-09-04 17:35:08 +00:00
nella cdf2832f47 Merge branch 'main' into nella/opt-dff-quadratics 2026-09-04 10:17:32 -07:00
nella 3be4154275 Sigmap single port bits in mux tree feedback search. 
find_muxtree_feedback_patterns sigmapped the whole A/B/S ports of every
visited $pmux, which is O(port width) per visited bit and makes wide mux
trees quadratic. Sigmap only the single bit that is needed, via a new
port_bit() helper, and factor the repeated Sx port writes into
break_feedback(). Output is unchanged.
 2026-09-04 17:39:15 +02:00
Emil J edb882e874 Merge pull request #6177 from YosysHQ/emil/abc-prepare-extract-sequence-determinism-2 
abc: isolate state mutation in prepare and extract for multi-threaded determinism
 2026-09-04 13:09:37 +00:00
nella 82b95b2669 Use <=>. 2026-09-04 13:29:31 +02:00
Lofty c53d452134 Revert "Merge pull request #6101 from YosysHQ/lofty/abc-refactor-10" 
This reverts commit 621d943ac8, reversing
changes made to 598862f45b.
 2026-09-04 11:16:11 +01:00
Emil J. Tywoniak e74a81c639 abc: cleanup 2026-09-04 12:01:35 +02:00
Emil J. Tywoniak cdbf2948bb abc: defer cell removal from prepare until extract for multi-threaded determinism 2026-09-04 11:38:26 +02:00
nella c4b6c19580 Rank cells on tuple. 2026-09-04 11:16:24 +02:00
Emil J. Tywoniak 74ff7c407b abc: per-clock-domain autoidx mechanism for multi-threaded determinism 2026-09-04 11:12:33 +02:00
Emil J. Tywoniak 3870f810f3 kernel: avoid running ensure_at_least in parallel 2026-09-04 11:11:55 +02:00
Emil J. Tywoniak 4a51ae1f2c abc: don't bump assign_map in extract 2026-09-04 10:37:35 +02:00
Nick Allison 0bf55a858b Merge pull request #6164 from YosysHQ/nick/fix-6151 
Adding error cases to formal backends for invalid formal cells
 2026-09-02 14:42:28 +00:00
Miodrag Milanović 28b7a17675 Merge pull request #6115 from YosysHQ/log-sink 
log rewrite [sc-748]
 2026-09-02 13:03:29 +00:00
nella 1103ca971c Merge pull request #6110 from YosysHQ/nella/opt_dff-cleanup 
opt_dff -sat: cleanup and refactor [sc-725]
 2026-09-02 09:12:26 +00:00
nick 3deb8f313e fix 6151 - adding error cases to formal backends / also adding test 
cases
 2026-09-01 14:34:28 -06:00
nella 9c2e1a8338 Add scl cache dir option. 2026-09-01 14:29:02 +02:00
Miodrag Milanović 56cf2cf419 Merge pull request #6159 from YosysHQ/mmicko/update_sv_elab 
Update sv-elab to release 2026-08-30
 2026-09-01 06:37:05 +00:00
Miodrag Milanovic 7c10ee1c58 Update sv-elab as of 2026-09-01 2026-09-01 08:20:05 +02:00
Miodrag Milanovic 726aff678f log: remove log_ prefix and unified some namings 2026-08-31 11:20:21 +02:00
Miodrag Milanovic 09c227b0a7 log_stderr_sink_forced since it is external sink configuration 2026-08-31 10:34:45 +02:00
Miodrag Milanovic cdb5ff5f99 log: keep log_debug a macro 2026-08-31 08:25:47 +02:00
nella e0bf46ebc5 Separate non -sat constbits. 2026-08-27 23:10:40 +06:00
nella d26f1a8573 Review fixups 
Co-authored-by: Emil J. Tywoniak <[email protected]>
 2026-08-27 23:10:40 +06:00
Emil J. Tywoniak 0c0b6c2bdd opt_dff: smaller context structs 2026-08-27 23:10:40 +06:00
Emil J. Tywoniak 60da0e8ef0 opt_clean: move 2026-08-27 23:10:40 +06:00
Emil J. Tywoniak f8bf9ad1c8 opt_dff: split up 2026-08-27 23:10:40 +06:00
nella 95baa38274 Document ConstObligation. 2026-08-27 23:10:40 +06:00
nella 32a9fd2281 Whitespace. 2026-08-27 23:10:40 +06:00
nella 5f5c1a7a33 Comment and style touchups. 2026-08-27 23:10:40 +06:00
nella 01df56414d One sat query per obligation. 2026-08-27 23:10:40 +06:00
nella fc4b87363e Bundle eqbits candidates. 2026-08-27 23:10:40 +06:00
nella 96e776fbfc Single driver lookup in bitsim. 2026-08-27 23:10:40 +06:00
nella 040dbe0839 Constbits counterexample watch list. 2026-08-27 23:10:40 +06:00
nella 4c0979e88e Separate constbits batching. 2026-08-27 23:10:40 +06:00