Robert O'Callahan
b42bb05b63
Parallelize `Design::check()`
2026-03-06 02:03:21 +00:00
Robert O'Callahan
e2166c4684
Parallelize `collect_garbage()`
2026-03-06 02:03:21 +00:00
Robert O'Callahan
5ff7d344c9
Add `FfInitVals::set_parallel()` method
...
We'll use this later in the PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
fe329a0e14
Add `MonotonicFlag`
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We'll use this later in the PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
e71da96314
Add `ConcurrentWorkQueue`
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We'll use this later in the PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
ab238c3145
Add `ShardedHashSet`
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We'll use this later in the PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
87521df534
Add `ShardedVector`
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We'll use this later in the PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
b079e5721c
Add `ParallelDispatchThreadPool`
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We'll use this later in the PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
898a288a99
Add `work_pool_size`, `IntRange`, `item_range_for_worker`, and `ThreadIndex`
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We'll use these later in this PR.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
bd7f2d9ba4
Make `log_error()` work in a `Multithreaded` context.
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`log_error()` causes an exit so we don't have to try too hard here. The main
thing is to ensure that we normally are able to exit without causing a stack
overflow due to recursive asserts about not being in a `Multithreaded` context.
2026-03-06 02:03:21 +00:00
Robert O'Callahan
7af5dbae35
Add `IdString::unescape()` method
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We've already talked about adding this as an alternative to `log_id()`, and we'll
need it later in this PR.
2026-03-06 02:03:21 +00:00
Emil J. Tywoniak
23eb38fe3f
celltypes: include newcelltypes to allow legacy code access to migrated yosys_celltypes
2026-03-05 11:59:20 +01:00
Emil J. Tywoniak
6485a13809
newcelltypes: mark header unstable
2026-03-04 15:17:26 +01:00
nella
04822c6660
Readd builtin_ff_cell_types for plugin parity.
2026-03-04 12:39:45 +01:00
nella
66bd4716cf
rtlil use newcelltypes.
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
0284595e9c
celltypes: fix absurd eval declarations
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
793a3513c6
newcelltypes: use unordered_map
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
661fcb24cb
newcelltypes: fix MSVC build
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
12412d1fa5
register: use newcelltypes
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
ecb8b20f62
yosys: use newcelltypes for yosys_celltypes users
2026-03-04 12:39:44 +01:00
Emil J. Tywoniak
5216d32d1b
yosys: use newcelltypes for yosys_celltypes
2026-03-04 12:22:47 +01:00
Emil J. Tywoniak
c3ed884bc4
drivertools: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
31b86ebc2e
newcelltypes: comment
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
8e17fb0266
consteval: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
a0f87dc2d1
modtools: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
a9463d1aee
newcelltypes: fix non-cells
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
e3f9911e33
newcelltypes: refactor
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
07ec8708e4
share: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
3212dfaf1f
newcelltypes: fix unit test
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
7e9e88c2ec
newcelltypes: bounds check
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
9e59f05c25
newcelltypes: wrap design celltypes support
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
35ccaa60d7
newcelltypes: TurboCellTypes -> StaticCellTypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
6adc08b0e5
opt_expr: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
a61455645d
newcelltypes: init
2026-03-04 12:22:14 +01:00
Emil J
5f8489d36d
Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors
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equiv_induct: error on missing model
2026-02-25 15:39:31 +01:00
Emil J
74f7b0cf92
Merge pull request #5685 from chathhorn-galois/chathhorn/issue5684
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Fix segfault from shift with 0-width signed arg.
2026-02-20 11:53:05 +01:00
Emil J
53509a9b2a
Merge pull request #5692 from YosysHQ/emil/modtools-fix-db-port-deletion
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modtools: fix database sanity
2026-02-20 10:49:28 +01:00
Emil J. Tywoniak
abc7563a35
modtools: add ModIndex unit test
2026-02-18 22:15:44 +01:00
Emil J. Tywoniak
c75d80905a
modtools: fix database sanity on wire name swap
2026-02-18 21:23:21 +01:00
Gus Smith
29a270c4b6
Merge pull request #5675 from rowanG077/add-missing-celledges
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kernel/celledges: cover more cell types
2026-02-18 07:50:41 -08:00
Emil J. Tywoniak
62f19cb3a9
modtools: fix port_del db erase
2026-02-18 12:20:36 +01:00
Emil J. Tywoniak
77f64de997
satgen: move report_missing_model here from equiv.h
2026-02-16 17:01:09 +01:00
Chris Hathhorn
1e852cef16
Fix segfault from shift with 0-width signed arg.
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Fixes #5684 .
2026-02-12 22:03:42 -06:00
Gus Smith
8ab105ac28
Merge pull request #4303 from Coloquinte/sat_choice
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Infrastructure to run a Sat solver as a command
2026-02-11 06:54:53 -08:00
Rowan Goemans
b8ee50d77f
kernel/celledges: cover more cell types
2026-02-09 14:13:40 +01:00
Gus Smith
1502e23371
Set solver from scratchpad or command line
2026-02-06 19:26:32 -08:00
Emil J
2aa0e1d009
Merge pull request #5629 from rocallahan/remove-zero-wires
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Avoid scanning entire module in `Module::remove()` if there are no wires to remove
2026-02-04 17:44:24 +01:00
Emil J. Tywoniak
d199195785
satgen: cover $input_port
2026-02-03 18:10:29 +01:00
Emil J
59653da599
Merge pull request #5609 from nataliakokoromyti/upstream-design-run-pass
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Add Design::run_pass()
2026-02-02 19:30:18 +01:00
nella
8f6c4d40e4
Merge pull request #5623 from YosysHQ/nella/opt-dff-rewrite
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opt_dff restructure.
2026-01-28 14:41:40 +01:00