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4901 Commits

Author SHA1 Message Date
nella 135812ab02 Further CSA cleanup. 2026-04-13 12:48:05 +02:00
nella 847a8941e9 Clang-Format CSA tree. 2026-04-13 12:48:05 +02:00
nella a02c238874 Consolidate Wallace from booth and CSA. 2026-04-13 12:48:05 +02:00
nella 4bbffecf98 Invert. 2026-04-13 12:48:05 +02:00
nella 42c309347b Clarify. 2026-04-13 12:48:05 +02:00
Emil J. Tywoniak b6d656e932 csa_tree: move to techmap 2026-04-13 12:48:05 +02:00
Emil J. Tywoniak b6a8feec22 csa_tree: refactor 2026-04-13 12:48:05 +02:00
nella 67e145618b Replace utf arrow with ascii arrow. 2026-04-13 12:48:05 +02:00
nella 5d90bcc792 CSA add support for macc and alu cells. 2026-04-13 12:48:05 +02:00
nella 335cce4895 Add sub chain support for csa trees. 2026-04-13 12:48:05 +02:00
nella e69914b8be better balancing. 2026-04-13 12:48:05 +02:00
nella 46df888191 impl csa tree. 2026-04-13 12:48:05 +02:00
Lofty 564c617721
Merge pull request #5790 from Eiko-Eira/main 
Fixed typos and incorrect grammar
 2026-04-11 03:26:55 +00:00
Emil J 86448c0001
Merge pull request #5655 from YosysHQ/emil/dffsr-sr-priority-undef 
Undefine set&reset behavior of $dffsr
 2026-04-08 14:22:34 +00:00
Emil J. Tywoniak 41b69df2cb abc_new: stable TopoSort 2026-04-06 15:09:52 +02:00
Noah Van Dijk 52243e10fb
Fix typo in pmgen/README.md 
Line 161:
calulated > calculated
 2026-04-02 10:24:31 -05:00
Emil J cede13a742
Merge pull request #5765 from YosysHQ/emil/muxpack-wide-port 
muxpack: fix wide Y port handling
 2026-03-31 10:49:39 +00:00
tondapusili 5b22e64d19 sim: cache sigmap in register_output_step_values 2026-03-24 16:10:11 -07:00
Miodrag Milanović 66306a8ca3
Merge pull request #5769 from Silimate/optimize_sim_pass 
sim: early return from checkSignals in sim mode
 2026-03-23 17:19:26 +00:00
Emil J b44188110b
Merge pull request #5764 from YosysHQ/emil/constmap-error 
constmap: error if no -cell set
 2026-03-23 15:15:04 +00:00
tondapusili 69219e6be0 sim: early-return from checkSignals in sim mode 2026-03-20 12:32:49 -07:00
Lofty f560cba952
Merge pull request #5757 from YosysHQ/lofty/abc9-refactor-3 
abc9: remove -fast [sc-269]
 2026-03-19 08:41:45 +00:00
Lofty 27210627e5 abc9: remove -fast 2026-03-19 07:30:23 +00:00
Lofty 8d1d5a25e5
Merge pull request #5760 from YosysHQ/lofty/abc-refactor-2 
abc: remove -S [sc-269]
 2026-03-19 07:26:54 +00:00
Lofty 05de1c4ae2
Merge pull request #5759 from YosysHQ/lofty/abc9-refactor-4 
abc9: remove abc9.if.C [sc-269]
 2026-03-19 07:26:37 +00:00
Emil J. Tywoniak 4f4672d17b muxpack: fix wide Y port handling 2026-03-19 00:12:49 +01:00
Emil J. Tywoniak 7aaa0621d3 constmap: error if no -cell set 2026-03-19 00:01:14 +01:00
Emil J 9746bd3897
Merge pull request #5724 from abhinavputhran/fix/setundef-respect-selection 
setundef: respect selection for cells, processes, and connections
 2026-03-18 22:53:06 +00:00
Lofty f9d930ba5a
Revert "abc: remove -fast [sc-269]" 2026-03-18 17:55:17 +00:00
Lofty e05ed6b850
Merge pull request #5758 from YosysHQ/lofty/abc-refactor-1 
abc: remove -fast [sc-269]
 2026-03-18 15:09:36 +00:00
Lofty 0b3f103745 abc: remove -S 2026-03-18 14:40:23 +00:00
Lofty 93c762c7c1 abc9: remove abc9.if.C 2026-03-18 14:27:27 +00:00
Lofty 926814f1e4 abc9: cleanup commented code 2026-03-18 14:16:31 +00:00
Lofty 0ea739b7d9 abc: remove -fast 2026-03-18 14:15:42 +00:00
Lofty e78690fc47 abc9_exe: fix typo 2026-03-18 11:44:13 +00:00
Emil J c8f715fed8
Merge pull request #5664 from rocallahan/parallel-opt-clean 
Parallelize `opt_clean` pass
 2026-03-16 09:52:34 +00:00
Emil J. Tywoniak 498cb79abe async2sync: explain dffsr control signal variable polarity 2026-03-09 20:18:56 +01:00
Emil J. Tywoniak 43ef4d2901 fixup! async2sync: $dffsr has undef output on S&R 2026-03-09 20:12:24 +01:00
abhinavputhran 47c2257f82 setundef: more tests! and wire selection in -init mode 2026-03-08 19:41:31 -04:00
abhinavputhran 5048dac854 setundef: add tests for selection in -zero, -undriven, and -init modes. also made setundef.cc clearer 2026-03-06 18:12:03 -05:00
abhinavputhran 9e666c727f setundef: respect selection in -undriven mode 2026-03-06 10:37:59 -05:00
Miodrag Milanovic 52533b0d1c Update opt_lut_ins and stat for analogdevices and remove ecp5 2026-03-06 09:10:36 +01:00
Robert O'Callahan 9c51ba1b09 Reduce opt_clean parallelism 2026-03-06 02:20:16 +00:00
Robert O'Callahan 8d8c05b338 Fix `OptCleanPass` usage of `CleanRunContext` to avoid constructing extra `KeepCache` and `ParallelDispatchThreadPool` 2026-03-06 02:20:16 +00:00
Robert O'Callahan 32f5044eaf Clarify "Not passing module as function argument" comment 
This correct in terms of intent, it's just not fully enforced due to const laundering.
 2026-03-06 02:20:16 +00:00
Emil J. Tywoniak 70cc2d67fd opt_clean: refactor 2026-03-06 02:20:14 +00:00
Robert O'Callahan 3603cd52a0 Pass the module `Subpool` to `rmunused_module_signals` and parallelize that function 2026-03-06 02:20:08 +00:00
Robert O'Callahan 19a7c8fcf3 Pass the module `Subpool` to `rmunused_module_cells` and parallelize that function 2026-03-06 02:20:08 +00:00
Robert O'Callahan 8e044d1045 Pass the module `Subpool` to `rmunused_module_init` and parallelize that function 2026-03-06 02:20:06 +00:00
Robert O'Callahan a7437c636d Pass the toplevel thread pool to `rmunused_module`, create a `Subpool`, and parallelize `remove_temporary_cells` 2026-03-06 02:05:46 +00:00