stefan schippers
|
20359ed43e
|
update license info. Remove unneeded newline saving in version line of .sch/.sym files, remove c89 flag based on lib versions
|
2024-11-12 20:23:18 +01:00 |
|
stefan schippers
|
8c10ecb8b7
|
schematic example updates
|
2023-10-24 10:29:39 +02:00 |
|
stefan schippers
|
94bccc08d9
|
do not duplicate empty strings as NULLs in hash tables
|
2023-10-09 12:49:11 +02:00 |
|
Stefan Frederik
|
7a1fbb4809
|
better check_unique_names() and hash_all_names() implementation (do not skip label instances or instances with no format attr). Button click focuses main drawing window even if autofocus_mainwindow is set to 0, to avoid losing keyboard focus forever if TAB is pressed.
|
2022-10-12 11:56:02 +02:00 |
|
Stefan Frederik
|
7d016eab28
|
small netlist syntax fix in token.c (correctly skip VHDL time attributes), tedax backend: avoid printing mapping comments for duplicated pins
|
2022-10-12 09:32:37 +02:00 |
|
Stefan Frederik
|
ce75ca2bbf
|
make examples/test_doublepin.sch compile with no errors with ngspice, ghdl and iverilog, this is a test schematic to validate pass-through symbols
|
2022-10-11 14:25:58 +02:00 |
|
Stefan Frederik
|
3f627123b2
|
persists highlights on instances: remove highlighted instance from hash if user selects and presses ctrl-k as it is done for nets. Avoid instance highlight to also highlight net with identical name (example instance x1 and net x1). Verilog and Vhdl netlists handle duplicated (pass-through) pins
|
2022-10-11 13:12:17 +02:00 |
|
Stefan Frederik
|
6be0fc392b
|
refactoring of netlister code
|
2022-10-07 23:29:42 +02:00 |
|
Stefan Frederik
|
1c407e5dd6
|
faster implementation of name_pass_through_nets() so almost zero overhead when netlisting big circuits with no pass-thru symbols
|
2022-10-04 15:39:45 +02:00 |
|
Stefan Frederik
|
9dd68436cf
|
Handling of duplicated pins in spice netlists, added test_doublepin.sch in examples/
|
2022-02-15 12:28:23 +01:00 |