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9238 Commits

Author SHA1 Message Date
Yilou Wang ed84f3adb2
Support constraints on fixed-size array of class object members (#7170) (#7183) 2026-03-03 06:27:31 -05:00
Wilson Snyder ee68d1c70c CI: Disallow pulls to stable 2026-03-02 17:48:32 -05:00
Wilson Snyder 1f2f4d9bba Commentary: Changes update 2026-03-02 17:47:54 -05:00
jalcim d406efdcf9 Fix recursive constant function in $unit scope (#7174) (#7178) 2026-03-02 15:15:34 -05:00
Wilson Snyder 251d1835cf Internals: Comment to explain stray emit semicolon 2026-03-02 11:26:48 -05:00
dependabot[bot] a3870c5e5e
CI: depandabot: Bump actions with 2 updates (#7172) 2026-03-02 10:52:53 -05:00
Yilou Wang 8a413b3ec7
Fix std::randomize() in static function with static class members (#7167) (#7169) 2026-03-02 05:59:00 -05:00
Yilou Wang 108d209bd7
Support soft constraint solving with last-wins priority (#7124) (#7166) 2026-03-01 15:16:55 -05:00
Wilson Snyder 192445097a
Internals: Fix non-determinism in V3Delayed, V3SplitVar, V3Task (#7120 partial) (#7165) 2026-03-01 11:59:29 -05:00
Geza Lore 6c48b3282e
Enable V3LiftExpr with code coverage (#7164) 2026-03-01 15:04:49 +00:00
Geza Lore 3249fd8cc0
Internals: Mark Premit temporaries funcLocal, noReset (#7160) 2026-03-01 14:56:21 +00:00
Geza Lore 9d8baa1e44
Testing: Relax expected file count in t_flag_csplit_groups (#7163) 2026-03-01 13:27:46 +00:00
Geza Lore 97838325cd
Fix scheduling non-determinism (#7120 partial) (#7162) 2026-03-01 07:44:59 -05:00
Geza Lore 77ce9cec1e
Optimize conditional merging across some impure statements (#7159) 
- Allow reordering pure statements with DPI import calls iff no public
  variables (including those read via a DPI export) are involved. This
  ensures the DPI import can't observe the reordering
- Allow reordering of pure statements with AstDisplay and AstStop. This
  requires an assumption that AstDisplay and AstStop will not read or
  write model state other than via a VarRef explicitly present int the
  Ast.
Overall this allows eliminating a lot of conditionals around assertions,
which were previously not possible.
 2026-03-01 05:47:05 -05:00
Geza Lore 26eac21432
Internals: Use existing astgen type info for ASTGEN_MAX_NODE_SIZE (#7161) 2026-03-01 05:33:30 -05:00
Wilson Snyder e9dd6eaaf0 Internals: Fix VL_ALLOC_RANDOM_CHECKS with multiple threads 2026-02-28 20:24:09 -05:00
Wilson Snyder e23c7a510e Internals: Add VL_ALLOC_RANDOM_CHECKS 2026-02-28 18:21:51 -05:00
Wilson Snyder 230ce772c2 Tests: Verilog format; rename test 2026-02-28 18:19:34 -05:00
Wilson Snyder 2e351651cb Fix undefined weak 'vlog_startup_routines' on macOS 2026-02-28 18:17:00 -05:00
Wilson Snyder 17ad3970ee Commentary: Changes update 2026-02-28 18:15:07 -05:00
Geza Lore 098fe96643
Add V3LiftExpr pass to lower impure expressions and calls (#7141) 
Introduce new pass that converts impure expressions, or those with
function and method calls into simple assignment statements. Please see
the blurb at the top of the file why this is useful and how it works.
In particular currently it enables more Dfg optimization as functions
will be inlined without AstExprStmt.

Ideally we should enforce this lowering is applied to every procedural
statement (there are still a handful of exceptions). With that, long
term with this pass + #6820, there should be no need to ever use an
AstExprStmt past this new lowering pass, which should enable more easier
optimization down the line.

Also ideally this should be run earlier. Currently it's after V3Tristate
as that calls pinReconnectSimple so we don't have to touch Cell ports.

Currently disabled when code coverage is enabled due to #7119.
 2026-02-28 22:20:09 +00:00
Geza Lore 99238f67b8 Fix undefined weak 'vlog_startup_routines' on macOS 2026-02-28 16:10:59 +00:00
Geza Lore 2ceea267e5
Fix eliminating assignments to DPI-read vaiables (#7158) 2026-02-28 10:09:01 -05:00
Pawel Kojma face700f29
Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
Geza Lore 139bdc1ae3
Optimize function call return value temporaries (#7152) 2026-02-28 09:54:39 -05:00
Szymon Gizler 1af7fa92c2
Optimize size of trace declaration object code (#7150) 2026-02-28 09:54:08 -05:00
Ryszard Rozak 6f892d58ac
Fix forcing unpacked variables (#7149) 2026-02-28 09:53:41 -05:00
Kamil Danecki df6b808c49
Fix parameters inside std::randomize `with` clause (#7140) 2026-02-28 09:53:05 -05:00
Todd Strader 8705bc56c8
Fix errant integer promotion (#7012) 2026-02-28 09:52:35 -05:00
Nick Brereton 02c1dbc5dc
Fix lambda coroutines (#6106) (#7135) 2026-02-28 09:52:02 -05:00
Geza Lore 1716423d07
Internals: Fix invalid use of user1 in V3Const (#7157) 2026-02-28 09:51:07 -05:00
Wilson Snyder 1e6c1ab106 Add VPI callback support to --main (#7145). 
Fixes #7145.
 2026-02-28 09:42:28 -05:00
Wilson Snyder d40036239b Fix wide conditional short circuiting (#7155). 
Fixes #7155.
 2026-02-28 09:40:10 -05:00
Wilson Snyder 5ae285d268 devel release 2026-02-28 09:37:43 -05:00
Wilson Snyder 24b2ac24c7 Version bump 2026-02-28 09:21:59 -05:00
Wilson Snyder af65a85a1e Fix function locals in display %p 2026-02-26 18:12:12 -05:00
Wilson Snyder 2efcfa567c Commentary: Changes update 2026-02-25 20:28:14 -05:00
Veripool API Bot 3190442f86 Verilog format 2026-02-25 20:28:07 -05:00
Wilson Snyder 6f96ff8df6 Tests: Limit test.build_jobs based on number of tests running 2026-02-25 20:27:07 -05:00
Wilson Snyder 22290a74c2 Fix class initial-automatic insertion order (#7086 repair) 2026-02-25 19:01:19 -05:00
em2machine d658517715
Change type definition error to show type chain with source context (#7151) 2026-02-25 14:47:13 -05:00
AUDIY 8d34bc786a
Commentary: Add coverage type to example (#7148) 2026-02-25 01:26:51 -05:00
Wilson Snyder 7dde11b4c6 Docs: Split control.rst from exe_verilator.rst. 2026-02-24 21:11:39 -05:00
Wilson Snyder ef498255f9 Commentary: Changes update 2026-02-24 21:03:35 -05:00
Veripool API Bot c28200c53a Verilog format 2026-02-24 21:03:32 -05:00
AUDIY 10eafb9b3f Add coverage type information to verilator_coverage annotation output (#7131) (#7133). 
Fixes #7131.
 2026-02-24 20:59:42 -05:00
Wilson Snyder 9bc88ff1bc Fix finding single DPI exports from other scopes 2026-02-24 19:06:05 -05:00
Wilson Snyder e976424efa Internals: Add nodist/verilog_format 2026-02-24 14:45:57 -05:00
Gilberto Abram 826b03c21f
Fix segfault in EmitCSyms::getSymCtorStmts (#7142) (#7143) 2026-02-24 14:08:01 -05:00
Wilson Snyder 7607f0e7fa
Support proper automatic/static initialization, and remove STATICVAR warning (#6405). (#7086) 2026-02-24 14:04:43 -05:00