9d98e012e4
Fix segfault on SystemVerilog "output wire foo=0", bug291.
2010-10-04 07:48:09 -04:00
a320c4584e
Fix do {...} while() not requiring final semicolon.
2010-07-07 19:15:51 -04:00
d776638f53
Internals: Mark packed dimensions in arrays, bug227
...
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2010-04-09 20:40:41 -04:00
7ed18ac62d
Internals: Track Verilog-Perl 3.240 parser changes
2010-04-06 18:55:54 -04:00
936738b750
Add /*verilator public_flat_rw*/ for timing-specific public access.
2010-04-05 20:01:17 -04:00
9a3e497c22
Fix specparam defaults
2010-02-18 08:43:16 -05:00
cdd06e7236
Support "break", "continue", "return".
2010-02-14 10:01:21 -05:00
b1872a8e21
Internals: Add enum prefixes to reduce MSVC macro conflicts
2010-02-01 20:15:48 -05:00
abcb95b8a1
Fix order of packed arrays, bug216
2010-01-26 08:06:39 -05:00
4b38acd540
Fix 2D wire decls, bug206
2010-01-25 07:52:07 -05:00
d17bcd8afe
Allow 'global' reserved identifier in 1800-2009 when possible
2010-01-22 19:08:20 -05:00
4360fe492e
Fix initial values for local variables, bug210
2010-01-21 20:08:45 -05:00
2da9d46ca6
Internals: Rename AstVar::initp to valuep as it's a constant, not initial value
2010-01-21 18:20:47 -05:00
c695af31b8
Add experimental config files to filter warnings outside of the source.
2010-01-21 06:11:30 -05:00
d2bce042a5
Fix for variable typing, bug205.
2010-01-19 19:27:36 -05:00
27e4503dc6
DPI: Constify new $sformatf
2010-01-17 20:06:08 -05:00
72b596efb3
DPI $display like sformat metacomment and $sformatf
2010-01-17 19:13:44 -05:00
0d1de96dbc
Internals: Add AstSFormatF
2010-01-17 15:53:12 -05:00
ab2702070b
Remove extra warning newlines
2010-01-15 20:07:16 -05:00
8203c79f76
/sformat should accept rvalue expressions
2010-01-14 19:07:18 -05:00
a2629c4929
Internals: Avoid some extra CRELINES
2010-01-09 15:44:06 -05:00
0d12fe43a0
Internals: Move CASEX warning with other case lints; add test
2010-01-09 11:09:14 -05:00
2950f77dbc
Ignore gate delays in UDP cells
2010-01-07 22:44:30 -05:00
a94f5ba200
--bbox-unsup now ignores cmos and tran gate primitives
2010-01-07 22:08:48 -05:00
eb63c8dcb8
Fix multiple declarations on one enum, bug199
2010-01-06 19:04:20 -05:00
cdcb94751e
Fix with no parenthesis
2010-01-06 14:21:34 -05:00
cd5d8cceb8
Fix with no parenthesis
2010-01-06 14:13:11 -05:00
729dfdfed7
Copyright year update
2010-01-05 21:15:06 -05:00
f3347be629
Support edge, 1800-2009
2009-12-28 19:49:40 -05:00
dbce06500d
Support enums
2009-12-27 08:29:55 -05:00
45aa8742d8
Internals: Rename implicit_typeE to match Verilog-Perl
2009-12-17 20:58:14 -05:00
5a9309de78
DPI import: Allow system calls to call imports
2009-12-04 07:05:44 -05:00
a40fae04ce
Support direct programming interface (DPI) "import".
2009-12-03 06:55:29 -05:00
1da07a3b86
Fix auto-indentation of AstCStmts
2009-12-01 21:55:56 -05:00
955824e634
Fix functions arguments without leading input
2009-11-24 22:16:28 -05:00
d2a27a84cf
Support chandle
2009-11-24 09:11:25 -05:00
c7d8eb126f
Support and .
2009-11-23 21:24:55 -05:00
2f2f367c0b
Internals: AstConst named functions when want true/false size 1
2009-11-22 20:05:33 -05:00
d7a2362a76
Parse UDP Tables, and report single unsupported error
2009-11-20 19:53:40 -05:00
e479c8a553
Support 'primitive', but not yet 'table'.
2009-11-20 08:41:28 -05:00
62f707f501
Support $test$plusargs and $value$plusargs, but see the docs.
2009-11-19 17:04:21 -05:00
19d62b7a68
Support 'time'.
2009-11-19 10:45:59 -05:00
92819f5082
Fix multi-dimensional arrayed typedefs, bug183.
2009-11-12 20:50:31 -05:00
736b9074c8
Support for loop i++, ++i, i--, --i, bug175.
2009-11-10 16:40:07 -05:00
376147911f
Support optional cell parenthesis, bug179
2009-11-10 16:29:58 -05:00
67d1dad77c
Support declarations in loop initializers, bug172.
2009-11-09 19:09:27 -05:00
3b39c3391d
Support "import".
2009-11-09 19:07:59 -05:00
68567e763c
Support "package" and $unit.
...
Add VARHIDDEN warning when signal name hides module name.
2009-11-07 21:05:02 -05:00
377f194837
Support typedef
2009-11-06 23:16:06 -05:00
b1ce6bd5cc
Support "var"
2009-11-05 19:57:31 -05:00
81915540de
Support "reg x [3][2]".
2009-11-05 19:26:44 -05:00
0d65f08b1d
Support "program".
2009-11-05 19:09:45 -05:00
ffbd1fd474
Support "reg [1:0][1:0][1:0]", bug176.
2009-11-05 09:57:23 -05:00
700c1f836d
Internals: Move array definitions to AstArrayDType instead of under AstVars.
...
Prep work for more complicated data types.
2009-11-04 22:31:53 -05:00
f59467b897
Support void functions.
...
Fix "int" etc added in wrong keyword section in last commit.
2009-11-02 22:50:31 -05:00
6bc81d3d26
Support byte, shortint, int, longint in variables, parameters and functions.
...
Internals: function/var sizing and signing now comes via dtypep()
Internals: cleanup code that widths parameters (again)
2009-11-02 22:14:11 -05:00
4c26792c9b
Internals: Create data types and attach to AstVars, in prep for typedefs.
...
Added AstNodeDType and AstBasicDType and associated enums.
2009-11-02 08:06:04 -05:00
9a133ced2d
Support 'bit' keyword
2009-10-31 15:12:28 -04:00
18bebaf5c3
Internals: Add parse-time symbol table for eventual typedef detection
2009-10-31 10:26:53 -04:00
f7efae93d5
Internals: Clean up the main flex/bison files to have some sanity.
...
(Hopefully) no functional change.
. V3Parse.h External consumer interface to V3ParseImp
. V3ParseImp Internals to parser, common to across flex & bison
... V3ParseGrammar Wrapper that includes V3ParseBison
..... V3ParseBison Bison output
... V3ParseLex Wrapper that includes lex output
..... V3Lexer.yy.cpp Flex output
2009-10-31 10:08:38 -04:00
7b4d2118ea
Internals: Realign flex with Verilog-Perl version
2009-10-30 23:17:56 -04:00
b4d3806f10
Fix carriage-returns embedded in display formats
...
Internals: Store all AstDisplay etc strings in un-backslashed raw format.
2009-10-22 21:29:18 -04:00
b1e6fe7139
Fix core dump with SystemVerilog var declarations under unnamed begins.
2009-10-11 20:50:31 -04:00
7069d7d802
Internals: Remove AstAssignW::allowImplicit - dead code
2009-10-06 21:58:00 -04:00
0c0a588b55
Support generate for var++, var--, ++var, --var.
2009-09-16 10:32:14 -04:00
faa5ef193b
Add --bbox-sys option to blackbox $system calls.
2009-09-16 09:28:09 -04:00
eea2712eac
Improved warning when "do" used as identifier.
2009-09-07 15:54:12 -04:00
4dde1ede0e
Support SystemVerilog "logic", bug101.
2009-07-16 09:19:15 -04:00
0a02d1f336
Reconsile with Verilog-Perl r77464
2009-05-19 07:49:19 -04:00
f9484a894f
Reconsile with Verilog-Perl
2009-05-11 20:32:52 -04:00
4569278c53
Reconsile parser with Verilog-Perl version, to enable more SV features
2009-05-07 18:28:05 -04:00
851b022c7a
Change lexer to more closely match Verilog-Perl. Should be no functional change
2009-05-05 13:39:25 -04:00
0985f675e3
Update bisonpre to match Verilog-Perl version
2009-05-04 21:54:44 -04:00
7df730cedd
Verilator is now licensed under LGPL v3 and/or Artistic v2.0.
2009-05-04 17:07:57 -04:00
d60d0a60c7
Support repeat and forever statements.
2009-02-25 22:06:59 -05:00
8fe0c3dd84
Commentary in parser to match Verilog-Perl
2009-02-25 17:16:51 -05:00
85419f01a9
Fix left associativity for ?: operators.
2009-02-07 20:54:09 -05:00
a199f4a849
Update Bison parser to track Verilog-Perl 3.110. No functional change
2009-01-28 15:27:41 -05:00
c4e69daecd
Add IEEE grammar comments; sync with Verilator-Perl parser
2009-01-24 21:36:14 -05:00
8f88fa45f1
Make grammer names more closely track IEEE. No functional change.
2009-01-15 13:58:43 -05:00
12bd12e112
Support bufif0, bufif1, notif0, notif1
2009-01-06 11:57:25 -05:00
0e4f9170fa
Tristate support; merge from branch.
2009-01-06 11:03:57 -05:00
3d06720628
Copyright year update
2009-01-02 11:47:39 -05:00
1a60723d77
Fix internal error on "output x; reg x = y;"
2008-12-30 14:34:01 -05:00
6b46da0240
Create /*verilator coverage_on/off*/ instead of coverage_module_off.
...
This allows finer grained bracketing of sections of interest.
Convert tracing_on/off to use the same general scheme.
2008-12-11 16:01:41 -05:00
0fed1d34d1
Add /*verilator coverage_module_off*/
2008-12-10 17:10:03 -05:00
ddbfc176b6
Internals: Create AstNodeSelItem in prep for future commits.
...
No real functional change, outside of minor debug dump differences.
2008-11-20 07:55:54 -05:00
384807ebbd
Ignore SystemVerilog timeunit and timeprecision
2008-10-14 14:49:54 -04:00
a348bd3458
Add unique and parallel case
2008-10-10 19:02:27 -04:00
11b9a631d4
Remove mis-committed debug print
2008-09-22 20:10:10 -04:00
eca6f2ca05
Increase bison max depth to prevent parse error
2008-09-17 11:11:09 -04:00
4770fd39d2
Fix stack overflow on large ? : trees.
2008-08-20 15:59:10 -04:00
df107628c6
Fix default clocking syntax; covers go outside the block
2008-08-06 17:51:36 -04:00
500dc2170f
Support SystemVerilog "cover property" statements.
2008-08-06 12:52:39 -04:00
a76ae67a81
Add bisonpre for simplifing grammar and cleaning output
2008-08-06 12:35:34 -04:00
9e5fb5467f
Add CASEZWITHX lint warning and if disabled fix handling of casez with Xs.
2008-07-22 13:07:19 -04:00
826b997166
Add .
2008-07-14 13:16:05 -04:00
701bd38d01
Add support for , . Bug14.
2008-07-01 14:15:10 -04:00
20aa21d4b6
Replace stdio.h and stdarg.h with C++ versions
2008-06-30 13:11:25 -04:00
0703843ac1
Support , .
2008-06-27 20:04:20 -04:00
Wilson Snyder
Byron Bradley
Lane Brooks