21 lines
497 B
Systemverilog
21 lines
497 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2022 Krzysztof Boronski
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// SPDX-License-Identifier: CC0-1.0
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int i = 0;
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function int postincrement_i;
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return i++;
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endfunction
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module t;
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initial begin
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automatic int arr [3][3] = {{1, 2, 3}, {4, 5, 6}, {7, 8, 9}};
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i = 0;
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arr[postincrement_i()][postincrement_i()]++;
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$display("Value: %d", i);
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end
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endmodule
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