14 Commits

Include renames

Author	SHA1	Message	Date
Zachary Snow	50996f0d67	support for integers with arrays or assignments; more complete and standardized support for multiple reg/integer declarations in procedural blocks	2019-02-11 14:46:09 -05:00
Zachary Snow	bde3673b06	support for parameters shorthand	2019-02-11 14:07:46 -05:00
Zachary Snow	8161eb44e9	preliminary support for arrays	2019-02-11 13:47:56 -05:00
Zachary Snow	ac95c5b0fd	support for multiple param/localparams in one declaration	2019-02-11 02:12:52 -05:00
Zachary Snow	39ee22574f	support for multi-line defines	2019-02-11 01:51:09 -05:00
Zachary Snow	cb42f37bb2	removed support for inital and delays	2019-02-10 18:56:01 -05:00
Zachary Snow	767b05cd06	arguably cleaner Show output for AST modules	2019-02-10 17:59:41 -05:00
Zachary Snow	14ba5dae6d	support for reduction ops, non-named/non-identifier module instantiation arguments, always @*	2019-02-10 17:47:11 -05:00
Zachary Snow	5b336439fb	cleanup of port decl parsing	2019-02-09 18:35:15 -05:00
Zachary Snow	ebd7ae67b1	hacky, preliminary support for port declarations in module header	2019-02-09 17:35:31 -05:00
Zachary Snow	8bd58e961f	Basic build setup!	2019-02-08 01:09:33 -05:00
Zachary Snow	b46009af53	Refactor project setup for our purposes	2019-02-08 00:19:39 -05:00
Zachary Snow	bfafea5dd8	Fix compiliation; trailing whitespace; added .gitignore	2019-02-07 23:58:34 -05:00
Zachary Snow	363ca80af2	Initial commit: fork of https://github.com/tomahawkins/verilog	2019-02-07 23:49:12 -05:00