mirror of https://github.com/zachjs/sv2v.git
cleanup of port decl parsing
This commit is contained in:
Zachary Snow
parent
ebd7ae67b1
commit
5b336439fb
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@ -5,6 +5,7 @@ import Data.Bits
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import Data.List
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import Data.BitVec
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import Data.Maybe
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import Language.SystemVerilog.AST
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import Language.SystemVerilog.Parser.Tokens
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}
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@ -151,62 +152,56 @@ string { Token Lit_string _ _ }
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%%
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opt(p) :: { Maybe a }
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: p { Just $1 }
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| { Nothing }
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Modules :: { [Module] }
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: { [] }
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| Modules Module { $1 ++ [$2] }
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: {- empty -} { [] }
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| Modules Module { $1 ++ [$2] }
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Module :: { Module }
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: "module" Identifier ModulePortList ";" ModuleItems "endmodule"{ Module $2 $3 $5 }
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| "module" Identifier ListOfPortDeclarations ";" ModuleItems "endmodule" { uncurry (Module $2) $ combinePortDeclsAndModuleItems $3 $5 }
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: "module" Identifier ";" ModuleItems "endmodule" { Module $2 [] $4 }
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| "module" Identifier PortNames ";" ModuleItems "endmodule" { Module $2 $3 $5 }
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| "module" Identifier PortDecls ";" ModuleItems "endmodule" { Module $2 (getPortNames $3) ($3 ++ $5) }
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Identifier :: { Identifier }
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: simpleIdentifier { tokenString $1 }
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| escapedIdentifier { tokenString $1 }
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| systemIdentifier { tokenString $1 }
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: simpleIdentifier { tokenString $1 }
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| escapedIdentifier { tokenString $1 }
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| systemIdentifier { tokenString $1 }
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ModulePortList :: { [Identifier] }
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: { [] }
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| "(" ")" { [] }
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| "(" ModulePortList1 ")" { $2 }
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Identifiers :: { [Identifier] }
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: Identifier { [$1] }
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| Identifiers "," Identifier { $1 ++ [$3] }
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ModulePortList1 :: { [Identifier] }
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: Identifier { [$1] }
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| ModulePortList1 "," Identifier { $1 ++ [$3] }
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PortNames :: { [Identifier] }
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: "(" Identifiers ")" { $2 }
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-- abuses delimiter propogation hack to avoid conflicts
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PortDecls :: { [ModuleItem] }
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: "(" PortDeclsFollow { $2 }
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PortDeclsFollow :: { [ModuleItem] }
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: ")" { [] }
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| PortDecl(")") { $1 }
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| PortDecl(",") PortDeclsFollow { $1 ++ $2 }
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PortDecl(delim) :: { [ModuleItem] }
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: "inout" opt(NetType) opt(Range) Identifiers delim { portDeclToModuleItems Inout $2 $3 (zip $4 (repeat Nothing)) }
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| "input" opt(NetType) opt(Range) Identifiers delim { portDeclToModuleItems Input $2 $3 (zip $4 (repeat Nothing)) }
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| "output" opt(NetType) opt(Range) Identifiers delim { portDeclToModuleItems Output $2 $3 (zip $4 (repeat Nothing)) }
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| "output" "reg" opt(Range) VariablePortIdentifiers delim { portDeclToModuleItems Output (Just Reg) $3 $4 }
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VariablePortIdentifiers :: { [(Identifier, Maybe Expr)] }
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: VariablePortIdentifier { [$1] }
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| VariablePortIdentifiers "," VariablePortIdentifier { $1 ++ [$3] }
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VariablePortIdentifier :: { (Identifier, Maybe Expr) }
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: Identifier { ($1, Nothing) }
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| Identifier "=" Expr { ($1, Just $3) }
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ModuleItems :: { [ModuleItem] }
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: { [] }
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| ModuleItems ModuleItem { $1 ++ $2 }
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ListOfPortDeclarations
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: "(" PortDeclarations ")" { $2 }
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PortDeclarations
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: PortDeclaration { [$1] }
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| PortDeclaration2 PortDeclarations { $1 : $2 }
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PortDeclaration2 :: { (Direction, Either Type (Maybe Range), [(Identifier, Maybe Expr)]) }
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: "inout" opt(NetType) opt(Range) Identifiers "," { toPortDeclaration Inout $2 $3 $4 }
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| "input" opt(NetType) opt(Range) Identifiers "," { toPortDeclaration Input $2 $3 $4 }
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| "output" opt(NetType) opt(Range) Identifiers "," { toPortDeclaration Output $2 $3 $4 }
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| "output" "reg" opt(Range) VarPortIdentifiers "," { (Output, Left (Reg $3), $4) }
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PortDeclaration :: { (Direction, Either Type (Maybe Range), [(Identifier, Maybe Expr)]) }
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: "inout" opt(NetType) opt(Range) Identifiers { toPortDeclaration Inout $2 $3 $4 }
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| "input" opt(NetType) opt(Range) Identifiers { toPortDeclaration Input $2 $3 $4 }
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| "output" opt(NetType) opt(Range) Identifiers { toPortDeclaration Output $2 $3 $4 }
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| "output" "reg" opt(Range) VarPortIdentifiers { (Output, Left (Reg $3), $4) }
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VarPortIdentifiers :: { [(Identifier, Maybe Expr)] }
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: VarPortIdentifier { [$1] }
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| VarPortIdentifiers "," VarPortIdentifier { $1 ++ [$3] }
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VarPortIdentifier :: { (Identifier, Maybe Expr) }
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: Identifier { ($1, Nothing) }
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| Identifier "=" Expr { ($1, Just $3) }
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opt(p) : p { Just $1 }
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| { Nothing }
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NetType
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: "wire" { Wire }
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@ -218,7 +213,7 @@ MaybeTypeOrRange :: { Either Type (Maybe Range) }
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ModuleItem :: { [ModuleItem] }
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: "parameter" MaybeRange Identifier "=" Expr ";" { [Parameter $2 $3 $5] }
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| "localparam" MaybeRange Identifier "=" Expr ";" { [Localparam $2 $3 $5] }
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| PortDeclaration ";" { portDeclToModuleItems $1 }
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| PortDecl(";") { $1 }
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| "reg" MaybeRange WireDeclarations ";" { map (uncurry $ LocalNet $ Reg $2) $3 }
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| "wire" MaybeRange WireDeclarations ";" { map (uncurry $ LocalNet $ Wire $2) $3 }
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| "integer" Identifiers ";" { [Integer $2] }
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@ -228,10 +223,6 @@ ModuleItem :: { [ModuleItem] }
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| "always" "@" "(" Sense ")" Stmt { [Always (Just $4) $6] }
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| Identifier ParameterBindings Identifier Bindings ";" { [Instance $1 $2 $3 $4] }
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Identifiers :: { [Identifier] }
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: Identifier { [$1] }
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| Identifiers "," Identifier { $1 ++ [$3] }
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RegDeclarations :: { [(Identifier, Maybe Range)] }
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: Identifier MaybeRange { [($1, $2)] }
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| RegDeclarations "," Identifier MaybeRange { $1 ++ [($3, $4)] }
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@ -400,48 +391,32 @@ toNumber = number . tokenString
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| otherwise = error $ "Invalid number format: " ++ a
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toPortDeclaration
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portDeclToModuleItems
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:: Direction
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-> (Maybe ((Maybe Range) -> Type))
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-> Maybe Range
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-> [Identifier]
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-> (Direction, Either Type (Maybe Range), [(Identifier, Maybe Expr)])
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toPortDeclaration dir tfm mr ids =
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(dir, t, vals)
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where
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t =
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case tfm of
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Nothing -> Right mr
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Just tf -> Left (tf mr)
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vals = zip ids (repeat Nothing)
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portDeclToModuleItems :: (Direction, Either Type (Maybe Range), [(Identifier, Maybe Expr)]) -> [ModuleItem]
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portDeclToModuleItems (dir, Right r, l) =
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map (PortDecl dir r) $ map toIdentifier $ l
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where
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toIdentifier (x, Just _) = error "Incomplete port decl cannot have initialization"
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toIdentifier (x, Nothing) = x
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portDeclToModuleItems (dir, Left t, l) =
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foldr (++) [] $
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map toItems l
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where
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r = case t of
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Reg mr -> mr
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Wire mr -> mr
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toItems (x, e) =
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[ PortDecl dir r x
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, LocalNet t x e ]
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combinePortDeclsAndModuleItems
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:: [(Direction, Either Type (Maybe Range), [(Identifier, Maybe Expr)])]
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-> [(Identifier, Maybe Expr)]
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-> [ModuleItem]
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-> ([Identifier], [ModuleItem])
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combinePortDeclsAndModuleItems portDecls items =
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(declIdents, declItems ++ items)
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portDeclToModuleItems dir Nothing mr l =
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map (PortDecl dir mr) $ map toIdentifier $ l
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where
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declIdents = concat $ map (\(_, _, idsAndExprs) -> map fst idsAndExprs) portDecls
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declItems = concat $ map portDeclToModuleItems portDecls
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toIdentifier (x, Just _) = error "ParseError: Incomplete port decl cannot have initialization"
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toIdentifier (x, Nothing) = x
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portDeclToModuleItems dir (Just tf) mr l =
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concat $ map toItems l
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where
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toItems (x, e) =
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[ PortDecl dir mr x
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, LocalNet (tf mr) x e ]
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getPortNames :: [ModuleItem] -> [Identifier]
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getPortNames items =
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mapMaybe getPortName items
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where
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getPortName :: ModuleItem -> Maybe Identifier
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getPortName (PortDecl _ _ ident) = Just ident
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getPortName _ = Nothing
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}
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