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prjxray/fuzzers/005-tilegrid
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Paul Schulz 0d0116b6eb Makes minor documentation change. 
Signed-off-by: Paul Schulz <paul@mawsonlakes.org>
 		2019-02-03 00:59:43 +10:30
..
bram Refactor all existing tiles to fuzzer approach. 2019-01-27 08:20:48 -08:00
bram_block Refactor all existing tiles to fuzzer approach. 2019-01-27 08:20:48 -08:00
bram_int Make format. 2019-01-27 08:20:48 -08:00
clb Refactor all existing tiles to fuzzer approach. 2019-01-27 08:20:48 -08:00
clb_int Add INT tile fuzzers for CLB, IOB and BRAM tiles. 2019-01-27 08:20:48 -08:00
dsp Run make format. 2019-01-27 08:20:48 -08:00
dsp_int run make format. 2019-01-27 08:20:48 -08:00
fifo_int Add back INT propagation. 2019-01-27 16:17:31 -08:00
fuzzaddr tilegrid: fix multi regression 2019-01-09 23:29:21 +01:00
iob Expand tilegrid to entire grid. 2019-01-27 08:20:48 -08:00
iob_int Handle A7/K7/Z7 differences gracefully. 2019-01-27 22:30:53 -08:00
mmcm Handle A7/K7/Z7 differences gracefully. 2019-01-27 22:30:53 -08:00
monitor Add monitor bits to tilegrid. 2019-01-27 08:20:48 -08:00
pll tilegrid: pll/mmcm entire major address until resolved 2018-12-18 17:12:13 -08:00
ps7_int Handle A7/K7/Z7 differences gracefully. 2019-01-27 22:30:53 -08:00
Makefile Disable DSP INT fuzzer on kintex7. 2019-01-27 22:52:52 -08:00
README.md Makes minor documentation change. 2019-02-03 00:59:43 +10:30
add_tdb.py Remove some of the __future__.] 2019-01-28 12:54:36 -08:00
generate.py Refactor all existing tiles to fuzzer approach. 2019-01-27 08:20:48 -08:00
generate.sh introduce vivado wrapper 2018-12-28 19:05:49 +01:00
generate_full.py Remove some of the __future__.] 2019-01-28 12:54:36 -08:00
generate_tiles.tcl tcl: reformat existing code 2018-12-05 16:52:56 -08:00
top.v tilegrid: fix IBUF define 2018-12-04 20:59:37 -08:00
util.py Remove some of the __future__.] 2019-01-28 12:54:36 -08:00
util.tcl Expand tilegrid to entire grid. 2019-01-27 08:20:48 -08:00

README.md

Tilegrid Fuzzer

This fuzzer creates the tilegrid.json bitstream database. This database contains segment definitions including base frame address and frame offsets.

Example workflow for CLB

generate.tcl LOCs one LUT per segment column towards generating frame base addresses.

A reference bitstream is generated and then:

  • a series of bitstreams are generated each with one LUT bit toggled; then
  • these are compared to find a toggled bit in the CLB segment column; then
  • the resulting address is truncated to get the base frame address.

Finally, generate.py calculates the segment word offsets based on known segment column structure

Environment variables

XRAY_ROI

This environment variable must be set with a valid ROI. See database for example values

XRAY_ROI_FRAMES

This can be set to a specific value to speed up processing and reduce disk space If you don't know where your ROI is, just set to to include all values (0x00000000:0xfffffff)

XRAY_ROI_GRID_*

Optionally, use these as a small performance optimization:

  • XRAY_ROI_GRID_X1
  • XRAY_ROI_GRID_X2
  • XRAY_ROI_GRID_Y1
  • XRAY_ROI_GRID_Y2

These should, if unused, be set to -1, with this caveat:

WARNING: CLB test generates this based on CLBs but implicitly includes INT

Therefore, if you don't set an explicit XRAY_ROI_GRID_* it may fail if you don't have a CLB*_L at left and a CLB*_R at right.