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Handle A7/K7/Z7 differences gracefully. 

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
This commit is contained in:
Keith Rothman 2019-01-27 22:30:53 -08:00
parent da08dfb99f
commit 32b9da0d97
8 changed files with 60 additions and 57 deletions
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11
fuzzers/005-tilegrid/Makefile
View File

@ -3,8 +3,6 @@ BUILD_DIR=$(FUZDIR)/build
TILEGRID_TDB_DEPENDENCIES=
TILEGRID_TDB_DEPENDENCIES += iob/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += iob_int/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += mmcm/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += pll/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += monitor/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += bram/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += bram_block/build/segbits_tilegrid.tdb
@ -17,8 +15,12 @@ TILEGRID_TDB_DEPENDENCIES += fifo_int/build/segbits_tilegrid.tdb
GENERATE_FULL_ARGS=
ifeq (${XRAY_DATABASE}, zynq7)
# Zynq7 only
TILEGRID_TDB_DEPENDENCIES += ps7_int/build/segbits_tilegrid.tdb
GENERATE_FULL_ARGS += --int-tdb $(FUZDIR)/ps7_int/build/segbits_tilegrid.tdb
else
# Artix7/Kintex7 only
TILEGRID_TDB_DEPENDENCIES += pll/build/segbits_tilegrid.tdb
TILEGRID_TDB_DEPENDENCIES += mmcm/build/segbits_tilegrid.tdb
endif
database: build/tilegrid.json
@ -84,8 +86,7 @@ build/tilegrid_tdb.json: add_tdb.py $(TILEGRID_TDB_DEPENDENCIES)
build/tilegrid.json: generate_full.py build/tilegrid_tdb.json
cd build && python3 ${FUZDIR}/generate_full.py \
--json-in tilegrid_tdb.json --json-out ${BUILD_DIR}/tilegrid.json \
${GENERATE_FULL_ARGS}
--json-in tilegrid_tdb.json --json-out ${BUILD_DIR}/tilegrid.json
run:
$(MAKE) clean
$(MAKE) database

8
fuzzers/005-tilegrid/add_tdb.py
View File

@ -3,6 +3,7 @@
from __future__ import print_function
import json
import util as localutil
import os.path
def load_db(fn):
@ -13,7 +14,7 @@ def load_db(fn):
parts = l.split(' ')
tagstr = parts[0]
addrlist = parts[1:]
localutil.check_frames(addrlist)
localutil.check_frames(tagstr, addrlist)
# Take the first address in the list
frame, wordidx, bitidx = localutil.parse_addr(addrlist[0])
@ -67,9 +68,14 @@ def run(fn_in, fn_out, verbose=False):
("bram_int/build/segbits_tilegrid.tdb", int_frames, int_words),
("dsp_int/build/segbits_tilegrid.tdb", int_frames, int_words),
("fifo_int/build/segbits_tilegrid.tdb", int_frames, int_words),
("ps7_int/build/segbits_tilegrid.tdb", int_frames, int_words),
]
for (tdb_fn, frames, words) in tdb_fns:
if not os.path.exists(tdb_fn):
verbose and print('Skipping {}, file not found!'.format(tdb_fn))
continue
for (tile, frame, wordidx) in load_db(tdb_fn):
tilej = database[tile]
verbose and print("Add %s %08X_%03u" % (tile, frame, wordidx))

62
fuzzers/005-tilegrid/generate_full.py
View File

@ -28,26 +28,6 @@ def nolr(tile_type):
return tile_type
def load_tdb_baseaddr(database, int_tdb, verbose=False):
tdb_tile_baseaddrs = dict()
for line in open(int_tdb, 'r'):
line = line.strip()
parts = line.split(' ')
# INT_L_X0Y50.DWORD:0.DBIT:17.DFRAME:14
tagstr = parts[0]
# 00000914_000_17 00000918_000_17 ...
addrlist = parts[1:]
localutil.check_frames(addrlist)
frame = localutil.parse_addr(addrlist[0], get_base_frame=True)
tparts = tagstr.split('.')
# INT_L_X0Y50
tile = tparts[0]
assert tile in database.keys(), "Tile not in Database"
localutil.add_baseaddr(tdb_tile_baseaddrs, tile, frame, verbose)
return tdb_tile_baseaddrs
def make_tiles_by_grid(database):
# lookup tile names by (X, Y)
tiles_by_grid = dict()
@ -101,8 +81,8 @@ def propagate_INT_lr_bits(database, tiles_by_grid, verbose=False):
assert 0
localutil.add_tile_bits(
other_tile, database[other_tile], baseaddr, offset,
int_frames, int_words)
other_tile, database[other_tile], baseaddr, offset, int_frames,
int_words)
def propagate_INT_bits_in_column(database, tiles_by_grid):
@ -142,13 +122,16 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
next_tile_type = database[next_tile]['type']
if tile['bits']['CLB_IO_CLK']['offset'] == 0:
assert next_tile_type in ['B_TERM_INT', 'BRKH_INT', 'BRKH_B_TERM_INT'], next_tile_type
assert next_tile_type in [
'B_TERM_INT', 'BRKH_INT', 'BRKH_B_TERM_INT'
], next_tile_type
break
baseaddr = int(tile['bits']['CLB_IO_CLK']['baseaddr'], 0)
offset = tile['bits']['CLB_IO_CLK']['offset']
if tile['type'].startswith('INT_') and next_tile_type == tile['type']:
if tile['type'].startswith(
'INT_') and next_tile_type == tile['type']:
# INT next to INT
offset -= int_words
localutil.add_tile_bits(
@ -156,7 +139,8 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
int_frames, int_words)
elif tile['type'].startswith('INT_'):
# INT above HCLK
assert next_tile_type.startswith('HCLK_{}'.format(l_or_r)), next_tile_type
assert next_tile_type.startswith(
'HCLK_{}'.format(l_or_r)), next_tile_type
offset -= hclk_words
localutil.add_tile_bits(
@ -164,7 +148,8 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
hclk_frames, hclk_words)
else:
# HCLK above INT
assert tile['type'].startswith('HCLK_{}'.format(l_or_r)), tile['type']
assert tile['type'].startswith(
'HCLK_{}'.format(l_or_r)), tile['type']
if next_tile_type == 'INT_{}'.format(l_or_r):
offset -= int_words
localutil.add_tile_bits(
@ -175,7 +160,6 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
assert next_tile_type in ['PCIE_NULL'], next_tile_type
break
tile_name = next_tile
tile = database[tile_name]
@ -187,13 +171,16 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
next_tile_type = database[next_tile]['type']
if tile['bits']['CLB_IO_CLK']['offset'] == 99:
assert next_tile_type in ['T_TERM_INT', 'BRKH_INT', 'BRKH_TERM_INT'], next_tile_type
assert next_tile_type in [
'T_TERM_INT', 'BRKH_INT', 'BRKH_TERM_INT'
], next_tile_type
break
baseaddr = int(tile['bits']['CLB_IO_CLK']['baseaddr'], 0)
offset = tile['bits']['CLB_IO_CLK']['offset']
if tile['type'].startswith('INT_') and next_tile_type == tile['type']:
if tile['type'].startswith(
'INT_') and next_tile_type == tile['type']:
# INT next to INT
offset += int_words
localutil.add_tile_bits(
@ -201,7 +188,8 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
int_frames, int_words)
elif tile['type'].startswith('INT_'):
# INT below HCLK
assert next_tile_type.startswith('HCLK_{}'.format(l_or_r)), next_tile_type
assert next_tile_type.startswith(
'HCLK_{}'.format(l_or_r)), next_tile_type
offset += int_words
localutil.add_tile_bits(
@ -209,8 +197,10 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
hclk_frames, hclk_words)
else:
# HCLK below INT
assert tile['type'].startswith('HCLK_{}'.format(l_or_r)), tile['type']
assert next_tile_type == 'INT_{}'.format(l_or_r), next_tile_type
assert tile['type'].startswith(
'HCLK_{}'.format(l_or_r)), tile['type']
assert next_tile_type == 'INT_{}'.format(
l_or_r), next_tile_type
offset += hclk_words
localutil.add_tile_bits(
@ -221,7 +211,7 @@ def propagate_INT_bits_in_column(database, tiles_by_grid):
tile = database[tile_name]
def run(json_in_fn, json_out_fn, int_tdb=None, verbose=False):
def run(json_in_fn, json_out_fn, verbose=False):
# Load input files
database = json.load(open(json_in_fn, "r"))
tiles_by_grid = make_tiles_by_grid(database)
@ -246,13 +236,9 @@ def main():
help="Input .json without addresses")
parser.add_argument(
"--json-out", default="tilegrid.json", help="Output JSON")
parser.add_argument(
"--int-tdb",
default=None,
help=".tdb diffs to fill the interconnects without any adjacent CLB")
args = parser.parse_args()
run(args.json_in, args.json_out, args.int_tdb, verbose=args.verbose)
run(args.json_in, args.json_out, verbose=args.verbose)
if __name__ == "__main__":

13
fuzzers/005-tilegrid/iob_int/top.py
View File

@ -32,7 +32,10 @@ def gen_sites():
if len(sites) == 0:
continue
sites_y = [int(re.match('IDELAY_X[0-9]+Y([0-9]+)', site).group(1)) for site in sites]
sites_y = [
int(re.match('IDELAY_X[0-9]+Y([0-9]+)', site).group(1))
for site in sites
]
sites, _ = zip(*sorted(zip(sites, sites_y), key=lambda x: x[1]))
@ -52,8 +55,12 @@ def gen_sites():
pad_gridinfo = grid.gridinfo_at_loc((pad_grid_x, loc.grid_y))
pad_sites = pad_gridinfo.sites.keys()
pad_sites_y = [int(re.match('IOB_X[0-9]+Y([0-9]+)', site).group(1)) for site in pad_sites]
pad_sites, _ = zip(*sorted(zip(pad_sites, pad_sites_y), key=lambda x: x[1]))
pad_sites_y = [
int(re.match('IOB_X[0-9]+Y([0-9]+)', site).group(1))
for site in pad_sites
]
pad_sites, _ = zip(
*sorted(zip(pad_sites, pad_sites_y), key=lambda x: x[1]))
if not gridinfo.tile_type.endswith("_SING"):
int_tile_locs.append((int_grid_x, loc.grid_y - 1))

2
fuzzers/005-tilegrid/mmcm/top.py
View File

@ -47,7 +47,7 @@ module top(input clk, stb, di, output do);
# FIXME: can't LOC?
# only one for now, worry about later
sites = list(gen_sites())
assert len(sites) == 1
assert len(sites) == 1, len(sites)
for (tile_name, site_name), isone in zip(sites,
util.gen_fuzz_states(len(sites))):
# 0 is invalid

1
fuzzers/005-tilegrid/ps7_int/top.py
View File

@ -2,7 +2,6 @@ import os
import random
random.seed(int(os.getenv("SEED"), 16))
from prjxray import util
from prjxray import verilog
def write_params(params):

4
fuzzers/005-tilegrid/util.py
View File

@ -6,12 +6,12 @@ Local utils script to hold shared code of the 005-tilegrid fuzzer scripts
'''
def check_frames(addrlist):
def check_frames(tagstr, addrlist):
frames = set()
for addrstr in addrlist:
frame = parse_addr(addrstr, get_base_frame=True)
frames.add(frame)
assert len(frames) == 1, ("More than one base address", map(hex, frames))
assert len(frames) == 1, ("{}: More than one base address".format(tagstr), map(hex, frames))
def parse_addr(line, only_frame=False, get_base_frame=False):

16
utils/tilegrid_report.py
View File

@ -26,13 +26,17 @@ def main():
total_tile_count = 0
total_have_bits = 0
for tile_type, tiles in sorted(tile_types.items()):
tile_type_info = db.get_tile_type(tile_type)
# Skip empty tiles, as no base address is requied.
if len(tile_type_info.get_pips()) == 0 and len(
tile_type_info.get_sites()) == 0:
continue
for tile_type, tiles in sorted(tile_types.items()):
try:
tile_type_info = db.get_tile_type(tile_type)
# Skip empty tiles, as no base address is requied.
if len(tile_type_info.get_pips()) == 0 and len(
tile_type_info.get_sites()) == 0:
continue
except KeyError:
pass
# INT_INTERFACE tiles likely don't contain configuration? Remove this
# if this ends up false.