prjxray/fuzzers
Dr Jonathan Richard Robert Kimmitt afb49cca01 fuzzers/036-iob18-ologic-sing: SING-row IOB18 OLOGIC segbits
A SING-row sibling of 036-iob18-ologic.  The parent fuzzer filters
to IOB18S / IOB18M (diff-pair main / secondary), leaving the IOB18
site type in *_SING tiles uncharacterised.  This fuzzer's filter
is the complement: only the IOB18 site type, only in *_SING
tiles.  Pushes to lioi_sing / rioi_sing via the two new mergedb
modes.

utils/mergedb.sh: add the two missing modes.  The captured
specimens emit LIOI_SING. and RIOI_SING. entries in the same
file; the new cases grep each side into its own merge target so
the existing segbits_lioi_sing.db / segbits_rioi_sing.db are
populated symmetrically without needing to refactor the fuzzer
into two passes.

Note: the SING-tile frame layout has 2 words (offsets 99..100),
so OLOGIC features at word offsets 30+ within the regular LIOI
tile cannot be straightforwardly mirrored.  The 10 features the
fuzzer captures (ZINV_CLK, ODDR/OSERDES SRTYPE/TSRTYPE, OSERDES
DATA_WIDTH variants) all land within the SING tile's two-word
window.  The OMUX.D1 / OQUSED / OSERDES.DATA_RATE_TQ.BUF features
nextpnr-xilinx emits for transparent OBUF route-thrus on V7
SING-row IOBs (VC707 led[?] @ LIOI_SING_X82Y51) still need a
separate solution -- they likely live in an aliased frame
through the neighbouring full LIOI tile.  Tracking that as a
separate follow-up.
2026-06-04 14:13:02 +01:00
..
000-init-db add support for the kintex high performance banks 2024-01-08 14:00:20 +07:00
001-part-yaml Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
005-tilegrid 005-tilegrid: propagate SING bits for HP-only LIOB18 / LIOI columns 2026-05-30 16:02:48 +01:00
007-timing Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
010-clb-lutinit Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
011-clb-ffconfig Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
012-clb-n5ffmux Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
013-clb-ncy0 Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
014-clb-ffsrcemux Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
015-clb-nffmux Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
016-clb-noutmux Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
017-clb-precyinit Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
018-clb-ram virtex7: enable 018-clb-ram (LUTRAM/SRL) — was misdiagnosed as Vivado-version wall 2026-05-27 14:27:08 +01:00
019-clb-ndi1mux Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
025-bram-config Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
026-bram-data Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
027-bram36-config Fix new BRAM36 features. 2020-10-28 13:44:49 -07:00
028-fifo-config Add license headers to tcl files 2020-05-26 07:33:12 -07:00
029-bram-fifo-config Add license headers to tcl files 2020-05-26 07:33:12 -07:00
030-iob Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
030-iob18 virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
031-cmt-mmcm mmcm, pll: use full name for MMCM, and PLL sites 2021-02-26 17:04:03 +01:00
032-cmt-pll mmcm, pll: use full name for MMCM, and PLL sites 2021-02-26 17:04:03 +01:00
033-mon-xadc Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
034-cmt-pll-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
034b-cmt-mmcm-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
035-iob-ilogic Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
035a-iob-idelay Add license headers to tcl files 2020-05-26 07:33:12 -07:00
035a-iob18-idelay virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
035a-iob18-odelay virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
035b-iob-iserdes Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
036-iob-ologic Fix duplicate feature ZBUF and TDDR.SRUSED. 2020-10-02 19:08:36 -07:00
036-iob18-ologic fix obvious issues in 035a-iob18-idelay/bits.dbf and 036-iob18-ologic/bits.dbf 2024-01-08 14:00:20 +07:00
036-iob18-ologic-sing fuzzers/036-iob18-ologic-sing: SING-row IOB18 OLOGIC segbits 2026-06-04 14:13:02 +01:00
037-iob-pips Add license headers to tcl files 2020-05-26 07:33:12 -07:00
037-iob18-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
038-cfg virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
038-cfg-startup add basic fuzzer for STARTUPE2 2024-01-08 14:00:21 +07:00
039-hclk-config virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
040-clk-hrow-config Add license headers to tcl files 2020-05-26 07:33:12 -07:00
041-clk-hrow-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
042-clk-bufg-config Add license headers to tcl files 2020-05-26 07:33:12 -07:00
043-clk-rebuf-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
044-clk-bufg-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
045-hclk-cmt-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
046-clk-bufg-muxed-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
047-hclk-ioi-pips Add license headers to tcl files 2020-05-26 07:33:12 -07:00
047-hclk-ioi18-pips update copyright year for io*18 fuzzers 2024-01-08 14:00:20 +07:00
047a-hclk-idelayctrl-pips virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
048-int-piplist Add licensing header to Makefiles 2020-05-26 07:33:12 -07:00
049-int-imux-gfan Add license headers to tcl files 2020-05-26 07:33:12 -07:00
050-pip-seed Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
051-pip-imuxlout-bypalts Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
052-pip-clkin Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
053-pip-ctrlin virtex7: 053-pip-ctrlin / 055-pip-gnd — 2*N tile reservation 2026-05-27 14:27:08 +01:00
054-pip-fan-alt Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
055-pip-gnd virtex7: 053-pip-ctrlin / 055-pip-gnd — 2*N tile reservation 2026-05-27 14:27:08 +01:00
056-pip-rem Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
057-pip-bi Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
058-pip-hclk Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
059-pip-byp-bounce Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
060-bram-cascades Add license headers to tcl files 2020-05-26 07:33:12 -07:00
061-pcie-conf cells_data: add clock information on ports.json 2021-03-26 13:47:38 +01:00
062-pcie-int-pips 062-pcie-int-pips: add fuzzer to document PCIE_INT_INTERFACE DELAY PIPs 2021-02-05 19:18:35 +01:00
063-gtp-common-conf cells_data: add clock information on ports.json 2021-03-26 13:47:38 +01:00
063-gtx-common-conf fix 063-gtx-common-conf/attrs.json 2025-04-03 04:52:08 +07:00
064-gtp-channel-conf 064-gtp-channel: fix width of [TR]XOUT_DIV attributes 2021-03-26 13:47:38 +01:00
064-gtx-channel-conf fix 064-gtx-channel-conf/attrs.json 2025-04-02 05:38:24 +07:00
065-gtp-common-pips fuzzers: fix clean in parts fuzzers 2022-03-03 12:50:33 +01:00
065b-gtp-common-pips 065b-gtp-pips: increase iter timeout 2022-03-07 14:57:31 +01:00
066-gtp-int-pips 066-gtp-int-pips: add fuzzer for GTP_INT_INTERFACE DELAY PIPs 2021-02-04 12:35:00 +01:00
071-ppips Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
072-ordered_wires fuzzers: fix clean in parts fuzzers 2022-03-03 12:50:33 +01:00
073-get_counts fuzzers: fix clean in parts fuzzers 2022-03-03 12:50:33 +01:00
074-dump_all virtex7: HP-bank glue codified end-to-end + open-flow validation 2026-05-29 10:13:53 +01:00
075-pins fuzzers: fix clean in parts fuzzers 2022-03-03 12:50:33 +01:00
076-ps7 Add license headers to tcl files 2020-05-26 07:33:12 -07:00
100-dsp-mskpat Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
101-dsp-pips 101-dsp-pips: solve DSP-related PIPs 2021-02-15 13:15:44 +01:00
piplist Add Virtex-7 (xc7vx485t) family support 2026-05-24 07:21:23 +01:00
.gitignore fuzzers: consolidate common gitignores 2018-12-19 18:56:32 -08:00
Makefile virtex7: enable 018-clb-ram (LUTRAM/SRL) — was misdiagnosed as Vivado-version wall 2026-05-27 14:27:08 +01:00
clb.mk 012-clb-d5ff: increased specimens and added c argument 2019-02-15 16:16:41 +01:00
clb_ext.mk Added a makefile which allows to fuzz features for both SLICEM and SLICEL but separate them during database merge. 2019-07-10 15:06:58 +02:00
fuzzer.mk Add left and right clock pips. 2019-02-11 09:59:09 -08:00
int_create_empty_db.sh Add licensing header to bash scripts 2020-05-26 07:33:12 -07:00
int_generate.py Add licensing header to fuzzers' python scripts 2020-05-26 07:33:12 -07:00
int_loop.mk fuzzers: Fix including Makefiles. 2019-01-31 18:24:33 -08:00
int_loop.sh pip fuzzers: enable part specific builds 2021-02-02 19:35:23 +01:00
int_loop_check.py Add licensing header to fuzzers' python scripts 2020-05-26 07:33:12 -07:00
int_maketodo.py Add initial MMCM feature and PIP support. 2020-10-08 17:44:42 -07:00
pip_list.mk Fix 048 not using correct directory. 2019-03-12 10:47:27 -07:00
pip_loop.mk pip fuzzers: enable part specific builds 2021-02-02 19:35:23 +01:00
reseg.sh Add licensing header to bash scripts 2020-05-26 07:33:12 -07:00
run_fuzzer.py run_fuzzer: replace semicolon with dash in stderr and stdout names 2022-02-03 18:14:58 +01:00