Commit Graph

2206 Commits

Author SHA1 Message Date
litghost 8cb7366fa2
Merge pull request #835 from antmicro/bel-timings-fixes
BEL timings fixes
2019-05-20 10:38:28 -07:00
Karol Gugala 683b7562e5 fuzzer: 007: bel: handle multiple bit inputs
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-05-16 19:14:35 +02:00
Karol Gugala e1440a56b4 fuzzers: 007: add properties names mappings
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-05-16 14:52:58 +02:00
Karol Gugala 8d4a94d367 sdfmerge: emit only the selected instance of the merged cell
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-05-14 17:34:07 -07:00
Karol Gugala 757b4bea0c utils: makesdf: set timescale to 1ns
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-05-14 17:34:07 -07:00
Karol Gugala 788e3e0855 fuzzers: 007: correctly handle input clocks and extended pin names
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-05-14 17:34:07 -07:00
Tim Ansell 6e895f39c0
Merge pull request #836 from antmicro/sdf-sort
utils: makesdf: sort the output
2019-05-14 17:24:43 -07:00
Karol Gugala e5d2a65f0a utils: makesdf: sort the output
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-05-14 21:18:24 +02:00
Tomasz Michalak e7ce84abbe
Merge pull request #822 from antmicro/prjxray_stabilization_045_hclk_cmt_pips
045-hclk-cmt-pips: account for hclk_cmt tiles missing from zynq7 and …
2019-05-14 11:52:47 +02:00
Tomasz Michalak a0fcbca034
Merge pull request #829 from antmicro/prjxray_stabilization_056_pip_rem
056-pip-rem: Delete net and cell after unsuccessful routing attempt
2019-05-14 09:21:23 +02:00
Tomasz Michalak c4e062fa6e 053-pip-ctrlin: increase specimen count
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-13 22:25:43 +02:00
Tim Ansell cae06c4149
Merge pull request #827 from SymbiFlow/dependabot/submodules/third_party/abseil-cpp-0cbdc77
Build(deps): Bump third_party/abseil-cpp from `cd86d0d` to `0cbdc77`
2019-05-13 09:26:12 -07:00
Tim Ansell 4b20a95fa0
Merge pull request #828 from SymbiFlow/dependabot/submodules/third_party/googletest-5299815
Build(deps): Bump third_party/googletest from `61cdca5` to `5299815`
2019-05-13 09:25:37 -07:00
Tomasz Michalak fe809d7d0d 045-hclk-cmt-pips: increase specimen count
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-13 10:17:35 +02:00
dependabot[bot] 99f87c4022
Build(deps): Bump third_party/googletest from `61cdca5` to `5299815`
Bumps [third_party/googletest](https://github.com/google/googletest) from `61cdca5` to `5299815`.
- [Release notes](https://github.com/google/googletest/releases)
- [Commits](61cdca569b...5299815377)

Signed-off-by: dependabot[bot] <support@dependabot.com>
2019-05-11 05:13:19 +00:00
dependabot[bot] 972f683d17
Build(deps): Bump third_party/abseil-cpp from `cd86d0d` to `0cbdc77`
Bumps [third_party/abseil-cpp](https://github.com/abseil/abseil-cpp) from `cd86d0d` to `0cbdc77`.
- [Release notes](https://github.com/abseil/abseil-cpp/releases)
- [Commits](cd86d0d20a...0cbdc774b9)

Signed-off-by: dependabot[bot] <support@dependabot.com>
2019-05-11 05:12:59 +00:00
Tomasz Michalak 7e05327c97 056-pip-rem: Delete net and cell after unsuccessful routing attempt
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-10 11:14:10 +02:00
litghost 02026c2d8b
Merge pull request #821 from litghost/timing_model_objects
Add objects and docstrings for timing model.
2019-05-09 14:39:58 -07:00
Keith Rothman cf84dfe2fd Fix some comments.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-09 14:20:03 -07:00
Tomasz Michalak fbeb731562
Merge pull request #493 from mithro/fuzzers2testxml
Make most of the fasm2frames.py tests pass again.
2019-05-09 13:36:42 +02:00
Tomasz Michalak 70a4bf1d7c
Merge pull request #675 from mithro/small-fuzzer-improvement
Small updates to fuzzer output.
2019-05-09 11:45:04 +02:00
Tim 'mithro' Ansell 636db487c8 Attempting to make fasm2frames.py tests pass again.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-05-09 09:56:54 +02:00
Tomasz Michalak b5a4e6932e run_fuzzer.py: Adjust unit names output by free tool
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-09 09:33:22 +02:00
Tomasz Michalak 894a629767
Merge pull request #510 from antmicro/clean-db
utils: add cleandb tool
2019-05-08 10:18:35 +02:00
Tim 'mithro' Ansell fbec529926 Less verbose memory usage info.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-05-08 10:09:45 +02:00
Tim 'mithro' Ansell 1ca3f55b05 Fix doctest for Logger.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-05-08 10:09:45 +02:00
Tomasz Michalak 64c0a3c0b4
Merge pull request #824 from antmicro/043-clk-rebuf-pips-zynq
Resolve missing CLK_REBUF PIPs bits for Zynq
2019-05-08 07:55:02 +02:00
Tomasz Michalak f93ae0a3d2
Merge pull request #823 from antmicro/030-iob-zynq
Resolve missing IOB bits for Zynq
2019-05-08 07:54:31 +02:00
Keith Rothman 3838a643cf Fix spelling.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-07 15:55:27 -07:00
Keith Rothman b5b9efe29a Update units to reflect actually constraint.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-07 14:45:08 -07:00
Keith Rothman af8c1884d4 Run make format.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-07 12:37:14 -07:00
Keith Rothman b14952e1da Add example timing tree.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-07 12:12:36 -07:00
Keith Rothman 64798087b1 Complete documentation for new timing model.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-07 10:57:35 -07:00
Tomasz Michalak af50a5f32a 043-clk-rebuf-pips: increase the number of specimen
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-07 15:58:53 +02:00
Tomasz Michalak c094640034 030-iob: don't create liob segbits file for zynq
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-07 13:53:17 +02:00
Tomasz Michalak 9bf9d4e0fd 030-iob: skip broken tile for zynq
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-07 13:36:50 +02:00
Tomasz Michalak 845a8914b3 045-hclk-cmt-pips: account for hclk_cmt tiles missing from zynq7 and re-enable fuzzer
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-05-07 08:34:18 +02:00
Keith Rothman 2f74b8a508 Add initial object and docstrings for timing model.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-05-06 12:27:41 -07:00
Tim Ansell 27bba88fc8
Merge pull request #810 from mithro/import-wiki
Fixing issues from wiki import
2019-04-29 09:30:05 -07:00
Tim Ansell 938f3788e8
Merge pull request #706 from antmicro/bel-timing
fuzzers: Adding BEL timing fuzzer
2019-04-29 09:16:18 -07:00
litghost 7750e38b3e
Merge pull request #789 from antmicro/prjxray_stabilization_054_pip_fan_alt
054-pip-fan-alt: add BYP_ALT.GFAN PIPs calculation to fuzzer
2019-04-29 07:43:08 -07:00
Tomasz Michalak c91ca7cf7f 054-pip-fan-alt: add solution of BYP_ALT.GFAN PIPs
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-04-29 08:05:08 +02:00
Tim 'mithro' Ansell 85060dd1d6 Fix the INT references.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-04-28 19:05:53 -07:00
Tim 'mithro' Ansell 4473789694 fuzzers: Disable timing fuzzer on Kintex.
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
2019-04-28 18:53:51 -07:00
Karol Gugala 1952b3df75 fuzzers: 007: create run.ok file
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-04-28 18:53:06 -07:00
Karol Gugala 634ca791c7 fuzzers: 007: bel: merge slicel and slicem timigs
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-04-28 18:53:06 -07:00
Karol Gugala 588be1c62a utils: sdfmerge: write ouptput sdf file
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-04-28 18:53:06 -07:00
Karol Gugala 901e64ed83 third_party: bump pyhthon-sdf-timing
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-04-28 18:53:06 -07:00
Karol Gugala 7154cfcf61 fuzzers: add timing fuzzer to global makefile
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-04-28 18:53:06 -07:00
Karol Gugala 69cc63ea81 utils: add sdfmerge tool
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-04-28 18:53:06 -07:00