Commit Graph

99 Commits

Author SHA1 Message Date
nulltek 9aa0e72afb
Add Support for Xilinx Artix-7 a25t (xc7a25t) 2023-04-07 17:33:16 +12:00
Maik Ender 4161c79920
Add Support for Xilinx KCU116 (#322)
* initial kcu116 support

* add kintex ultrascale plus family to xilinx.cpp

* add docs

* combine xcku and xcvu check

* rebuild bitstream for -1 speedgrade
2023-03-09 20:48:19 +01:00
AEW2015 fe0f0ac0c0 Artix+ AU25P support for Opal Kelly Board 2023-02-28 14:24:49 -07:00
Gwenhael Goavec-Merou 6799115451 parts: fix Efinix titanium irlen 2023-02-26 10:02:26 +01:00
Jiajie Chen f54781471b Add initial support for VCU128 2023-02-19 18:39:14 +08:00
Bastian Löher 8e20f1eb7d Fix typo in part name and family. 2023-02-15 15:06:02 +01:00
Gwenhael Goavec-Merou 2c7334cc35 src/part: add LCMXO2-256HC, update doc/FPGAs 2023-02-08 20:18:04 +01:00
Bastian Löher b93862bd65 Sort. 2023-02-08 14:08:45 +01:00
Bastian Löher d4095ddb93 Add ID code for part xa2c64a (Coolrunner-II). 2023-02-08 14:05:45 +01:00
Olivier Galibert 5a00f0d184 part: Add all cyclone V variant
board: Add the Terasic C5G
2023-01-29 15:35:47 +01:00
Ricardo Barbedo e5481787d8 Fix VCU118 board part name and IR length 2023-01-21 14:45:50 +01:00
Marcus Andrade 67563983f9 feat(board): add support for Terasic DE10-Lite 2023-01-09 15:52:54 -06:00
Marcus Andrade 14fce33109 feat(board): add support for Arrow/Terasic DECA 2023-01-04 13:11:21 -06:00
Gwenhael Goavec-Merou 751b057596 parts: Intel MAX10 (10M08) 2023-01-04 18:53:25 +01:00
Marcus Andrade 0591af56b7 feat(board): add support for Trenz C10LP-RefKit 2022-12-25 15:53:45 -06:00
Ricardo Barbedo 0855efb29f Add initial support for the VCU118 board 2022-12-11 22:11:50 +01:00
Maciej Nowak 5f7d4d2078 Add Xilinx Kintex UltraScale KCU035 IDCode 2022-08-18 15:25:09 +02:00
Gwenhael Goavec-Merou e278b87a64
Merge pull request #236 from Icenowy/gw2a
Add GW2A support
2022-06-16 07:06:41 +02:00
Icenowy Zheng 3e00756976 part: add GW2A(R)-18(C)
Add JTAG ID code for GW2A(R)-18(C), tested with GW2A-18C on Sipeed Tang
Primer 20K.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-06-16 09:54:02 +08:00
Icenowy Zheng 37dbaba6b8 part: add EP4CE115
Altera EP4CE115 is a part from Cyclone IV E line.

Add it to the part database.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2022-06-16 08:52:32 +08:00
Xiretza ee3b6965f0 fix(part.hpp): use uint32_t instead of int for fpga_list index
This resulted in an error with GCC 12:

In file included from src/main.cpp:29:
src/part.hpp:148:1: error: narrowing conversion of ‘2165379139’ from ‘unsigned int’ to ‘int’ [-Wnarrowing]
  148 | };
      | ^
2022-05-14 15:36:02 +02:00
Mike Lewis 76f13604d1 Add initial support for ZCU106 development board 2022-05-14 02:48:23 -06:00
Hans Baier 6a2a62cae6 support Kintex XC7K420T 2022-05-10 13:07:47 +07:00
Gwenhael Goavec-Merou b12d174131 part: add 5CEBA9 entry (issue #213) 2022-04-11 19:14:58 +02:00
Gwenhael Goavec-Merou 285cbde7f4 part: explictly add spartan3e and xc3s250e 2022-04-02 11:52:58 +02:00
Sylvain Munaut 7a5284212b part: Add support for Kintex Ultrascale XCKU040
Signed-off-by: Sylvain Munaut <tnt@asuka.home.246tnt.com>
2022-03-29 10:40:52 +02:00
Sylvain Munaut 6578bed6aa part: Add support for ZynqMP Ultrascale Plus XCZU11EG
Signed-off-by: Sylvain Munaut <tnt@asuka.home.246tnt.com>
2022-03-29 10:40:38 +02:00
Gwenhael Goavec-Merou 27f0ff2816
Merge pull request #205 from rstephan/spartan3e
Spartan3E (xc3s500evq100) and Papilio One
2022-03-28 18:37:43 +02:00
Stephan Ruloff 6da87c3d24 xc3s500e IDCODE: revision set to zero. 2022-03-28 18:14:25 +02:00
Steven Koo 8b6b09ea25 part: Add kintex7 variant xc7k410t 2022-03-28 10:43:11 -05:00
Gwenhael Goavec-Merou da3dfff609 part: re-adding version nibble to remove ambiguities between U, UM and UM5G 2022-03-27 07:47:38 +02:00
Stephan Ruloff b60f37b56d Support for the Papilio One board 2022-03-25 21:44:05 +01:00
Jean THOMAS 80e917fcf1 Use uint32_t for misc_dev_list (fixes #196) 2022-03-19 12:13:07 +01:00
Gwenhael Goavec-Merou 8d3310d486 part: ZynqMPSoC XCZU9EG 2022-03-19 10:06:44 +01:00
Stéphane Chevigny ee08b1ac39 add Cyclone V 5CEFA5 in part database 2022-03-11 14:01:50 -05:00
Gwenhael Goavec-Merou 6ba1968952 part: Zynq XC7Z045 2022-03-10 18:53:12 +01:00
Gwenhael Goavec-Merou 75e3d82a92 part: xc6slx150T 2022-03-03 15:37:18 +01:00
TG d188314ae3 part: add altera 5CSEMA5 (cyclone V Soc) 2022-02-09 17:21:19 +01:00
Gwenhael Goavec-Merou 0a43d1b797 part: add map manufacturer id <-> name 2022-02-09 08:32:06 +01:00
Verneri Hirvonen 977900954e part: add GW1NZ-1 2022-01-27 22:55:21 +02:00
Icenowy Zheng dc4a454b94 gowin: add support for GW1NR-9C
GW1NR-9C has a different idcode with GW1NR-9.

Add support for it by adding the idcode.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2022-01-22 20:49:35 +08:00
Karol Gugala dbc6551a3c part: add Kintex 160T
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2022-01-14 09:01:23 +01:00
Gwenhael Goavec-Merou 904bf46315 part: adding zynqmp xczu2cg idcode 2022-01-13 08:48:53 +01:00
Gwenhael Goavec-Merou ee7570b251 zynq xc7z010 support 2021-12-20 18:09:52 +01:00
Franck Jullien bae403c3a9 efinix/titanium: add missing JTAG idcode 2021-12-14 09:16:08 +01:00
Patrick Urban 1c91928175
Merge branch 'master' into colognechip/gatemate 2021-12-13 10:18:41 +01:00
Patrick Urban e252e713dd colognechip integration: apply review remarks
* add missing #include <string>
* add comment to part.hpp why highest nibble should be kept
* remove _reverseOrder variable from colognechipCfgParser.{hpp,cpp}
* rename cfgDone() to to a more meaningfull waitCfgDone()
2021-12-12 11:55:10 +01:00
Icenowy Zheng bc610383cd part: add support for Anlogic ELF2 EF2M45
Anlogic EF2M45 is a FPGA with a co-packaged 4Mbit SPI Flash, and the
JTAG interface is the same with EG4S20.

Add support for it by adding it to the part database.

SPI Flash programming and SRAM programming are both tested.

The support of EF2M45 is also documented in this commit.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-11 02:12:32 +08:00
Patrick Urban d09e5da0ba colognechip integration: initial commit
This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.

Signed-off-by: Patrick Urban <patrick.urban@web.de>
2021-12-10 12:12:32 +01:00
Gwenhael Goavec-Merou 48c326130a part: EP3C16 and EP4CE15 have same idcode 2021-11-14 08:44:39 +01:00