6fefebd02c
prepare release v0.2.1
2020-12-17 13:58:30 +01:00
1b065277f9
add acorn CLE 215+ support
2020-12-17 09:28:45 +01:00
6e44797677
add fairwaves xtrx pro board
2020-12-15 09:47:10 +01:00
54b31651f3
xilinx: since xilinx generates bin file, drop limitation about flash start offset
2020-12-15 09:46:47 +01:00
a11ec92a25
Fix gcc 10.2 error messages.
2020-12-12 15:48:45 -08:00
922d3b0b56
xilinx: add xca50t support
2020-12-08 07:32:30 +01:00
ed7e9340ba
lattice: add a memset to avoid valgrind warn
2020-11-27 08:29:09 +01:00
88522b0e91
ftdiJtagBitbang: quick fix to avoid overflow in writeTDI
2020-11-26 09:26:08 +01:00
bec5e4f35c
add xc7s25 support
2020-11-18 08:15:15 +01:00
14c5b8e681
add support for ice40 FPGA and iCEBreaker, icestick, iCE40-HX8K, iCE40-HX1K-EVN boards
2020-10-31 15:02:54 +01:00
818dbd301c
ftdipp_mpsse: reduce useless write
2020-10-31 11:10:14 +01:00
7e15b5cabb
board: Fireant support
2020-10-31 10:44:44 +01:00
6aa2176be1
board: typo
2020-10-31 10:44:14 +01:00
537f02fa89
board: fix control pins size
2020-10-31 10:43:45 +01:00
14b7122b4d
ftdispi: fix control size
2020-10-31 10:42:40 +01:00
aa23aff388
main: review SPI mode for efinix active mode
2020-10-31 10:41:44 +01:00
70fb5c8439
add efinix support
2020-10-31 10:39:06 +01:00
3c9870bba3
introduce CBUS/DBUS pins value, add macro and pin mapping for board in SPI mode, reset and done signals
2020-10-31 08:40:18 +01:00
fe8cd9998d
board: simplify board definition using preprocessor macro
2020-10-31 08:04:43 +01:00
1bc20fee85
ftdispi: cleanup + fix + add support for wpn and holdn pins
2020-10-31 07:45:30 +01:00
deefcd2d38
ftdipp_mpsse: update direction method
2020-10-31 07:38:06 +01:00
b2abafa76d
ftdispi: start to use spi_pins_conf
2020-10-30 08:26:15 +01:00
e347d2afd6
board: add spi_pins_conf structure
2020-10-30 08:23:49 +01:00
b0f73aa8d9
ftdipp_mpsse: add method to configure individually pins direction
2020-10-30 08:18:38 +01:00
2398ee1445
part: add LCMXO2-640HC
2020-10-29 08:24:30 +01:00
88c6b2ff6d
Improve FTDI communication in bitbang mode
...
sub layer cut package in allowed size, so it's not mandatory to do this
at openFPGALoader level. The only situation when the size is important
is in read mode. So increase buffer size to reduce system calls.
2020-10-29 08:15:32 +01:00
e0a5d376ba
ftdipp_mpsse: change VID/PID visibility
2020-10-29 07:40:56 +01:00
f75a7f8395
ftdiJtagBitbang: some cleanup and reuse parent class buffer
2020-10-29 07:39:47 +01:00
78ea8ac808
ftdipp_mpsse: change _buffer visibility
2020-10-29 07:39:07 +01:00
09c28c23a7
ftdispi: cleanup
2020-10-28 21:26:33 +01:00
05e1c57cc5
ftdipp_mpsse: add method to update pins direction
2020-10-28 19:48:59 +01:00
ed006711b7
ftdipp_mpsse: introduce gpio bitbanging with MPSSE
2020-10-28 07:58:33 +01:00
b3a67f896f
ftdipp_mpsse: store cable configuration
2020-10-27 20:27:02 +01:00
4dde89e082
Merge remote-tracking branch 'origin/review_usb_transaction'
2020-10-27 19:29:44 +01:00
5254116ad8
main: if board has no default cable, don't override potential user choise
2020-10-25 16:51:21 +01:00
f22b25428d
main: allow users board cable to be override
2020-10-21 13:41:26 +02:00
2170a2af86
altera: add support for RBF (only tested with SRAM)
2020-10-17 18:40:16 +02:00
15e9907655
add cycloneV E support and QMTech CycloneV board
2020-10-17 15:45:00 +02:00
717d5065b4
ftdiJtagMPSSE: use correct size for ch552 dummy buffer
2020-10-17 15:44:21 +02:00
04df474e12
Merge pull request #56 from GbGp/master
...
add support for artix-7 200t and nexys video board
2020-10-16 19:10:10 +02:00
a874a51be3
Fix part name typo
2020-10-16 08:08:44 +02:00
fbb8c58f46
Add MachXO3D Development Board Support
2020-10-16 08:03:45 +02:00
edad461d88
add support for artix-7 200t and nexys video board
2020-10-15 16:07:55 +02:00
235505c660
gowin:
...
- increase delay before checking CRC
- fix message
2020-10-12 15:34:50 +02:00
adb6efca39
ftdiJtagMPSSE: don't flush/write everytime
2020-10-09 21:30:45 +02:00
23c9733a6d
gowin: force flush when it's mandatory
2020-10-09 21:29:48 +02:00
da65579d0d
jtag: don't force flush everywhere
2020-10-09 21:28:00 +02:00
06d0e44f71
gowin: eraseFLASH(): fix buffer size, set this to 0
2020-10-09 21:22:03 +02:00
a27c99376d
ftdiJtagMPSSE: don't use MPSSE_DO_WRITE for read only transaction
2020-10-09 21:17:04 +02:00
487bc21d66
Fix fsparser:
...
- first bit in header lines maybe be 0 or 1 depending on crc_check
- data line length depend on crc_check too. Instead of trying to deduce
length, use idcode to have this.
2020-10-09 19:26:50 +02:00
Gwenhael Goavec-Merou
phdussud
Francisco Ayala Le Brun
Giuseppe Gebbia