add xc7s25 support
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@ -40,7 +40,7 @@ __Supported (tested) FPGA:__
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* Lattice [ECP5 (25F, 5G 85F, CrossLink-NX (LIFCL-40)](https://www.latticesemi.com/en/Products/FPGAandCPLD/CrossLink-NX) (SRAM and Flash)
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* Xilinx Artix 7 [xc7a35ti, xc7a100t, xc7a200t](https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html) (memory and spi flash)
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* Xilinx Spartan 6 [xc6slx45](https://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html) (memory)
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* Xilinx Spartan 7 [xc7s15, xc7s50](https://www.xilinx.com/products/silicon-devices/fpga/spartan-7.html) (memory (all) and spi flash (xc7s50))
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* Xilinx Spartan 7 [xc7s15, xc7s25, xc7s50](https://www.xilinx.com/products/silicon-devices/fpga/spartan-7.html) (memory (all) and spi flash (xc7s50))
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* Intel Cyclone IV CE [EP4CE22](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-iv/features.html) (memory. See note below)
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* Intel Cyclone V E [5CEA2](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-v.html)
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* Intel Cyclone 10 LP [10CL025](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-10.html)
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@ -472,4 +472,4 @@ __bin file load__
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openFPGALoader -b ice40_generic /somewhere/*.bin
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```
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Since it's a direct access to the flash (SPI) the *-b* option is required.
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Since it's a direct access to the flash (SPI) the *-b* option is required.
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@ -19,6 +19,7 @@ static std::map <int, fpga_model> fpga_list = {
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{0x44008093, {"xilinx", "spartan6", "xc6slx45"}},
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{0x03620093, {"xilinx", "spartan7", "xc7s15ftgb196-1"}},
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{0x037c4093, {"xilinx", "spartan7", "xc7s25"}},
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{0x0362f093, {"xilinx", "spartan7", "xc7s50"}},
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{0x020f30dd, {"altera", "cyclone 10 LP", "10CL025"}},
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