Commit Graph

1638 Commits

Author SHA1 Message Date
Ricardo Barbedo 090a16656d Only delete bitstream objects if non-null 2023-02-07 10:30:28 +01:00
Ricardo Barbedo beb93d8321 Replace the string arguments usage with a bitfield 2023-02-06 15:17:53 +01:00
Ricardo Barbedo 0536ab4754 Add target-flash and secondary-bitstream CLI options for VCU118 2023-02-06 11:23:10 +01:00
Gwenhael Goavec-Merou edea24fa69 scripts/msys2/PKGBUILD: try to fix previous commit (gzip) 2023-02-03 06:59:01 +01:00
Gwenhael Goavec-Merou cf61e715cb CMakeLists: when gzip is available spiOverJtag .bit and .rbf are compressed before installing 2023-02-02 07:38:35 +01:00
Gwenhael Goavec-Merou fab4d02128
Merge pull request #301 from galibert/master
part: Add all cyclone V variant, board: Add the Terasic C5G
2023-01-29 22:08:55 +01:00
Olivier Galibert a8815ff80c boards.yml: Add C5G 2023-01-29 22:04:50 +01:00
Olivier Galibert 5a00f0d184 part: Add all cyclone V variant
board: Add the Terasic C5G
2023-01-29 15:35:47 +01:00
Gwenhael Goavec-Merou b1c843acdb
Merge pull request #299 from umarcor/umarcor/shields
readme: update shield syntax (badges/shields#8671)
2023-01-24 20:43:30 +01:00
Unai Martinez-Corral 235ff2b1a8 readme: update shield syntax (badges/shields#8671) 2023-01-24 20:28:52 +01:00
Gwenhael Goavec-Merou ab7365b902
Merge pull request #296 from barbedo/vcu118-flash-spi-over-jtag
Add XCVU9P spiOverJtag bitfile with SPIx8 support
2023-01-24 10:51:15 +01:00
Gwenhael Goavec-Merou 4a07ffa2b8
Merge pull request #297 from barbedo/vcu118-flash-ir-codes
Add support for XCVU9P IR length and codes
2023-01-24 06:31:40 +01:00
Ricardo Barbedo 43e6c0c867
Add support for 4-byte QSPI flash addressing (#295)
* Add support for 4-byte QSPI flash addressing

* Avoid code duplication
2023-01-23 15:18:46 +01:00
Gwenhael Goavec-Merou 0ac85d1c9f
Merge pull request #294 from barbedo/vcu118-flash-qspi-chip
Add support for MT25QU01 flash
2023-01-21 17:11:45 +01:00
Ricardo Barbedo ad9ad539ff Add support for XCVU9P IR length and codes 2023-01-21 14:45:50 +01:00
Ricardo Barbedo e5481787d8 Fix VCU118 board part name and IR length 2023-01-21 14:45:50 +01:00
Ricardo Barbedo 29d2264e15 Add XCVU9P spiOverJtag bitfile with SPIx8 support 2023-01-21 14:33:36 +01:00
Ricardo Barbedo 85fd2f316f Add support for MT25QU01 flash 2023-01-21 13:47:51 +01:00
Gwenhael Goavec-Merou bf6d692196
Merge pull request #292 from antmicro/msieron/send-only-declared-bytes
bitparser: check bitstream length in the file
2023-01-20 10:14:38 +01:00
Michal Sieron d127fb9554 bitparser: replace _raw_data.size() with _file_size
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2023-01-20 09:09:41 +01:00
Michal Sieron bc53c1d022 bitparser: check bitstream length in the file
It was present before, but for some reason was removed in 16932786.

Signed-off-by: Michal Sieron <msieron@antmicro.com>
2023-01-19 21:07:40 +01:00
Gwenhael Goavec-Merou 13b232b366
Merge pull request #291 from raetro-deps/master
feat(board): add support for Terasic DE10-Lite
2023-01-10 18:16:39 +01:00
Marcus Andrade 67563983f9 feat(board): add support for Terasic DE10-Lite 2023-01-09 15:52:54 -06:00
Gwenhael Goavec-Merou c083f7d227
Merge pull request #290 from Icenowy/stlv7325
boards: add Sitlinv STLV7325
2023-01-06 08:36:35 +01:00
Icenowy Zheng fdf4c94d83 boards: add Sitlinv STLV7325
Sitlinv STLV7325 is a board with XC7K325T-FFG676.

Add support for it.

The board does not have JTAG cables on board, however its vendor
provides an option to buy a FT4232-based JTAG cable with the board, so
the default cable is set to ft4232.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-01-06 15:22:43 +08:00
Gwenhael Goavec-Merou ec55c531c5
Merge pull request #289 from raetro-deps/add-deca-support
feat(board): add support for Arrow/Terasic DECA
2023-01-04 21:04:54 +01:00
Marcus Andrade 14fce33109 feat(board): add support for Arrow/Terasic DECA 2023-01-04 13:11:21 -06:00
Gwenhael Goavec-Merou cc1bc89f29 boards: Trenz TEI0010 - AnalogMax 2023-01-04 19:00:08 +01:00
Gwenhael Goavec-Merou 751b057596 parts: Intel MAX10 (10M08) 2023-01-04 18:53:25 +01:00
Gwenhael Goavec-Merou 8ee65e7f9d usbBlaster,ftdiJtagMPSSE: fix alignment for 1 bit len read transaction 2023-01-04 18:50:13 +01:00
Gwenhael Goavec-Merou 84aa0d14b9 main: xvc_server: catch exception 2023-01-02 18:02:43 +01:00
Gwenhael Goavec-Merou 2182a8ff7f xvc_server: don't stop when connection close, rework read to return code for error and for disconnect 2023-01-02 18:02:28 +01:00
Gwenhael Goavec-Merou c28e955bb9 usbBlaster: change tx_len size (16 -> 32) to fix a potential overflow when log2(xfer_len) > 16 in toggleClk method 2023-01-02 08:57:52 +01:00
Gwenhael Goavec-Merou 8722ec98c3
Merge pull request #287 from raetro-deps/master
fix(board): fix missing spiOverJTAG for C10LP-RefKit
2022-12-26 09:38:10 +01:00
Marcus Andrade 89f0b5016f fix(board): fix missing spiOverJTAG for C10LP-RefKit 2022-12-25 18:36:52 -06:00
Gwenhael Goavec-Merou f4a5d4ea5d
Merge pull request #286 from raetro-deps/master
feat(board): add support for Trenz C10LP-RefKit
2022-12-25 23:39:07 +01:00
Marcus Andrade 0591af56b7 feat(board): add support for Trenz C10LP-RefKit 2022-12-25 15:53:45 -06:00
Gwenhael Goavec-Merou 40b9f79273 prepare release v0.10.0 2022-12-21 21:45:28 +01:00
Gwenhael Goavec-Merou 5b0c0db5c9
Merge pull request #285 from cdwijs/master
Typo fixes
2022-12-19 07:27:54 +01:00
Cedric de Wijs 483304344f more typo fixes 2022-12-18 23:29:21 +01:00
Cedric de Wijs 0bdef7bab1 typo's, added git as dependency 2022-12-18 13:56:54 +01:00
Gwenhael Goavec-Merou 473d2c4092
Merge pull request #283 from barbedo/vcu118
Add initial support for the Xilinx VCU118 board
2022-12-11 23:00:33 +01:00
Ricardo Barbedo 0855efb29f Add initial support for the VCU118 board 2022-12-11 22:11:50 +01:00
Gwenhael Goavec-Merou e536634ada adding LiteX-Acorn-Baseboards support 2022-12-11 20:39:32 +01:00
Gwenhael Goavec-Merou fb8c1a5f97 altera,intel: adding an option to bypass spiOverJtag automatic bitstream selection by providing the bitstream file path 2022-12-10 22:05:37 +01:00
Gwenhael Goavec-Merou da9c7630e4 spiOverJtag: remove spiOverJtag_xc6slx9tqg144.bit 2022-12-05 07:26:31 +01:00
Gwenhael Goavec-Merou 99aae7d5ec
Merge pull request #280 from saursin/support_xc6slx9tqg144
Add support for Xc6slx9tqg144 FPGA
2022-12-04 23:11:15 +01:00
Saurabh Singh 0eb54cb5fb Add support for Xc6slx9tqg144 FPGA 2022-12-04 15:48:44 +05:30
Gwenhael Goavec-Merou 94d0ad6c85 src/ftdispi: typo: replace _holdn by _wpn for spi_config.wpn_pi (fix issue #277). 2022-11-27 15:29:25 +01:00
Gwenhael Goavec-Merou 175312423c src/libusb_ll: typo (ft2232RL -> ft232RL). Fix #276 2022-11-27 09:51:31 +01:00