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openFPGALoader
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Add support for Xc6slx9tqg144 FPGA

This commit is contained in:
Saurabh Singh 2022-12-04 15:48:44 +05:30
parent 94d0ad6c85
commit 0eb54cb5fb
5 changed files with 10 additions and 1 deletions
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2
spiOverJtag/Makefile
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@ -1,4 +1,4 @@
XILINX_PARTS := xc3s500evq100 xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \
XILINX_PARTS := xc3s500evq100 xc6slx9tqg144 xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \
xc6slx150tfgg484 \
xc7a35tcpg236 xc7a35tcsg324 xc7a35tftg256 \
xc7a50tcsg324 xc7a50tcpg236 xc7a75tfgg484 \

3
spiOverJtag/build.py
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@ -62,6 +62,7 @@ else:
if tool in ["ise", "vivado"]:
pkg_name = {
"xc3s500evq100" : "xc3s_vq100",
"xc6slx9tqg144" : "xc6s_tqg144",
"xc6slx16ftg256" : "xc6s_ftg256",
"xc6slx16csg324" : "xc6s_csg324",
"xc6slx45csg324" : "xc6s_csg324",
@ -91,6 +92,7 @@ if tool in ["ise", "vivado"]:
tool_options = {'family': family,
'device': {
"xc3s500evq100": "xc3s500e",
"xc6slx9tqg144": "xc6slx9",
"xc6slx16ftg256": "xc6slx16",
"xc6slx16csg324": "xc6slx16",
"xc6slx45csg324": "xc6slx45",
@ -102,6 +104,7 @@ if tool in ["ise", "vivado"]:
}[part],
'package': {
"xc3s500evq100": "vq100",
"xc6slx9tqg144": "tqg144",
"xc6slx16ftg256": "ftg256",
"xc6slx16csg324": "csg324",
"xc6slx45csg324": "csg324",

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spiOverJtag/spiOverJtag_xc6slx9tqg144.bit Normal file
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spiOverJtag/spiOverJtag_xc6slx9tqg144.bit.gz Normal file
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6
spiOverJtag/xc6/constr_xc6slx9_tqg144.ucf Normal file
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@ -0,0 +1,6 @@
CONFIG VCCAUX = "2.5";
NET "sdo" LOC = P65 | IOSTANDARD = LVCMOS33;
NET "sdi" LOC = P64 | IOSTANDARD = LVCMOS33;
NET "csn" LOC = P38 | IOSTANDARD = LVCMOS33;
NET "sck" LOC = P70 | IOSTANDARD = LVCMOS33;