luke
/
openFPGALoader
mirror of https://github.com/trabucayre/openFPGALoader.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #291 from raetro-deps/master 

feat(board): add support for Terasic DE10-Lite
This commit is contained in:
Gwenhael Goavec-Merou 2023-01-10 18:16:39 +01:00 committed by GitHub
parent c083f7d227 67563983f9
commit 13b232b366
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
99-openfpgaloader.rules
View File

@ -27,6 +27,8 @@ ATTRS{idVendor}=="0547", ATTRS{idProduct}=="1002", MODE="664", GROUP="plugdev",
# altera usb-blaster
ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6002", MODE="664", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6003", MODE="664", GROUP="plugdev", TAG+="uaccess"
# altera usb-blasterII - uninitialized
ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6810", MODE="664", GROUP="plugdev", TAG+="uaccess"

6
doc/boards.yml
View File

@ -222,6 +222,12 @@
FPGA: Cyclone V SoC 5CSEMA4U23C6
Memory: OK
- ID: de10lite
Description: Terasic de10lite
URL: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=218&No=1021&PartNo=1
FPGA: MAX 10 10M50DAF484C7G
Memory: OK
- ID: de10nano
Description: Terasic de10Nano
URL: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=205&No=1046

1
src/board.hpp
View File

@ -137,6 +137,7 @@ static std::map <std::string, target_board_t> board_list = {
JTAG_BOARD("de0", "", "usb-blaster",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de0nano", "ep4ce2217", "usb-blaster",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de0nanoSoc", "", "usb-blasterII",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de10lite", "", "usb-blaster",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de10nano", "", "usb-blasterII",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de1Soc", "5CSEMA5", "usb-blasterII",0, 0, CABLE_DEFAULT),
JTAG_BOARD("deca", "10M50DA", "usb-blasterII",0, 0, CABLE_DEFAULT),

2
src/part.hpp
View File

@ -96,7 +96,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
{0x02d120dd, {"altera", "cyclone V Soc", "5CSEMA5", 10}},
{0x031820dd, {"altera", "MAX 10", "10M08SAU169C8G", 10}},
{0x031050dd, {"altera", "MAX 10", "10M50DAF484C6GES", 10}},
{0x031050dd, {"altera", "MAX 10", "10M50DAF484", 10}},
{0x00000001, {"efinix", "Trion", "T4/T8", 4}},
{0x00210a79, {"efinix", "Trion", "T8QFP144/T13/T20", 4}},