Commit Graph

8989 Commits

Author SHA1 Message Date
Holger Vogt 413382bd56 Add simulator version info to raw file in batch mode,
using the line 'Command:...'
2024-08-18 14:16:42 +02:00
Giles Atkinson b03dd90694 Fix #686: "XSpice Verilog Vector Input Bug".
Bug report and fix by Aodhan Murray.
2024-08-16 12:25:30 +02:00
Holger Vogt 816f43dd36 Improve debugging using shared ngspice:
print out each command received.
2024-08-16 12:21:12 +02:00
Holger Vogt 6ea6f8d9a8 Add a comment 2024-08-03 16:08:41 +02:00
Holger Vogt 6183912bf9 Merge branch 'pre-master-44' of ssh://git.code.sf.net/p/ngspice/ngspice into pre-master-44 2024-08-03 16:07:26 +02:00
Holger Vogt 8fa02c02b6 Copy the correct spinit to ngspice/visualc 2024-08-03 16:06:58 +02:00
dwarning 90a3e28037 git ignore vcd files 2024-08-03 08:00:40 +02:00
dwarning 11cf603ac0 extend unwanted output list 2024-08-03 08:00:00 +02:00
dwarning ee9a8462ea add missing klu bindings 2024-08-02 16:32:47 +02:00
Vogt 3af65f1d28 Notes go to stdout. 2024-08-01 13:39:18 +02:00
Vogt 7bfaefada4 Don't dereference a NULL pointer. 2024-08-01 13:36:44 +02:00
Vogt f95e8c2e3a Error and warning messages to stderr 2024-08-01 13:28:32 +02:00
Vogt 2e8bd0cea6 Note directed to stdout 2024-08-01 13:28:08 +02:00
Holger Vogt c2795a350a enable compiling with CYGWIN 2024-07-26 12:08:51 +02:00
Giles Atkinson 038c18429f Fix gcc warnings. 2024-07-25 21:33:44 +02:00
Giles Atkinson 1244f4dc1f Add additional examples of Verilog co-simulation and share the Verilog
source and large parts of the example circuits between Verilator and
Icarus Verilog.  Verilog source file adc.v has improved style:
all assignments in the always block are now non-blocking.
2024-07-25 21:33:32 +02:00
Giles Atkinson beb07ea6df Add a utility function to the d_cosim code model to open dynamic
libraries. It automatically tries adding standard file extensions,
so that model lines for d_cosim can be the same for all OSs.
2024-07-25 21:33:16 +02:00
Giles Atkinson cdbe31868f Add support for including Verilog simulation within an instance
of the d_cosim codemodel, using libvvp, the simulation runtime of
Icarus Verilog.  This complements the existing method using Verilator.
The new source code is built into two binary shared libraries,
ivlng.so (or .DLL) and ivlng.vpi that are loaded during simulation.
2024-07-25 21:32:59 +02:00
Giles Atkinson e201f144d5 Add support for Verilator's --timing option, allowing use of delays
in Verilog source code.  Also add two parameters to d_cosim:
sim_args is used to pass string arguments to a Verilator simulation;
and lib_args is for future use.  In vlnggen, also check for two causes
of failure: a verilator error may lead to creation of interfering header
files; and misleading instances of verilated_shim.cpp can cause an obscure
failure (reported by Diarmuid Collins).
Use a generic name for the generated DLL in MSVC.CMD.
2024-07-25 21:32:42 +02:00
Giles Atkinson 4481531baf Allow trailing null connections to be omitted from XSPICE device
lines.  Also tidy some code,
2024-07-25 21:32:21 +02:00
Giles Atkinson ab1f16517e Changes to d_cosim to work with initial support for Icarus Verilog.
Fully resolve symbols on loading and tolerate attempts to set
output in the past.
2024-07-25 21:31:46 +02:00
dwarning aa9a0a637e vbic: have to load Vrxf/Itxf with value 2024-07-23 14:34:32 +02:00
dwarning bf020ca173 vbic: correct op reporting for excess phase model 2024-07-23 10:50:19 +02:00
Holger Vogt 31dba308d6 Merge branch 'pre-master-44' of ssh://git.code.sf.net/p/ngspice/ngspice into pre-master-44 2024-07-20 17:55:27 +02:00
Holger Vogt f0ff8b230b Remove sourceinfo upon shared ngspice reset.
Remove memory leaks.
2024-07-20 17:54:43 +02:00
dwarning cbca05cd6b format: rm misleading indentation 2024-07-20 16:09:39 +02:00
Holger Vogt 272e4cc6fb Memcpy only when p_word is not NULL
enable -fsanitize=address
2024-07-16 17:01:57 +02:00
Holger Vogt 98479267d4 Revert "memcpy only if p_word is not NULL"
This reverts commit 58787756d4.
2024-07-16 16:48:23 +02:00
Holger Vogt 596183282a Revert "Check if the MS address sanitizer may help us"
This reverts commit 07f761e11a.
2024-07-16 16:32:04 +02:00
Holger Vogt a43c6f4916 Add #define RESMIN 1e-6 as a minimum resistor value 2024-07-16 16:25:54 +02:00
Holger Vogt 0ac18a37c0 Stop the worker thread when running
Delete mutexes only after all other resets and delets.
2024-07-16 16:22:07 +02:00
Holger Vogt c61fc35231 Set pl_lookup_table to NULL after freeing: allow another initialization 2024-07-16 16:21:53 +02:00
Holger Vogt 07b10bc1a1 Bail out when state file is not found. 2024-07-16 16:21:44 +02:00
Holger Vogt d2cc17b45d Add function ngSpice_Reset(void) to completely reset shared ngspice,
so that it may be restartet again by ngSpice_Init
2024-07-16 16:21:36 +02:00
Holger Vogt 620b9c86ce Update copyright 2024-07-16 16:21:22 +02:00
Holger Vogt 07f761e11a Check if the MS address sanitizer may help us 2024-07-16 16:08:12 +02:00
Holger Vogt 58787756d4 memcpy only if p_word is not NULL 2024-07-16 16:06:54 +02:00
Holger Vogt 6a396b37f7 File encoding is now UTF-8
change to letter µ
2024-07-16 10:21:36 +02:00
b'Holger Vogt 0721afc355 Merge /u/mtasaka/ngspice/ branch asan-segv-fix into pre-master-44
https://sourceforge.net/p/ngspice/ngspice/merge-requests/19/
2024-07-16 07:35:20 +00:00
Mamoru TASAKA 38f6bbe5ec misc/string.c: fix one byte ahead access in dup_string
In dup_string in misc/string.c , even if the destination
buffer is allocated with n_char bytes,
the source buffer `str` can be accessed up to only n_char bytes.
2024-07-16 15:52:09 +09:00
Holger Vogt 942b4f62b4 43+ developing towards ngspice-44 2024-07-14 12:58:45 +02:00
Holger Vogt 2af390f0b1 Update copyright info 2024-07-13 10:14:02 +02:00
Holger Vogt c73391432a Missing \
Keep tabs
2024-07-12 17:03:48 +02:00
Holger Vogt f320ae955d More files into distribution 2024-07-12 18:44:49 +02:00
Holger Vogt 50dc0dbfe0 Apple M2 2024-07-12 16:54:51 +02:00
Holger Vogt 03c4bf48d0 VBIC nqs 2024-07-12 16:53:23 +02:00
Holger Vogt d2167e033f Update to macOS compile scripts 2024-07-12 16:48:19 +02:00
Holger Vogt 0d5a4758b1 Options are now included automatically. 2024-07-12 15:30:05 +02:00
Holger Vogt b84ac9ecdf Options are now included 2024-07-12 15:20:19 +02:00
dwarning 08d834841f diode: init of potential uninitialized variable 2024-07-12 14:26:53 +02:00