Commit Graph

31 Commits

Author SHA1 Message Date
gatecat 0d3a578539 run clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2026-02-25 11:18:14 +01:00
Miodrag Milanović b8a6559a3f
gatemate: add CP lines as clock and general routing [sc-184] (#1638)
* gatemate: add alternate clock routes

* use additional pins

* Fix clock router and timings

* Fix DDR nets

* Test passtrough concept

* remove not used variable

* wip

* handle pip masks

* Cleanup

* create CPE_CPLINES cells and set properties on them

* Fix pip masking

* rough code to break cplines into subnets

* add ports to cell

* mux bridges need cell bel pins too

* fix multiplier output register packing

* remove empty if

* Fix ODDR

* Add options to disable some pips

* Use resources info

* mask field to resource field

* produce valid netlist with propagation netlist at least

* adapt reassign_cplines for internal resource pips

* Handle block and resources

* fix formatting

* It is required to set all mandatory properties now

* arch API for resources

* current progress

* Add option to skip bridges

* perform per-wire resource congestion costing

* Added no-cpe-cp option

* resource bugfix

* comment out spammy debug message

* Fix routing conflicts issues

* allow only some pass trough for clock router

* handle inversion bits for pass signals

* verify inversion before/after assigning bridges

* we care only if there is net

* Revert "we care only if there is net"

This reverts commit 3da2769e31.

* Revert "verify inversion before/after assigning bridges"

This reverts commit 8613ee17c8.

* chipdb version bump

* clangformat

* cleanup

* cleanup

* Initial conversion to GroupId

* Keep group info in pip extra

* Cleanup headers

* Initialize resource efficiently

* Addressing review comments

* improve resource docs

* Make CP lines not use as clocks as default

---------

Co-authored-by: Lofty <dan.ravensloft@gmail.com>
2026-02-25 08:22:16 +01:00
myrtle 2400a90e04
router2: Try harder on constants to prevent infinite loop (#1647)
Signed-off-by: gatecat <gatecat@ds0.me>
2026-02-24 14:28:25 +01:00
myrtle 49ba0b277f
Support use of router2 for gowin (#1636)
Signed-off-by: gatecat <gatecat@ds0.me>
2026-02-17 09:26:25 +01:00
Miodrag Milanovic 8ab9301dc4 clangformat 2025-08-27 10:37:39 +02:00
Lofty 0a7cbe1cd7
router2: iteratively reserve arc driver wires, too (#1539) 2025-08-26 16:17:11 +02:00
gatecat 226a2dfdb4 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2025-05-20 13:19:52 +02:00
Catherine 155adc3f5d CMake: rationalize and refactor build system.
The two main changes, done together in this commit, are:
* Eliminating most instances of `aux_source_directory()`, replacing
  them with explicit file listings; and
* Moving these file listings into respective subdirectories by
  representing respective nextpnr components as interface libraries.

In addition, the GUI CMake script tree was simplified since it had
a lot of unused/redundant code.

The `aux_source_directory()` command is not recommended for use by
CMake itself because it misses dependency changes when adding/removing
files, and consequently causes build failures requiring a clean rebuild.

This commit does not touch anything related to architectures/families,
which are very complex and redundant all on their own.
2025-01-16 11:36:44 +01:00
Miodrag Milanović 0e69425794
Add expandBoundingBox method to API (#1395)
* Add expandBoundingBox method to API

* Update API documentation
2024-11-26 10:13:41 +01:00
Lofty 268b32c341 router2: additional heatmap data 2024-10-02 16:29:55 +02:00
gatecat 9b51c6e337 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2024-09-30 14:51:33 +02:00
Rowan Goemans 5488cd994b router: Enable clock skew analysis during routing 2024-09-24 08:57:21 +02:00
gatecat 4a4025192a run clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2023-12-26 09:54:34 +01:00
gatecat 4c6003ac0b router2: Don't use estimates for constant nets
Signed-off-by: gatecat <gatecat@ds0.me>
2023-11-07 15:55:22 +01:00
gatecat fe52840054 archapi: Add new API for global constant routing
Signed-off-by: gatecat <gatecat@ds0.me>
2023-11-07 09:00:03 +01:00
rowanG077 e8602fb56d std::numeric_limits<delay_t>::lowest() -> ::min() 2023-09-28 16:27:15 +02:00
gatecat e08471dfaf router2: Improve robustness when critical nets conflict
Signed-off-by: gatecat <gatecat@ds0.me>
2023-08-24 09:20:44 +02:00
gatecat 54b2045726 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2023-06-20 10:58:18 +02:00
rowanG077 914999673c Rip out budgets 2023-06-20 10:57:10 +02:00
Lofty cbd6496d35 router2: fix 8935c186 (again) 2023-06-19 13:47:23 +02:00
Lofty 787fac7649 router2: fix 8935c186 2023-06-14 03:40:48 +01:00
Lofty 71a6b99633 router2: revisit nodes with lower delay 2023-06-13 08:24:01 +01:00
Lofty 8935c1867f router2: revisit nodes with lower cost 2023-06-13 08:24:01 +01:00
Lofty 5936464967
router2: add alternate weight option (#1162) 2023-05-25 10:47:10 +02:00
gatecat 132a98a91d router1: Add error when dest port has no wire
Signed-off-by: gatecat <gatecat@ds0.me>
2023-03-06 14:15:48 +01:00
gatecat 7845b66512 Add missing <set> includes
Signed-off-by: gatecat <gatecat@ds0.me>
2023-01-20 09:04:41 +01:00
gatecat e260ac33ab refactor: ArcBounds -> BoundingBox
Signed-off-by: gatecat <gatecat@ds0.me>
2022-12-07 10:00:53 +01:00
gatecat 415c097df8 router2: Reserve source wire, too
Signed-off-by: gatecat <gatecat@ds0.me>
2022-09-20 13:42:51 +02:00
Miodrag Milanovic 1aa797b820 Fix parameter order 2022-08-22 12:32:50 +02:00
gatecat 09e388f453 netlist: Add PseudoCell API
When implementing concepts such as partition pins or deliberately split
nets, there's a need for something that looks like a cell (starts/ends
routing with pins on nets, has timing data) but isn't mapped to a fixed
bel in the architecture, but instead can have pin mappings defined at
runtime.

The PseudoCell allows this by providing an alternate, virtual-function
based API for such cells. When a cell has `pseudo_cell` used, instead of
calling functions such as getBelPinWire, getBelLocation or getCellDelay
in the Arch API; such data is provided by the cell itself, fully
flexible at runtime regardless of arch, via methods on the PseudoCell
implementation.
2022-07-08 14:30:57 +02:00
gatecat 49f178ed94 Split up common into kernel,place,route
Signed-off-by: gatecat <gatecat@ds0.me>
2022-04-08 13:42:54 +01:00