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Author SHA1 Message Date
Lofty 4c72cee9ee gatemate, ng-ultra: add micko and I as code owners (#1747) 2026-07-12 12:43:35 +02:00
gatecat fc9e96a6e6 python: Fix binding for getNetinfoRouteDelay 
Fixes #1744

Signed-off-by: gatecat <[email protected]>
 2026-07-12 11:39:41 +02:00
Michael OffelandMiO 9f441ba455 fix association of BRAM port to clock in SDP mode (#1746) 
Co-authored-by: MiO <[email protected]>
 2026-07-12 11:29:43 +02:00
gatecat 2b560ad0cc clangformat 
Signed-off-by: gatecat <[email protected]>
 2026-06-19 09:13:08 +02:00
mrcmry fae2fb4dac gatemate: improve PLL->BUFG error message (#1739) 
When a PLL output is connected to a BUFG, it can only be connected to it.

The message is improved in mentioning it and listing all ports connected and the pll name.

This simplify debug.
 2026-06-19 08:45:32 +02:00
gatecat 57682fe537 static: Respect region constraints 
Signed-off-by: gatecat <[email protected]>
 2026-06-17 13:19:51 +02:00
YRabbit 175787b2f0 Gowin. BUGFIX. Alu optimization. (#1736) 
Adding freeing of the addition/subtraction mode switch PIP.

We're limiting optimization to just one constant input—cases with two
constant inputs are rare, and this raises questions about how such ALUs
are generated in synthesis.

LUT knowledge calculations have been replaced with table
constants—faster and easier to verify.

Addresses https://github.com/YosysHQ/apicula/issues/514

Signed-off-by: YRabbit <[email protected]>
 2026-06-17 08:48:25 +02:00
mrcmry 2dfdba6efc gatemate: add default values to vopt descriptions (#1733) 2026-06-13 10:57:03 +02:00
Rowan Goemans 32324500c4 gatemate: Fix blockram edge inversion lookup (#1731) 2026-06-05 12:26:25 +02:00
gatecat 885b71e53d gatemate: Extra error check for CLK1 strategy 
Signed-off-by: gatecat <[email protected]>
 2026-06-02 12:13:09 +02:00
William D. Jones 3a3b273f06 Explicitly use ANSI versions of Windows functions, due to changes in Qt6 Unicode behavior. (#1727) 2026-05-22 16:21:51 +02:00
William D. Jones ee605e2b18 Fix windows.h being included from within a namespace, which is UB. (#1726) 2026-05-21 10:55:24 +02:00
gatecat 48c70978b3 static: Fix crash when no placeable cells 
Signed-off-by: gatecat <[email protected]>
 2026-05-20 10:51:55 +02:00
gatecat d5b1068b29 ice40: Static config tweaks 
Signed-off-by: gatecat <[email protected]>
 2026-05-20 10:48:59 +02:00
Michael OffelandMiO 2894e53934 fix visual studio build (#1722) 
* fix visual studio build
add natural share path after build on visual studio

* fix cmake syntax

---------

Co-authored-by: MiO <[email protected]>
 2026-05-15 10:27:07 +02:00
Patrick Urban 2669f0d932 gatemate: fix OUT3/GPIO_EN inversion 2026-05-12 17:54:49 +02:00
gatecat 8b7dbbedd1 static: Lower start penalty 
Signed-off-by: gatecat <[email protected]>
 2026-05-11 13:17:44 +02:00
gatecat 36595c5486 static: Disable dark nodes for now 
Signed-off-by: gatecat <[email protected]>
 2026-05-11 12:28:44 +02:00
gatecat 68fb8c0d4c static: Fix spacer insertion 
Signed-off-by: gatecat <[email protected]>
 2026-05-11 12:28:44 +02:00
Catherine 2622bbfcda WASI: fix thread presence detection. 2026-05-10 13:49:45 +01:00
gatecat 9cb5fc6428 static: Use centroid as position 
Signed-off-by: gatecat <[email protected]>
 2026-05-06 12:32:24 +02:00
gatecat 516f6874a6 static: Compute a 'dense' placement grid to avoid excess dark nodes 
Signed-off-by: gatecat <[email protected]>
 2026-05-06 11:55:36 +02:00
gatecat ec87cdcc80 xilinx: Better model how LUTs pack for static 
Signed-off-by: gatecat <[email protected]>
 2026-05-06 11:27:52 +02:00
gatecat fc18d9c1e8 xilinx: Tweaks to static config 
Signed-off-by: gatecat <[email protected]>
 2026-05-06 11:19:25 +02:00
gatecat c4cbc3ff88 static: Log legalisation displacement per group 
Signed-off-by: gatecat <[email protected]>
 2026-05-06 08:29:47 +02:00
gatecat 6fffc4d2c7 static: Fix offset when aligning macros 
Signed-off-by: gatecat <[email protected]>
 2026-05-06 07:59:27 +02:00
gatecat 946faea376 static: Fallback termination criteria for tricky cases 
Signed-off-by: gatecat <[email protected]>
 2026-05-05 15:44:20 +02:00
gatecat 272b1097d0 static: Fix handling of heterogeneous macros 
Signed-off-by: gatecat <[email protected]>
 2026-05-05 15:29:38 +02:00
gatecat 91ecaa6ad6 gatemate: Enable static placer as an option 
Signed-off-by: gatecat <[email protected]>
 2026-05-05 15:13:31 +02:00
gatecat ebd364bfee gui: Fix crash when pass throws error 
Signed-off-by: gatecat <[email protected]>
 2026-05-05 14:26:05 +02:00
gatecat 211cb5703c static: Consistent HPWL reporting with other placers 
Signed-off-by: gatecat <[email protected]>
 2026-05-04 18:12:09 +02:00
gatecat ca6a25e41e static: Fix exponent overflow on big designs 
Signed-off-by: gatecat <[email protected]>
 2026-05-04 18:12:09 +02:00
gatecat fcc80c5332 himbaechel: bounds check getBelByLocation 
Signed-off-by: gatecat <[email protected]>
 2026-05-04 13:38:04 +02:00
gatecat 92c392f5f5 heap: Fix updating of chain cells 
Signed-off-by: gatecat <[email protected]>
 2026-05-04 13:11:05 +02:00
Catherine ec1b3fde8f Merge pull request #1711 from YosysHQ/cat/wasm-exception-cleanup 
Remove Wasm exception handling workarounds
 2026-05-01 13:34:28 +01:00
Catherine 1407b33558 Ensure only non-truncating values are returned from main(). 
POSIX allows any `int` value to be returned but specifies that only
the low 8 bits are available in some contexts:
  https://pubs.opengroup.org/onlinepubs/9699919799/functions/_exit.html

For reasons that aren't entirely clear, WASI requires the value to be
in range [0;126), and this is enforced with an assertion at runtime
level in Wasmtime. This should probably be fixed in Wasmtime but until
it is done there doesn't seem to be any harm in returning `125` instead
of `-1`. This also removes any discrepancy due to truncation.
 2026-05-01 11:22:38 +00:00
Catherine 6cf255cc2b Remove Wasm exception handling workarounds. 2026-05-01 11:08:43 +00:00
myrtle 42e248b99e gowin: Initial estimateDelay and ripup penalty (#1708) 
Signed-off-by: gatecat <[email protected]>
 2026-04-30 08:07:11 +02:00
Josef Gajdusek 0a8a848a72 Minor UX improvements to the generic example code (#1706) 
* generic: Fix Python path not including the examples/ directory in the example

It seems that at some point, the embedded Python stopped including the
directory that nextpnr-generic was executed in inside of its sys.path.
This likely happened by de3d5be8 specifying an explicit argv to
the interpreter init function.

* generic: Improve the example for K != 4

Configuring K < 4 used to result in "dangling" inputs to the cells being
generated (those are just not driven by anything in the resulting Verilog/JSON).

Configuring K > 4 used to result in an assertion crash in cells.cc.

The ctx.setLutK call fixes both cases.
 2026-04-28 13:08:44 +02:00
myrtle 3c29cc217e gatemate: Handle missing INIT on BRAMs (#1707) 
Signed-off-by: gatecat <[email protected]>
 2026-04-28 13:08:08 +02:00
gatecat 98c18d7f14 router2: Fix ripup of constant nets 
Signed-off-by: gatecat <[email protected]>
 2026-04-21 14:00:12 +02:00
myrtle ce08c3053c Remove unused --slack_redist_iter option (#1704) 
Signed-off-by: gatecat <[email protected]>
 2026-04-20 16:19:00 +02:00
gatecat d5e6bfc74e clangformat 
Signed-off-by: gatecat <[email protected]>
 2026-04-20 15:45:20 +02:00
gatecat f2e650223a xilinx: Routeability tuning 
Signed-off-by: gatecat <[email protected]>
 2026-04-20 15:44:45 +02:00
myrtle 2a84cc9c55 xilinx: Add LUT route-thru pips (#1703) 
Signed-off-by: gatecat <[email protected]>
 2026-04-20 11:47:38 +02:00
gatecat 68978f076f router2: Also write congestion-per-net in heatmap mode 
Signed-off-by: gatecat <[email protected]>
 2026-04-20 10:04:41 +02:00
mrcmry 33e1c9033b Improve file open error messages (#1700) 
Define open_(o|i)fstream_and_log_error in log.h to:
- quote 'filename'
- add error cause to easier troubleshoot
- use existing consistent string style
- easily allows OS specific message

Introduce it when file are opened and add it where error message
was missing.
 2026-04-19 16:41:47 +02:00
gatecat 28fefe6172 xilinx: Allow loading post-place JSON for router dev 
Signed-off-by: gatecat <[email protected]>
 2026-04-17 10:47:04 +02:00
gatecat 0fa7ee0ce5 xilinx: Improve delay estimate 
Signed-off-by: gatecat <[email protected]>
 2026-04-17 10:20:32 +02:00
gatecat 7de80fbb9c ecp5: Fix placement of LUT permutation switchboxes 
Signed-off-by: gatecat <[email protected]>
 2026-04-15 14:41:04 +02:00