Merge branch 'master' into netgen-1.5

VERSION

@@ -1 +1 @@
-1.5.158
+1.5.152

base/netcmp.c

@@ -158,9 +158,6 @@ int right_col_end = 87;
 /* if TRUE, always partition ALL classes */
 int ExhaustiveSubdivision = 0;
 
-/* if TRUE, use fast symmetry breaking to resolve automorphisms */
-int FastSymmetryBreaking = 1;
-
 #ifdef TEST
 static void PrintElement_List(struct Element *E)
 {
@@ -5249,12 +5246,6 @@ void DumpNetworkAll(char *model, int file)
 /* NOTE:  ob1 must belong to Circuit1, and ob2 must belong to	*/
 /* Circuit2.  The calling procedure is responsble for ensuring	*/
 /* that this is true.						*/
-/*								*/
-/* NOTE:  This routine assumes that if file1 == file2 or if	*/
-/* file2 != Circuit1->graph, then "do_print" is FALSE.  It 	*/
-/* hard-codes "Circuit 1" and "Circuit 2" in most print		*/
-/* statements.  file1 == file2 only when checking properties	*/
-/* for symmetry breaking, where nothing is printed.		*/
 /*--------------------------------------------------------------*/
 
 #ifdef TCL_NETGEN
@@ -5262,9 +5253,8 @@ Tcl_Obj *
 #else
 void
 #endif
-PropertyMatch(struct objlist *ob1, int file1,
-		struct objlist *ob2, int file2,
-		int do_print, int do_list, int *retval)
+PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print,
+		int do_list, int *retval)
 {
    struct nlist *tc1, *tc2;
    struct objlist *tp1, *tp2, *obn1, *obn2;
@@ -5278,22 +5268,8 @@ PropertyMatch(struct objlist *ob1, int file1,
    Tcl_Obj *proplist = NULL, *mpair, *mlist;
 #endif
 
-   tc1 = LookupCellFile(ob1->model.class, file1);
-   tc2 = LookupCellFile(ob2->model.class, file2);
-
-   if (tc1 == NULL || tc2 == NULL) {
-      if (tc1 == NULL)
-	 Fprintf(stdout, "Error:  Circuit %d device \"%s\" not found!\n",
-		    file1, ob1->model.class);
-      else
-	 Fprintf(stdout, "Error:  Circuit %d device \"%s\" not found!\n",
-		    file2, ob2->model.class);
-#ifdef TCL_NETGEN
-      return NULL;
-#else
-      return;
-#endif
-   }
+   tc1 = LookupCellFile(ob1->model.class, Circuit1->file);
+   tc2 = LookupCellFile(ob2->model.class, Circuit2->file);
 
    if (tc1->classhash != tc2->classhash) {
       *retval = -1;
@@ -5574,11 +5550,9 @@ PropertyCheck(struct ElementClass *EC, int do_print, int do_list, int *rval)
       E2 = Etmp;
    }
 #ifdef TCL_NETGEN
-   return PropertyMatch(E1->object, E1->graph, E2->object, E2->graph,
-		do_print, do_list, rval);
+   return PropertyMatch(E1->object, E2->object, do_print, do_list, rval);
 #else
-   PropertyMatch(E1->object, E1->graph, E2->object, E2->graph,
-		do_print, do_list, rval);
+   PropertyMatch(E1->object, E2->object, do_print, do_list, rval);
 #endif
 }
 
@@ -5817,8 +5791,10 @@ int ResolveAutomorphsByProperty()
 		badmatch = FALSE;
 		for (E2 = E1->next; E2 != NULL; E2 = E2->next) {
 		    if (E2->hashval != orighash) continue;
-		    PropertyMatch(E1->object, E1->graph, E2->object, E2->graph,
-			    FALSE, FALSE, &result);
+		    if (E1->graph == Circuit1->file) 
+			PropertyMatch(E1->object, E2->object, FALSE, FALSE, &result);
+		    else
+			PropertyMatch(E2->object, E1->object, FALSE, FALSE, &result);
 		    if (result == 0) {
 			E2->hashval = newhash;
 			if (E2->graph == E1->graph)
@@ -5865,81 +5841,7 @@ int ResolveAutomorphsByProperty()
 /*
  *-------------------------------------------------------------------------
  *
- * ResolveAutormorphismsFull --
- *
- * Arbitrarily equivalence one pair of elements within an automorphic class
- *
- * Return value is the same as VerifyMatching()
- *
- *-------------------------------------------------------------------------
- */
-
-int ResolveAutomorphismsFull()
-{
-  struct ElementClass *EC;
-  struct Element *E;
-  struct NodeClass *NC;
-  struct Node *N;
-  int C1, C2;
-
-  for (EC = ElementClasses; EC != NULL; EC = EC->next) {
-    struct Element *E1, *E2;
-    C1 = C2 = 0;
-    E1 = E2 = NULL;
-    for (E = EC->elements; E != NULL; E = E->next) {
-      if (E->graph == Circuit1->file) {
-	C1++;
-	E1 = E;
-      }
-      else {
-	C2++;
-	E2 = E;
-      }
-    }
-    if (C1 == C2 && C1 != 1) {
-      unsigned long newhash;
-      Magic(newhash);
-      E1->hashval = newhash;
-      E2->hashval = newhash;
-      goto converge;
-    }
-  }
-
-  for (NC = NodeClasses; NC != NULL; NC = NC->next) {
-    struct Node *N1, *N2;
-    C1 = C2 = 0;
-    N1 = N2 = NULL;
-    for (N = NC->nodes; N != NULL; N = N->next) {
-      if (N->graph == Circuit1->file) {
-	C1++;
-	N1 = N;
-      }
-      else {
-	C2++;
-	N2 = N;
-      }
-    }
-    if (C1 == C2 && C1 != 1) {
-      unsigned long newhash;
-      Magic(newhash);
-      N1->hashval = newhash;
-      N2->hashval = newhash;
-      goto converge;
-    }
-  }
-
- converge:
-  FractureElementClass(&ElementClasses);
-  FractureNodeClass(&NodeClasses);
-  ExhaustiveSubdivision = 1;
-  while (!Iterate() && VerifyMatching() != -1);
-  return(VerifyMatching());
-}
-
-/*
- *-------------------------------------------------------------------------
- *
- * ResolveElementAutomorphismsFast --
+ * ResolveElementAutomorphisms --
  *
  * Apply arbitrary symmetry breaking to symmetric element lists, then
  * iterate exhaustively to resolve all automorphisms.
@@ -5949,7 +5851,7 @@ int ResolveAutomorphismsFull()
  *-------------------------------------------------------------------------
  */
 
-int ResolveElementAutomorphismsFast()
+int ResolveElementAutomorphisms()
 {
   struct ElementClass *EC;
   struct Element *E;
@@ -6001,7 +5903,7 @@ int ResolveElementAutomorphismsFast()
 /*
  *-------------------------------------------------------------------------
  *
- * ResolveNodeAutomorphismsFast --
+ * ResolveNodeAutomorphisms --
  *
  * Apply arbitrary symmetry breaking to symmetric node lists, then iterate
  * exhaustively to resolve all automorphisms.  Normally, all automorphisms
@@ -6014,7 +5916,7 @@ int ResolveElementAutomorphismsFast()
  *
  */
 
-int ResolveNodeAutomorphismsFast()
+int ResolveNodeAutomorphisms()
 {
   struct Node *N;
   struct NodeClass *NC;
@@ -6068,20 +5970,7 @@ int ResolveNodeAutomorphismsFast()
  *
  * ResolveAutormorphisms --
  *
- * Do symmetry breaking of automorphisms.  If FastSymmetryBreaking is
- * False (not the default), then run ResolveAutomorphismsFull() (q.v.).
- * Otherwise, run the fast symmetry breaking method:
- *
- * Arbitrarily equivalence all pairs of elements and nodes within all
- * automorphic classes, and run to completion.  Note that this is a
- * fast version of ResolveAutomorphismsFull(), and can run many orders
- * of magnitude faster.  However, it can also produce an incorrect
- * result, declaring a global mismatch where none exists.  In that
- * case, the matching should be re-run with ResolveAutomorphismsFull().
- *
- * Some investigation needs to be done to determine if there is a way
- * to execute faster symmetry breaking without the possibility of
- * producing an incorrect result.
+ * Arbitrarily equivalence one pair of elements within an automorphic class
  *
  * Return value is the same as VerifyMatching()
  *
@@ -6092,12 +5981,9 @@ int ResolveAutomorphisms()
 {
     int result;
 
-    if (FastSymmetryBreaking == 0)
-	return ResolveAutomorphismsFull();
-
-    result = ResolveElementAutomorphismsFast();
+    result = ResolveElementAutomorphisms();
     if (result != 0)
-	result = ResolveNodeAutomorphismsFast();
+	result = ResolveNodeAutomorphisms();
 
     return result;
 }
@@ -7032,8 +6918,6 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
       if (*(cover + i) == (char)0) {
 	 j = 0;
          for (ob2 = tc2->cell; ob2 != NULL; ob2 = ob2->next) {
-	    char *name1, *name2;
-
 	    if (!IsPort(ob2)) break;
 
 	    bangptr2 = strrchr(ob2->name, '!');
@@ -7041,14 +6925,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
 	       *bangptr2 = '\0';
 	    else bangptr2 = NULL;
 
-	    name1 = ob1->name;
-	    name2 = ob2->name;
-
-	    /* Recognize proxy pins as matching */
-	    if (!strncmp(name1, "proxy", 5)) name1 +=5;
-	    if (!strncmp(name2, "proxy", 5)) name2 +=5;
-
-	    if ((*matchfunc)(name1, name2)) {
+	    if ((*matchfunc)(ob1->name, ob2->name)) {
 	       ob2->model.port = i;		/* save order */
 	       *(cover + i) = (char)1;
 
@@ -7155,7 +7032,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
          obn->name = (char *)MALLOC(6 + strlen(ob2->name));
          sprintf(obn->name, "proxy%s", ob2->name);
          obn->type = UNKNOWN;
-         // obn->model.port = -1;
+         obn->model.port = -1;
          obn->instance.name = NULL;
          obn->node = -1;
 	 if (ob1 == tc1->cell) {
@@ -7225,25 +7102,6 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
          obn->instance.name = NULL;
          obn->node = -1;
 
-#if 0
-	 /* Note:  This pin has already been accounted for */
-	 if (Debug == 0) {
-	    if (strcmp(ob1->name, "(no pins)")) {
-	       for (m = 0; m < left_col_end; m++) *(ostr + m) = ' ';
-	       for (m = left_col_end + 1; m < right_col_end; m++) *(ostr + m) = ' ';
-	       snprintf(ostr, left_col_end, "%s", ob1->name);
-	       snprintf(ostr + left_col_end + 1, left_col_end, "(no matching pin)");
-	       for (m = 0; m < right_col_end + 1; m++)
-		  if (*(ostr + m) == '\0') *(ostr + m) = ' ';
-	       Fprintf(stdout, ostr);
-	    }
-	 }
-	 else {
-	    Fprintf(stderr, "No netlist match for cell %s pin %s\n",
-				tc1->name, ob1->name);
-	 }
-#endif
-
 	 if (ob2 == tc2->cell) {
 	    obn->next = ob2;
 	    tc2->cell = obn;
@@ -7547,8 +7405,7 @@ static void handler(int sig)
 /*----------------------------------------------------------------------*/
 /* Note that this cover-all routine is not called from the Tcl/Tk	*/
 /* version, which replaces it with the script "lvs".			*/
-/* return 1 if the two are identical.  Try to resolve automorphisms	*/
-/* using the original "full" symmetry breaking algorithm.		*/
+/* return 1 if the two are identical.  Try to resolve automorphisms.	*/
 /*----------------------------------------------------------------------*/
 
 int Compare(char *cell1, char *cell2)

base/netcmp.h

@@ -7,7 +7,6 @@ extern struct nlist *Circuit1;
 extern struct nlist *Circuit2;
 
 extern int ExhaustiveSubdivision;
-extern int FastSymmetryBreaking;
 
 extern int left_col_end;
 extern int right_col_end;

base/objlist.c

@@ -1112,17 +1112,13 @@ void FreeObjectAndHash(struct objlist *ob, struct nlist *ptr)
 
 /***************  GENERAL UTILITIES ****************************/
 
-int NumberOfPorts(char *cellname, int file)
+int NumberOfPorts(char *cellname)
 {
   struct nlist *tp;
   struct objlist *ob;
   int ports;
 
-  if (file == -1)
-    tp = LookupCell(cellname);
-  else
-    tp = LookupCellFile(cellname, file);
-
+  tp = LookupCell(cellname);
   if (tp == NULL) return(0);
   ports = 0;
   for (ob = tp->cell; ob != NULL; ob = ob->next)

base/objlist.h

@@ -242,7 +242,7 @@ extern void FreeObjectAndHash(struct objlist *ob, struct nlist *ptr);
 extern void FreePorts(char *cellname);
 extern struct IgnoreList *ClassIgnore;
 
-extern int NumberOfPorts(char *cellname, int file);
+extern int NumberOfPorts(char *cellname);
 extern struct objlist *InstanceNumber(struct nlist *tp, int inst);
 
 extern struct objlist *List(char *list_template);

base/place.c

@@ -929,7 +929,7 @@ void ToggleDebug(void)
 void DescribeCell(char *name, int detail)
 {
   Printf("Cell: %s contains %d instances, %d nodes and %d ports\n", name, 
-	 NumberOfInstances(name),  RenumberNodes(name), NumberOfPorts(name, -1));
+	 NumberOfInstances(name),  RenumberNodes(name), NumberOfPorts(name));
   PrintEmbeddingTree(stdout,name,detail);
 }
 

base/query.c

@@ -801,11 +801,7 @@ void DescribeInstance(char *name, int file)
   {
     if (ob->node > nodemax) nodemax = ob->node;
     else if ((ob->node == -1) && (ob->model.port != PROXY)) {
-
-      /* All black-box modules and placeholders by definition have all	*/
-      /* disconnected pins, so don't report those.			*/
-
-      if (!(tp->flags & CELL_PLACEHOLDER) && (tp->class != CLASS_MODULE))
+      if (!(tp->flags & CELL_PLACEHOLDER))
       {
 	if (disconnectednodes == 0) Fprintf(stderr, "\n");
         disconnectednodes++;
@@ -907,7 +903,7 @@ void PrintLeavesInCell(char *cellname, int filenum)
   np->dumped = 1;
 
   if (np->class != CLASS_SUBCKT) {
-    Printf("%s; %d ports; Primitive.\n", cellname, NumberOfPorts(cellname, filenum));
+    Printf("%s; %d ports; Primitive.\n", cellname, NumberOfPorts(cellname));
     return;
   }
 
@@ -920,7 +916,7 @@ void PrintLeavesInCell(char *cellname, int filenum)
       am_a_leaf = 0;
     }
 
-  if (am_a_leaf) Printf("%s; %d ports\n", cellname, NumberOfPorts(cellname, filenum));
+  if (am_a_leaf) Printf("%s; %d ports\n", cellname, NumberOfPorts(cellname));
   return;
 }
 

base/verilog.c

@@ -1225,12 +1225,7 @@ skip_endmodule:
 		    lhs = LookupObject(nodename, CurrentCell);
 		    *aptr = '[';
 		}
-		else {
-		    strcpy(noderoot, nexttok);
-		    /* Set LHS to the start of the vector */
-		    sprintf(nodename, "%s[%d]", nexttok, wb.start);
-		    lhs = LookupObject(nodename, CurrentCell);
-		}
+		else strcpy(noderoot, nexttok);
 	    }
 	    else {
 		lhs = LookupObject(nexttok, CurrentCell);
@@ -1295,21 +1290,13 @@ skip_endmodule:
 			if (rhs != NULL) {
 			    Printf("Improper assignment;  left-hand side cannot "
 					"be parsed.\n");
-			    if (j != -1)
-			    	Printf("Right-hand side is \"%s\".\n", assignroot);
-			    else
-			    	Printf("Right-hand side is \"%s\".\n", rhs->name);
-			    Printf("Improper expression is \"%s\".\n", nexttok);
+			    Printf("Right-hand side is \"%s\".\n", rhs->name);
 			    break;
 			}
 			if (lhs != NULL) {
 			    Printf("Improper assignment;  right-hand side cannot "
 					"be parsed.\n");
-			    if (i != -1)
-			    	Printf("Left-hand side is \"%s\".\n", noderoot);
-			    else
-			    	Printf("Left-hand side is \"%s\".\n", lhs->name);
-			    Printf("Improper expression is \"%s\".\n", nexttok);
+			    Printf("Left-hand side is \"%s\".\n", lhs->name);
 			    /* Not parsable, probably behavioral verilog? */
 			    Printf("Module '%s' is not structural verilog, "
 				    "making black-box.\n", model);
@@ -1867,7 +1854,7 @@ nextinst:
 		     if (is_bundle &&
 			    ((i == -1) ||
 			    ((wbb.start > wbb.end) && (i < wbb.end)) ||
-			    ((wbb.start <= wbb.end) && (i > wbb.end)))) {
+			    ((wbb.start < wbb.end) && (i > wbb.end)))) {
 		         if (bptr) *bptr = '[';
 
 			 netname = cptr + 1;

configure

@@ -4,6 +4,4 @@
 # all of its config scripts in a different directory than the configure
 # script itself.
 
-export CFLAGS="$CFLAGS -g"
-cd scripts
-exec ./configure "$@"
+( CFLAGS="-g" ; export CFLAGS ; cd scripts ; ./configure "$@" )

tcltk/netgen.sh

@@ -1,60 +0,0 @@
-#!/bin/bash
-#
-# For installation, put this file (netgen.sh) in a standard executable path.
-# Put startup script "netgen.tcl" and shared library "tclnetgen.so"
-# in ${CAD_ROOT}/netgen/tcl/, with a symbolic link from file
-# ".wishrc" to "netgen.tcl".
-#
-# This script starts irsim under the Tcl interpreter,
-# reading commands from a special .wishrc script which
-# launches irsim and retains the Tcl interactive interpreter.
-
-# Parse for the argument "-c[onsole]".  If it exists, run netgen
-# with the TkCon console.  Strip this argument from the argument list.
-
-TKCON=true
-BATCH=
-GUI=
-NETGEN_WISH=/usr/bin/wish
-export NETGEN_WISH
-
-# Hacks for Cygwin
-if [ ${TERM:=""} = "cygwin" ]; then
-   export PATH="$PATH:/usr/lib"
-   export DISPLAY=${DISPLAY:=":0"}
-fi
-
-# Preserve quotes in arguments (thanks, Stackoverflow!)
-arglist=''
-for i in "$@" ; do
-   case $i in
-      -noc*) TKCON=;;
-      -bat*) BATCH=true; TKCON=;;
-      -gui) GUI=true; TKCON=;;
-      *) arglist="$arglist${arglist:+ }\"${i//\"/\\\"}\"";;
-   esac
-done 
-
-if [ $TKCON ]; then
-
-   exec /usr/local/lib/netgen/tcl/tkcon.tcl \
-	-eval "source /usr/local/lib/netgen/tcl/console.tcl" \
-	-slave "package require Tk; set argc $#; set argv [list $arglist]; \
-	source /usr/local/lib/netgen/tcl/netgen.tcl"
-
-# Run the Python LVS manager GUI
-
-elif [ $GUI ]; then
-    exec /usr/local/lib/netgen/python/lvs_manager.py $@
-
-#
-# Run the stand-in for wish (netgenexec), which acts exactly like "wish"
-# except that it replaces ~/.wishrc with netgen.tcl.  This executable is
-# *only* needed when running without the console; the console itself is
-# capable of sourcing the startup script.
-#
-
-else
-   exec /usr/local/lib/netgen/tcl/netgenexec -- "$@"
-
-fi

tcltk/netgen.tcl

@@ -1,753 +0,0 @@
-# Wishrc startup for ToolScript (netgen)
-#
-# For installation:  Put this file and also tclnetgen.so into
-# directory ${CAD_ROOT}/netgen/tcl/, and set the "load" line below
-# to point to the location of tclnetgen.so.  Also see comments
-# in shell script "netgen.sh".
-#
-
-# Check namespaces for existence of other applications
-set UsingMagic 0
-set UsingXCircuit 0
-set UsingIRSIM 0
-set batchmode 0
-set nlist [namespace children]
-foreach i $nlist {
-   switch $i {
-      ::magic { set UsingMagic 1 }
-      ::xcircuit { set UsingXCircuit 1 }
-      ::irsim { set UsingIRSIM 1 }
-   }
-}
-
-# -lazy option not needed if stubs libraries are handled correctly
-# load -lazy /usr/local/lib/netgen/tcl/tclnetgen.so
-
-load /usr/local/lib/netgen/tcl/tclnetgen.so
-
-#----------------------------------------------------------------
-# Convert LVS list result into a JSON file 
-#----------------------------------------------------------------
-
-proc netgen::convert_to_json {filename lvs_final} {
-   set pidx [string last . $filename]
-   set jsonname [string replace $filename $pidx end ".json"]
-   if {![catch {open $jsonname w} fjson]} {
-      puts $fjson "\["
-      # Outer list is of each cell compared
-      set clen [llength $lvs_final]
-      set cidx 0
-      foreach circuit $lvs_final {
-         incr cidx
-         puts $fjson "  \{"
-         set nkeys [llength $circuit]
-         set kidx 0
-	 foreach {key value} $circuit {
-            incr kidx 2
-	    switch $key {
-	       name {
-	          puts $fjson "   \"${key}\": \["
-		  set cktval [lindex $value 0]
-		  puts $fjson "      \"${cktval}\","
-		  set cktval [lindex $value 1]
-		  puts $fjson "      \"${cktval}\""
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       pins {
-	          puts $fjson "   \"${key}\": \["
-	          puts $fjson "      \["
-		  set cktval [lindex $value 0]
-		  foreach pin [lrange $cktval 0 end-1] {
-		     puts $fjson "        \"$pin\","
-		  }
-		  set pin [lindex $cktval end]
-		  puts $fjson "        \"$pin\""
-	          puts $fjson "      \], \["
-		  set cktval [lindex $value 1]
-		  foreach pin [lrange $cktval 0 end-1] {
-		     puts $fjson "        \"$pin\","
-		  }
-		  set pin [lindex $cktval end]
-		  puts $fjson "        \"$pin\""
-	          puts $fjson "      \]"
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-               nets {
-	          puts $fjson "   \"${key}\": \["
-		  set cktval [lindex $value 0]
-		  puts $fjson "    $cktval,"
-		  set cktval [lindex $value 1]
-		  puts $fjson "    $cktval"
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-               }
-	       devices {
-	          puts $fjson "   \"${key}\": \["
-	          puts $fjson "       \["
-		  set cktval [lindex $value 0]
-		  foreach dev [lrange $cktval 0 end-1] {
-		     set devname [lindex $dev 0]
-		     set devnum  [lindex $dev 1]
-		     puts $fjson "         \[\"${devname}\", ${devnum}\],"
-		  }
-		  set dev [lindex $cktval end]
-		  set devname [lindex $dev 0]
-		  set devnum  [lindex $dev 1]
-		  puts $fjson "         \[\"${devname}\", ${devnum} \]"
-	          puts $fjson "       \], \["
-		  set cktval [lindex $value 1]
-		  foreach dev [lrange $cktval 0 end-1] {
-		     set devname [lindex $dev 0]
-		     set devnum  [lindex $dev 1]
-		     puts $fjson "         \[\"${devname}\", ${devnum} \],"
-		  }
-		  set dev [lindex $cktval end]
-		  set devname [lindex $dev 0]
-		  set devnum  [lindex $dev 1]
-		  puts $fjson "         \[\"${devname}\", ${devnum} \]"
-	          puts $fjson "       \]"
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       goodnets -
-	       badnets {
-	          puts $fjson "   \"${key}\": \["
-		  set glen [llength $value]
-		  set gidx 0
-		  foreach group $value {
-		     incr gidx
-	             puts $fjson "      \["
-	             puts $fjson "        \["
-		     set cktval [lindex $group 0]
-		     set nlen [llength $cktval]
-		     set nidx 0
-		     foreach net $cktval {
-			incr nidx
-	                puts $fjson "          \["
-			set netname [string map {"\\" "\\\\"} [lindex $net 0]]
-		        puts $fjson "            \"$netname\","
-		        puts $fjson "            \["
-			set netconn [lindex $net 1]
-			foreach fanout [lrange $netconn 0 end-1] {
-			   set devname [lindex $fanout 0]
-			   set pinname [lindex $fanout 1]
-			   set count [lindex $fanout 2]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$devname\", \"$pinname\", $count \],"
-			}
-			set fanout [lindex $netconn end]
-			set devname [lindex $fanout 0]
-			set pinname [lindex $fanout 1]
-			set count [lindex $fanout 2]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$devname\", \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$nidx == $nlen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \], \["
-		     set cktval [lindex $group 1]
-		     set nlen [llength $cktval]
-		     set nidx 0
-		     foreach net $cktval {
-			incr nidx
-	                puts $fjson "          \["
-			set netname [string map {"\\" "\\\\"} [lindex $net 0]]
-		        puts $fjson "            \"$netname\","
-		        puts $fjson "            \["
-			set netconn [lindex $net 1]
-			foreach fanout [lrange $netconn 0 end-1] {
-			   set devname [lindex $fanout 0]
-			   set pinname [lindex $fanout 1]
-			   set count [lindex $fanout 2]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$devname\", \"$pinname\", $count \],"
-			}
-			set fanout [lindex $netconn end]
-			set devname [lindex $fanout 0]
-			set pinname [lindex $fanout 1]
-			set count [lindex $fanout 2]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$devname\", \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$nidx == $nlen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \]"
-		     if {$gidx == $glen} {
-	                puts $fjson "      \]"
-		     } else {
-	                puts $fjson "      \],"
-		     }
-		  }
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       goodelements -
-	       badelements {
-	          puts $fjson "   \"${key}\": \["
-		  set glen [llength $value]
-		  set gidx 0
-		  foreach group $value {
-		     incr gidx
-	             puts $fjson "      \["
-	             puts $fjson "        \["
-		     set cktval [lindex $group 0]
-		     set ilen [llength $cktval]
-		     set iidx 0
-		     foreach inst $cktval {
-			incr iidx
-	                puts $fjson "          \["
-			set instname [string map {"\\" "\\\\"} [lindex $inst 0]]
-		        puts $fjson "            \"$instname\","
-		        puts $fjson "            \["
-			set instpins [lindex $inst 1]
-			foreach fanout [lrange $instpins 0 end-1] {
-			   set pinname [lindex $fanout 0]
-			   set count [lindex $fanout 1]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$pinname\", $count \],"
-			}
-			set fanout [lindex $instpins end]
-			set pinname [lindex $fanout 0]
-			set count [lindex $fanout 1]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$iidx == $ilen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \], \["
-		     set cktval [lindex $group 1]
-		     set ilen [llength $cktval]
-		     set iidx 0
-		     foreach inst $cktval {
-			incr iidx
-	                puts $fjson "          \["
-			set instname [string map {"\\" "\\\\"} [lindex $inst 0]]
-		        puts $fjson "            \"$instname\","
-		        puts $fjson "            \["
-			set instpins [lindex $inst 1]
-			foreach fanout [lrange $instpins 0 end-1] {
-			   set pinname [lindex $fanout 0]
-			   set count [lindex $fanout 1]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$pinname\", $count \],"
-			}
-			set fanout [lindex $instpins end]
-			set pinname [lindex $fanout 0]
-			set count [lindex $fanout 1]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$iidx == $ilen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \]"
-		     if {$gidx == $glen} {
-	                puts $fjson "      \]"
-		     } else {
-	                puts $fjson "      \],"
-		     }
-		  }
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       properties {
-	          puts $fjson "   \"${key}\": \["
-		  set plen [llength $value]
-                  set pidx 0
-		  foreach instance $value {
-		     incr pidx
-	             puts $fjson "      \["
-		     set instnames [string map {"\\" "\\\\"} [lindex $instance 0]]
-		     set instname0 [string map {"\\" "\\\\"} [lindex $instnames 0]]
-	             puts $fjson "         \["
-		     puts $fjson "           \"${instname0}\","
-	             puts $fjson "           \["
-		     foreach property [lrange $instance 1 end-1] {
-		        set prop0 [lindex $property 0]
-			set propname [lindex $prop0 0]
-			set propval [lindex $prop0 1]
-		        puts $fjson "             \[\"${propname}\", \"${propval}\"\],"
-		     }
-		     set property [lindex $instance end]
-		     set prop0 [lindex $property 0]
-		     set propname [lindex $prop0 0]
-		     set propval [lindex $prop0 1]
-		     puts $fjson "             \[\"${propname}\", \"${propval}\"\]"
-	             puts $fjson "           \]"
-	             puts $fjson "         \],"
-		     set instname1 [string map {"\\" "\\\\"} [lindex $instnames 1]]
-	             puts $fjson "         \["
-		     puts $fjson "           \"${instname1}\","
-	             puts $fjson "           \["
-		     foreach property [lrange $instance 1 end-1] {
-		        set prop1 [lindex $property 1]
-			set propname [lindex $prop1 0]
-			set propval [lindex $prop1 1]
-		        puts $fjson "             \[\"${propname}\", \"${propval}\"\],"
-		     }
-		     set property [lindex $instance end]
-		     set prop1 [lindex $property 1]
-		     set propname [lindex $prop1 0]
-		     set propval [lindex $prop1 1]
-		     puts $fjson "             \[\"${propname}\", \"${propval}\"\]"
-	             puts $fjson "           \]"
-	             puts $fjson "         \]"
-		     if {$pidx == $plen} {
-	                puts $fjson "      \]"
-		     } else {
-	                puts $fjson "      \],"
-		     }
-		  }
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	    }
-	 }
-         if {$cidx == $clen} {
-            puts $fjson "  \}"
-	 } else {
-            puts $fjson "  \},"
-	 }
-      }
-      puts $fjson "\]"
-   }
-   close $fjson
-}
-
-#----------------------------------------------------------------
-# Define the "lvs" command as a way of calling the netgen options
-# for standard compare, essentially the same as the old "netcomp"
-# standalone program.
-#
-# Use the "canonical" command to parse the file and cell names,
-# although if the cells have not been read in yet, then the
-# original syntax of filename or {filename cellname} is required.
-#
-# "args" is passed to verify and may therefore contain only the
-# value "-list" or nothing.  If "-list", then output is returned
-# as a nested list.
-#----------------------------------------------------------------
-
-proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
-   set dolist 0
-   set dojson 0
-   foreach arg $args {
-      if {$arg == "-list"} {
-	 puts stdout "Generating list result"
-	 set dolist 1
-	 set lvs_final {}
-      } elseif {$arg == "-json"} {
-	 puts stdout "Generating JSON file result"
-	 set dolist 1
-	 set dojson 1
-	 set lvs_final {}
-      } elseif {$arg == "-blackbox"} {
-	 puts stdout "Treating empty subcircuits as black-box cells"
-	 netgen::model blackbox on
-      } elseif {$arg == "-full"} {
-	 puts stdout "Using full symmetry breaking method"
-	 netgen::symmetry full
-      }
-   }
-
-   # Allow name1 or name2 to be a list of {filename cellname},
-   # A single <filename>, or any valid_cellname form if the
-   # file has already been read.
-
-   if {[catch {set flist1 [canonical $name1]}]} {
-      if {[llength $name1] == 2} {
-         set file1 [lindex $name1 0]
-         set cell1 [lindex $name1 1]
-      } else {
-         set file1 $name1
-         set cell1 $name1
-      }
-      puts stdout "Reading netlist file $file1"
-      set fnum1 [netgen::readnet $file1]
-   } else {
-      set cell1 [lindex $flist1 0]
-      set fnum1 [lindex $flist1 1]
-      set flist1 [canonical $fnum1]
-      set file1 [lindex $flist1 0]
-   }
-
-   if {[catch {set flist2 [canonical $name2]}]} {
-      if {[llength $name2] == 2} {
-         set file2 [lindex $name2 0]
-         set cell2 [lindex $name2 1]
-      } else {
-         set file2 $name2
-         set cell2 $name2
-      }
-      puts stdout "Reading netlist file $file2"
-      set fnum2 [netgen::readnet $file2]
-   } else {
-      set cell2 [lindex $flist2 0]
-      set fnum2 [lindex $flist2 1]
-      set flist2 [canonical $fnum2]
-      set file2 [lindex $flist2 0]
-   }
-
-   if {$fnum1 == $fnum2} {
-      puts stderr "Both cells are in the same netlist:  Cannot compare!"
-      return
-   }
-
-   set clist1 [cells list $fnum1]
-   set cidx [lsearch -regexp $clist1 ^$cell1$]
-   if {$cidx < 0} {
-      puts stderr "Cannot find cell $cell1 in file $file1"
-      return
-   } else {
-      set cell1 [lindex $clist1 $cidx]
-   }
-   set clist2 [cells list $fnum2]
-   set cidx [lsearch -regexp $clist2 ^$cell2$]
-   if {$cidx < 0} {
-      puts stderr "Cannot find cell $cell2 in file $file2"
-      return
-   } else {
-      set cell2 [lindex $clist2 $cidx]
-   }
-
-   netgen::compare assign "$fnum1 $cell1" "$fnum2 $cell2"
-
-   if {[file exists $setupfile]} {
-      puts stdout "Reading setup file $setupfile"
-      # Instead of sourcing the setup file, run each line so we can
-      # catch individual errors and not let them halt the LVS process
-      set perrors 0
-      if {![catch {open $setupfile r} fsetup]} {
-	 set sline 0
-	 set command {}
-	 while {[gets $fsetup line] >= 0} {
-	    incr sline
-	    append command $line "\n"
-	    if {[info complete $command]} {
-	       if {[catch {uplevel 1 [list namespace eval netgen $command]} msg]} {
-		  set msg [string trimright $msg "\n"]
-		  puts stderr "Error $setupfile:$sline (ignoring), $msg"
-		  incr perrors
-	       }
-	       set command {}
-	    }
-	 }
-	 close $fsetup
-      } else {
-	 puts stdout "Error:  Cannot read the setup file $setupfile"
-      }
-	
-      if {$perrors > 0} {
-	 puts stdout "Warning:  There were errors reading the setup file"
-      }
-   } elseif {[string first nosetup $setupfile] < 0} {
-      netgen::permute default	;# transistors and resistors
-      netgen::property default
-   }
-
-   if {[string first nolog $logfile] < 0} {
-      puts stdout "Comparison output logged to file $logfile"
-      netgen::log file $logfile
-
-      netgen::log start
-      netgen::log echo off
-      set dolog true
-   } else {
-      set dolog false
-   }
-
-   if {$dolist == 1} {
-      set endval [netgen::compare -list hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
-   } else {
-      set endval [netgen::compare hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
-   }
-   if {$endval == {}} {
-      netgen::log put "No cells in queue!\n"
-      return
-   }
-   set properr {}
-   set pinsgood 0
-   while {$endval != {}} {
-      if {$dolist == 1} {
-         netgen::run -list converge
-      } else {
-         netgen::run converge
-      }
-      netgen::log echo on
-      if {[verify equivalent]} {
-	 # Resolve automorphisms by pin and property
-	 if {$dolist == 1} {
-            netgen::run -list resolve
-	 } else {
-            netgen::run resolve
-	 }
-	 set uresult [verify unique]
-         if {$uresult == 0} {
-	    netgen::log put "   Networks match locally but not globally.\n"
-	    netgen::log put "   Probably connections are swapped.\n"
-	    netgen::log put "   Check the end of logfile ${logfile} for implicated nodes.\n"
-	    if {$dolist == 1} {
-	       verify -list nodes
-	    } else {
-	       verify nodes
-	    }
-
-	    # Flatten the non-matching subcircuit (but not the top-level cells)
-            if {[netgen::print queue] != {}} {
-	       netgen::log put "  Flattening non-matched subcircuits $endval"
-	       netgen::flatten class "[lindex $endval 0] $fnum1"
-	       netgen::flatten class "[lindex $endval 1] $fnum2"
-	    }
-	 } else {
-	    # Match pins
-            netgen::log echo off
-	    if {$dolist == 1} {
-		set result [equate -list pins "$fnum1 [lindex $endval 0]" \
-				"$fnum2 [lindex $endval 1]"]
-	    } else {
-		set result [equate pins "$fnum1 [lindex $endval 0]" \
-				"$fnum2 [lindex $endval 1]"]
-	    }
-	    if {$result != 0} {
-		equate classes "$fnum1 [lindex $endval 0]" \
-			 "$fnum2 [lindex $endval 1]"
-	    }
-	    set pinsgood $result
-            netgen::log echo on
-	 }
-	 if {$uresult == 2} {lappend properr [lindex $endval 0]}
-      } else {
-	 # Flatten the non-matching subcircuit (but not the top-level cells)
-         if {[netgen::print queue] != {}} {
-	    netgen::log put "  Flattening non-matched subcircuits $endval"
-	    netgen::flatten class "[lindex $endval 0] $fnum1"
-	    netgen::flatten class "[lindex $endval 1] $fnum2"
-	 }
-      }
-      netgen::log echo off
-      if {$dolist == 1} {
-         catch {lappend lvs_final $lvs_out}
-         set lvs_out {}
-         set endval [netgen::compare -list hierarchical]
-      } else {
-         set endval [netgen::compare hierarchical]
-      }
-   }
-   netgen::log echo off
-   puts stdout "Result: " nonewline
-   netgen::log echo on
-   if {$pinsgood == 0} {
-      netgen::log put "The top level cell failed pin matching.\n"
-   } else {
-      verify only
-   }
-   if {$properr != {}} {
-      netgen::log put "The following cells had property errors: $properr\n"
-   }
-   if {$dolog} {
-      netgen::log end
-   }
-   puts stdout "LVS Done."
-   if {$dojson == 1} {
-      netgen::convert_to_json $logfile $lvs_final
-   } elseif {$dolist == 1} {
-      return $lvs_final
-   }
-}
-
-# It is important to make sure no netgen commands overlap with Tcl built-in
-# commands, because otherwise the namespace import will fail.
-
-proc pushnamespace { name } {
-
-   set y [namespace eval ${name} info commands ::${name}::*]
-   set z [info commands]
-
-   foreach v $y {
-      regsub -all {\*} $v {\\*} i
-      set x [namespace tail $i]
-      if {[lsearch $z $x] < 0} {
-         namespace import $i
-      } else {
-            puts "Warning: ${name} command '$x' use fully-qualified name '$v'"
-      }
-   }
-}
-
-proc popnamespace { name } {
-   set z [info commands]
-   set l [expr [string length ${name}] + 5]
-
-   while {[set v [lsearch $z ${name}_tcl_*]] >= 0} {
-      set y [lindex $z $v]
-      set w [string range $y $l end]
-      interp alias {} ::$w {}
-      rename ::$y ::$w
-      puts "Info: replacing ::$w with ::$y"
-   }
-   namespace forget ::${name}::*
-}
-
-set auto_noexec 1       ;# don't EVER call UNIX commands w/o "shell" in front
-
-#----------------------------------------------------------------------
-# Cross-Application section
-#----------------------------------------------------------------------
-
-# Setup IRSIM assuming that the Tcl version is installed.
-# We do not need to rename procedure irsim to NULL because it is
-# redefined in a script, which simply overwrites the original.
-
-proc irsim { args } {
-   global CAD_ROOT
-   set irsimscript [glob -nocomplain ${CAD_ROOT}/irsim/tcl/irsim.tcl]
-   if { ${irsimscript} == {} } {
-      puts stderr "\"irsim\" requires Tcl-based IRSIM version 9.6 or newer."
-      puts stderr "Could not find script \"irsim.tcl\".  If IRSIM is installed in a"
-      puts stderr "place other than CAD_ROOT (=${CAD_ROOT}), use the command"
-      puts stderr "\"source <path>/irsim.tcl\" before doing \"irsim\"."
-   } else {
-      source $irsimscript
-      eval {irsim} $args
-   }
-}
-
-# Setup Xcircuit assuming that the Tcl version is installed.
-
-proc xcircuit { args } {
-   global CAD_ROOT
-   global argc
-   global argv
-   set xcircscript [glob -nocomplain ${CAD_ROOT}/xcircuit*/xcircuit.tcl]
-   if { ${xcircscript} == {} } {
-      puts stderr "\"xcircuit\" requires Tcl-based XCircuit version 3.1 or newer."
-      puts stderr "Could not find script \"xcircuit.tcl\".  If XCircuit is installed in a"
-      puts stderr "place other than CAD_ROOT (=${CAD_ROOT}), use the command"
-      puts stderr "\"source <path>/xcircuit.tcl\"."
-   } else {
-      # if there are multiple installed versions, choose the highest version.
-      if {[llength $xcircscript] > 1} {
-        set xcircscript [lindex [lsort -decreasing -dictionary $xcircscript] 0]
-      }
-      set argv $args
-      set argc [llength $args]
-      uplevel #0 source $xcircscript
-   }
-}
-
-# Setup Magic assuming that the Tcl version is installed.
-
-proc magic { args } {
-   global CAD_ROOT
-   global argc
-   global argv
-   set magicscript [glob -nocomplain ${CAD_ROOT}/magic/tcl/magic.tcl]
-   if { ${magicscript} == {} } {
-      puts stderr "\"magic\" requires Tcl-based Magic version 7.2 or newer."
-      puts stderr "Could not find script \"magic.tcl\".  If Magic is installed in a"
-      puts stderr "place other than CAD_ROOT (=${CAD_ROOT}), use the command"
-      puts stderr "\"source <path>/magic.tcl\"."
-   } else {
-      set argv $args
-      set argc [llength $args]
-      uplevel #0 source $magicscript
-   }
-}
-
-#----------------------------------------------------------------------------
-# Have we called netgen from tkcon or a clone thereof?  If so, set NetgenConsole
-#----------------------------------------------------------------------------
-
-if {! $UsingMagic } {
-   if {[lsearch [interp aliases] tkcon] != -1} {
-      set NetgenConsole tkcon
-      wm withdraw .
-   }
-}
-
-pushnamespace netgen
-
-#----------------------------------------------------------------------------
-# For now, if we are standalone, pop down the default Tk window.
-# Sometime later we may wish to provide a standalone GUI frontend in Tk
-# to improve upon the original X11 "xnetgen" frontend.  If so, its
-# definitions would go below.
-
-if {! $UsingMagic } {
-   if {[lsearch [interp aliases] tkcon] != -1} {
-      if {[string range [wm title .] 0 3] == "wish"} {
-	 wm withdraw .
-      }
-   }
-}
-
-#----------------------------------------------------------------------------
-# No-console mode drops "--" in front of the argument list and "-noc"
-# is retained, so remove them.  Internally, the console will be determined
-# by checking for a slave interpreter, so there is no need for any
-# action here other than removing the argument.
-
-if {[lindex $argv 0] == "--"} {
-   incr argc -1
-   set argv [lrange $argv 1 end]
-}
-
-if {[string range [lindex $argv 0] 0 3] == "-noc"} {
-   incr argc -1
-   set argv [lrange $argv 1 end]
-}
-
-if {[string range [lindex $argv 0] 0 3] == "-bat"} {
-   incr argc -1
-   set argv [lrange $argv 1 end]
-   set batchmode 1
-}
-
-#----------------------------------------------------------------------------
-# Anything on the command line is assumed to be a netgen command to evaluate
-
-if {[catch {eval $argv}]} {
-   puts stdout "$errorInfo"
-}
-if {$batchmode == 1} {quit}
-
-#----------------------------------------------------------------------------
-# Netgen start function drops back to interpreter after initialization & setup

tcltk/netgen.tcl.in

@@ -382,9 +382,6 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       } elseif {$arg == "-blackbox"} {
 	 puts stdout "Treating empty subcircuits as black-box cells"
 	 netgen::model blackbox on
-      } elseif {$arg == "-full"} {
-	 puts stdout "Using full symmetry breaking method"
-	 netgen::symmetry full
       }
    }
 
@@ -504,7 +501,6 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       return
    }
    set properr {}
-   set pinsgood 0
    while {$endval != {}} {
       if {$dolist == 1} {
          netgen::run -list converge
@@ -550,7 +546,6 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
 		equate classes "$fnum1 [lindex $endval 0]" \
 			 "$fnum2 [lindex $endval 1]"
 	    }
-	    set pinsgood $result
             netgen::log echo on
 	 }
 	 if {$uresult == 2} {lappend properr [lindex $endval 0]}
@@ -574,11 +569,7 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
    netgen::log echo off
    puts stdout "Result: " nonewline
    netgen::log echo on
-   if {$pinsgood == 0} {
-      netgen::log put "The top level cell failed pin matching.\n"
-   } else {
-      verify only
-   }
+   verify only
    if {$properr != {}} {
       netgen::log put "The following cells had property errors: $properr\n"
    }

tcltk/tclnetgen.c

@@ -94,7 +94,6 @@ int _netcmp_ignore(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_permute(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_property(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_exhaustive(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
-int _netcmp_symmetry(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_restart(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_global(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_convert(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
@@ -245,9 +244,6 @@ Command netcmp_cmds[] = {
 	{"exhaustive",		_netcmp_exhaustive,
 		"\n   "
 		"toggle exhaustive subdivision"},
-	{"symmetry",		_netcmp_symmetry,
-		"[fast|full]\n   "
-		"apply method for symmetry breaking"},
 	{"restart",		_netcmp_restart,
 		"\n   "
 		"start over (reset data structures)"},
@@ -1536,24 +1532,23 @@ int
 _netgen_model(ClientData clientData,
     Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
 {
-   struct nlist *tp, *tp2;
+   struct nlist *tp;
    char *model, *retclass;
    unsigned char class;
    int fnum = -1;
-   int result, index, nports, nports2;
+   int result, index, nports;
 
    char *modelclasses[] = {
       "undefined", "nmos", "pmos", "pnp", "npn",
       "resistor", "capacitor", "diode",
       "inductor", "module", "blackbox", "xline",
-      "moscap", "mosfet", "bjt", "subcircuit", "copy",
-      NULL
+      "moscap", "mosfet", "bjt", "subcircuit", NULL
    };
    enum OptionIdx {
       UNDEF_IDX,  NMOS_IDX, PMOS_IDX, PNP_IDX, NPN_IDX,
       RES_IDX, CAP_IDX, DIODE_IDX, INDUCT_IDX,
       MODULE_IDX, BLACKBOX_IDX, XLINE_IDX, MOSCAP_IDX,
-      MOSFET_IDX, BJT_IDX, SUBCKT_IDX, COPY_IDX
+      MOSFET_IDX, BJT_IDX, SUBCKT_IDX
    };
 
    if (objc != 3 && objc != 2) {
@@ -1585,7 +1580,7 @@ _netgen_model(ClientData clientData,
 
    if (objc == 3) {
       model = Tcl_GetString(objv[2]);
-      nports = NumberOfPorts(model, fnum);
+      nports = NumberOfPorts(model);
 
       if (Tcl_GetIndexFromObj(interp, objv[2], (CONST84 char **)modelclasses,
 		"class", 0, &index) != TCL_OK) {
@@ -1649,40 +1644,6 @@ _netgen_model(ClientData clientData,
 	    break;
 	 case SUBCKT_IDX:
 	    class = CLASS_SUBCKT;
-	    break;
-	 case COPY_IDX:
-	    /* "copy" is not a class, but indicates that the cell,  */
-	    /* if undefined or a module, should have its class	    */
-	    /* taken from the other circuit, if that circuit has a  */
-	    /* cell of the same name.				    */
-	    if (Circuit1 == NULL || Circuit2 == NULL) {
-		Tcl_SetResult(interp, "Circuits have not been queued for comparison.",
-			NULL);
-		return TCL_ERROR;
-	    }
-	    if (tp == Circuit1) {
-		tp2 = LookupCellFile(tp->name, Circuit2->file);
-		nports2 = NumberOfPorts(tp2->name, Circuit2->file);
-	    }
-	    else if (tp == Circuit2) {
-		tp2 = LookupCellFile(tp->name, Circuit1->file);
-		nports2 = NumberOfPorts(tp2->name, Circuit1->file);
-	    }
-	    else {
-		Tcl_SetResult(interp, "The referenced netlist is not being compared.",
-			NULL);
-		return TCL_ERROR;
-	    }
-	    /* Should a non-matching number of ports be considered a fatal error? */
-	    // if (nports2 != nports) {
-	    //	Tcl_SetResult(interp, "The number of ports for this cell does not "
-	    //		"match between netlists.", NULL);
-	    //	return TCL_ERROR;
-	    // }
-
-	    class = tp2->class;
-	    /* To do (maybe): Rename tp ports to match tp2? */
-
 	    break;
       }
       tp->class = class;
@@ -3976,48 +3937,6 @@ _netcmp_permute(ClientData clientData,
    return TCL_OK;
 }
 
-/*------------------------------------------------------*/
-/* Function name: _netcmp_symmetry			*/
-/* Syntax: netgen::symmetry [fast|full]			*/
-/* Formerly: x						*/
-/* Results:						*/
-/* Side Effects:					*/
-/*------------------------------------------------------*/
-
-int
-_netcmp_symmetry(ClientData clientData,
-    Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
-{
-   char *fastfull[] = {
-      "fast", "full", NULL
-   };
-   enum OptionIdx {
-      FAST_IDX, FULL_IDX
-   };
-   int result, index;
-
-   if (objc == 1)
-      index = -1;
-   else {
-      if (Tcl_GetIndexFromObj(interp, objv[1], (CONST84 char **)fastfull,
-		"option", 0, &index) != TCL_OK)
-         return TCL_ERROR;
-   }
-
-   switch(index) {
-      case FAST_IDX:
-	 FastSymmetryBreaking = TRUE;
-	 break;
-      case FULL_IDX:
-	 FastSymmetryBreaking = FALSE;
-	 break;
-   }
-   Printf("Symmetry breaking method: %s.\n", 
-	     FastSymmetryBreaking ? "FAST" : "FULL");
-
-   return TCL_OK;
-}
-
 /*------------------------------------------------------*/
 /* Function name: _netcmp_exhaustive			*/
 /* Syntax: netgen::exhaustive [on|off]			*/
@@ -4039,7 +3958,7 @@ _netcmp_exhaustive(ClientData clientData,
    int result, index;
 
    if (objc == 1)
-      index = -1;
+      index = YES_IDX;
    else {
       if (Tcl_GetIndexFromObj(interp, objv[1], (CONST84 char **)yesno,
 		"option", 0, &index) != TCL_OK)