Merge branch 'master' into netgen-1.5

print statement, and clarified the messages about non-matching
circuits at the end, all of them suggestions made by Mitch
Bailey (see issue #34 on github).

README.md

@@ -91,6 +91,49 @@ and IRSIM version 9.7:
 
 Note: For FreeBSD, use 'gmake' instead.
 
+Note: On MacOS (Big Sur) follow the following procedure. If you have installed `xschem` and `magic` already on MacOS then steps (1) and (2) can likely be skipped.
+
+**1) Build Tcl for X11**
+
+We are following the instructions from `xschem` (https://github.com/StefanSchippers/xschem/blob/master/README_MacOS.md). 
+
+* Download `Tcl` from https://prdownloads.sourceforge.net/tcl/tcl8.6.10-src.tar.gz
+
+We are using not `opt` but `opt2` so that this `Tcl` does not interfere with `tcl-tk` from HomeBrew.
+
+```
+./configure --prefix=/usr/local/opt2/tcl-tk  
+make
+make install
+```
+
+**2) Build Tk for X11**
+
+* Download `Tk` from https://prdownloads.sourceforge.net/tcl/tk8.6.10-src.tar.gz
+
+```
+./configure --prefix=/usr/local/opt2/tcl-tk \
+--with-tcl=/usr/local/opt2/tcl-tk/lib --with-x \
+--x-includes=/opt/X11/include --x-libraries=/opt/X11/lib  
+make
+make install
+```
+
+**3) Build netgen**
+
+We need to provide this custom-built `tcl-tk` and suppress compilation errors.
+
+```
+./configure --with-tcl=/usr/local/opt2/tcl-tk/lib \
+--with-tk=/usr/local/opt2/tcl-tk/lib \
+--x-includes=/opt/X11/include \
+--x-libraries=/opt/X11/lib \
+CFLAGS=-Wno-error=implicit-function-declaration
+make
+make install
+```
+
+
 IN CASE OF FAILURE
 -------------------
 Please contact me (tim@opencircuitdesign.com) to report compile-time and

VERSION

@@ -1 +1 @@
-1.5.201
+1.5.205

base/flatten.c

@@ -259,13 +259,16 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
   struct objlist *ChildObjList, *ChildListEnd;
   struct objlist *ChildStart, *ChildEnd, *ParentEnd, *ParentNext;
   struct nlist *ThisCell;
-  struct  nlist *ChildCell;
+  struct nlist *ChildCell;
   struct objlist *tmp, *ob2, *ob3;
-  int	notdone, rnodenum;
-  char	tmpstr[1024];
-  int	nextnode, oldmax, numflat = 0;
+  int	 notdone, rnodenum;
+  char	 tmpstr[1024];
+  int	 nextnode, oldmax, numflat = 0;
+  struct objlist *myObject_p, *myPort_p;
+  struct objlist *myFirstPin_p, *myPin_p;
+  int    myDeleteCount = 0;
 #if !OLDPREFIX
-  int     prefixlength;
+  int    prefixlength;
 #endif
 
   if (name == NULL) {
@@ -599,6 +602,38 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
   }
   CacheNodeNames(ThisCell);
   ThisCell->dumped = 1;		/* indicate cell has been flattened */
+
+  // Remove disconnected ports.
+  // Fprintf(stdout, "DEBUG: check pins for %s of %d\n", name, fnum);
+
+  myFirstPin_p = NULL;
+
+  // Save first pin definition so we don't have to search for each port
+  for (myObject_p = ThisCell->cell; myObject_p != NULL; myObject_p = myObject_p->next) {
+    if (myObject_p->type >= FIRSTPIN) {
+      myFirstPin_p = myObject_p;
+      break;
+    }
+  }
+  if (myFirstPin_p != NULL) {  // Not a black box. Black boxes contain no pins.
+    // For each port, check for pin connection. If none, mark for deletion. 
+    // Assumes that all ports occur at the beginning of the list
+    for (myPort_p = ThisCell->cell; myPort_p != NULL && IsPort(myPort_p);
+		myPort_p = myPort_p->next ) {
+      for (myPin_p = myFirstPin_p; myPin_p != NULL; myPin_p = myPin_p->next) {
+        if (myPort_p->node == myPin_p->node) {  // only need to find one connection
+          break;
+        }
+      }
+      if (myPin_p == NULL) {  // mark disconnected ports
+        myDeleteCount++;
+        myPort_p->node = -2;
+      }
+    }
+    if (myDeleteCount > 0) {  // delete disconnected ports
+      CleanupPins(name, fnum);
+    }
+  }
   return numflat;
 }
 
@@ -1582,7 +1617,8 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 			}
 		    }
 		    else {
-		       match = 0;
+		       // Apply recursive flattening when a cell exists in
+		       // one circuit but not the other.
 		       break;
 		    }
 		}

base/netcmp.c

@@ -6892,11 +6892,6 @@ int reorderpins(struct hashlist *p, int file)
 		"Ordering will be arbitrary.\n", tc2->name);
 
     for (ob = ptr->cell; ob != NULL; ) {
-        /* Catch badness */
-	if (ob->next && (ob->next->node > 100000)) {
-	    Fprintf(stdout, "Bad.\n");
-	} 
-
 	if (ob->type == FIRSTPIN) {
 	    if ((*matchfunc)(ob->model.class, tc2->name)) {
 		char *sptr = ob->instance.name;

tcltk/netgen.tcl.in

@@ -562,12 +562,13 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
             if {[netgen::print queue] != {}} {
 	       if {([lsearch $noflat [lindex $endval 0]] == -1) &&
 			([lsearch $noflat [lindex $endval 1]] == -1)} {
-	           netgen::log put "  Flattening non-matched subcircuits $endval"
+	           netgen::log put "  Flattening non-matched subcircuits $endval\n"
 	           netgen::flatten class "[lindex $endval 0] $fnum1"
 	           netgen::flatten class "[lindex $endval 1] $fnum2"
 	       } else {
-	           netgen::log put "  Continuing with black-boxed subcircuits $endval"
-		   lappend matcherr [lindex $endval 0]
+	           netgen::log put "  Continuing with black-boxed subcircuits $endval\n"
+		   lappend matcherr [lindex $endval 0]"(1)"
+		   lappend matcherr [lindex $endval 1]"(2)"
 	           # Match pins
                    netgen::log echo off
 	           if {$dolist == 1} {
@@ -609,16 +610,15 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       } else {
 	 # Flatten the non-matching subcircuit (but not the top-level cells)
          if {[netgen::print queue] != {}} {
-	    if {([lsearch $noflat [lindex $endval 1]] == -1) &&
+	    if {([lsearch $noflat [lindex $endval 0]] == -1) &&
 		    ([lsearch $noflat [lindex $endval 1]] == -1)} {
-	       netgen::log put "  Flattening non-matched subcircuits $endval"
+	       netgen::log put "  Flattening non-matched subcircuits $endval\n"
 	       netgen::flatten class "[lindex $endval 0] $fnum1"
 	       netgen::flatten class "[lindex $endval 1] $fnum2"
 	    } else {
-	       netgen::log put "  Continuing with black-boxed subcircuits $endval"
-	       lappend matcherr [lindex $endval 0]
-	       netgen::log put "  Continuing with black-boxed subcircuits $endval"
-	       lappend matcherr [lindex $endval 0]
+	       netgen::log put "  Continuing with black-boxed subcircuits $endval\n"
+	       lappend matcherr [lindex $endval 0]"(1)"
+	       lappend matcherr [lindex $endval 1]"(2)"
 	       # Match pins
                netgen::log echo off
 	       if {$dolist == 1} {