402e1f0f25
Found a chokepoint in FlattenInstancesOf that was unnecessary as it
...
was running through the entire object linked list to find the
predecessor of a record that it had already found. Solved by simply
keeping track of the predecessor record.
2021-02-16 17:12:00 -05:00
e75f5661e2
Added a zero-value current source to the zero-valued devices handled
...
by the pre-matching method. The current source is treated like the
others except that it forms an open circuit rather than a short.
2021-02-09 09:12:22 -05:00
a034fc16d6
Updated VERSION.
2021-01-21 13:41:20 -05:00
d0bae6aff4
Updated VERSION with the merge of pull request #15 from Alessandro de
...
Laurenzis.
2021-01-17 11:38:11 -05:00
0df6c83df5
Updated VERSION to go along with the merge of pull request #14
...
from Anton Blanchard.
2021-01-16 12:05:52 -05:00
f3cebd9099
Corrected a potential crash condition while doing series combination.
2021-01-08 09:55:00 -05:00
920c6e6928
Corrected a problem causing a segfault during a property record
...
copy if the property record does not have a model.class record
(should it always?).
2020-12-20 11:55:20 -05:00
69780aa048
Added patch from Mitch Bailey which sorts the objects in a verilog
...
file input so that pins occur first before nodes, as they do in a
SPICE netlist. Certain parts of the comparison code depend on pins
being first in the netlist, and reordering them when reading input
is easier than rewriting the rest of the code.
2020-12-15 09:57:49 -05:00
2a0ebfde93
Updated VERSION with the commit.
2020-12-05 15:46:45 -05:00
b9769b9f55
Updated version to go along with pull request merge from github.
2020-12-03 20:17:59 -05:00
5e99fd5ef9
Found a counterexample which shows that the fast symmetry breaking
...
introduced in revision 150 can result in an incorrect result
reporting a bad match where the match is actually good (as proven
by running the full symmetry breaking on the same netlist).
Because the fast symmetry breaking is orders of magnitude faster
for large circuits, and because the false positive result appears
to be rare, I have introduced a command "symmetry" to switch
methods between fast and full. So fast symmetry breaking can be
run unless the result fails on symmetry breaking, in which case
the method can be switched to full to see if the problem is a
false positive or not. This is not an ideal solution, and some
investigation is needed to determine if there is a way to apply
fast symmetry breaking without encountering a false positive
error.
2020-10-08 09:43:25 -04:00
04dd4a64d5
Corrected problems with the port count routine not being specified
...
with the file number, so that it can get confused between libraries.
Also made a fix to coerce one cell class to be forced to be the
same in both circuits under some circumstances.
2020-10-07 21:32:07 -04:00
50b0e9cb65
Found examples where the automated "pin matching" algorithm causes
...
the top level circuits to be declared matching with no errors even
though the pins do not match. "proxy pins" are fine for subcells
to detect cases where one subcell has an unused pin and the matching
subcell does not declare it, but that should not be allowed on the
top level, as it cannot be known whether the pin is unused or not.
2020-08-08 13:19:26 -04:00
4ee3a1464b
Corrected the left-hand side assignment for "assign" statements and
...
corrected the error statement so that it refers both to the (corrected)
left-hand side and also the portion of the right-hand side that cannot
be parsed as structural verilog.
2020-08-03 11:49:09 -04:00
c45d51e950
Tracked down and fixed problems with implicit pins in verilog (pins
...
that are not declared in the verilog netlist because they don't
connect to anything, and their presence is not required by verilog
syntax) and the printing of proxy pins created to act as placeholders
for those implicit pins. Also removed the pinting of the "disconnected
pin" messages for black-box modules (since by definition they have
disconnected pins, because black-box modules have no contents).
2020-07-31 12:22:50 -04:00
46cdf48bc4
Updated the version to force the tarball and github mirror.
2020-07-30 08:10:09 -04:00
339a0d5d4e
Updated version to force the new tarball and github mirror.
2020-07-29 13:59:24 -04:00
251622c8bc
Corrected the routines DescendCountQueue and DescendCompareQueue
...
to include type CLASS_MODULE in the list of types to descend into,
since "module" (black-box) types need to be checked for pin
matching even if they have no contents. This allows two verilog
netlists to be compared against each other.
2020-07-24 20:50:07 -04:00
cca0e4b3f3
Corrected an error in bundle assignment that failed to make a copy
...
of the root name of the LHS net, and so would use the last root
name copied, which might have belonged to something entirely
different, or nothing at all.
2020-07-01 13:11:37 -04:00
cec6d89474
Corrected an uninitialized variable error in the verilog reading code
...
that produces a segfault condition.
2020-06-16 12:52:29 -04:00
9bcca3ac21
Corrected the verilog parsing (yet again!) so that it does not
...
mistakenly flag bus delimiter characters inside backslash-escaped
names when looking for bus delimiters.
2020-06-03 17:00:42 -04:00
da667c3b17
Corrected handling of wire bundles in the verilog parser.
2020-03-27 08:48:48 -04:00
18f230fc46
Changed the default string size for tmpstr in flattenInstancesOf
...
from 200 to 1024. Probably this should be dynamically allocated
and expanded as needed, as it is holding names that are of
increasing length as a hierarchy is descended and the instance
prefixes appended to the name.
2020-03-26 09:04:52 -04:00
0f5a618353
Corrected some problems with property matching in netcmp.c.
...
However, I have identified an issue that has not yet been resolved,
which is that there can be automorphisms that are potentially
broken by property matching. Currently, the automorphisms are
arbitrarily resolved, then properties are matched---and may fail
accordingly.
2020-03-10 21:39:41 -04:00
515fccc633
Corrected error in printing the name of a file when it is not found
...
in an "include" statement in either SPICE or verilog. Modified pin
matching behavior to force cells in both netlists to be marked as
black-box entries if either one is marked as a black-box entry (this
may not be needed, but shouldn't do any harm, either).
2020-03-05 09:41:22 -05:00
7d94a7d5f6
Updated VERSION for new tarball.
2020-03-04 21:06:21 -05:00
f7037fc9e6
Updated VERSION manually; checking regeneration of tarball.
2020-02-24 17:34:38 -05:00
027b4ae468
Test update of VERSION.
2020-02-24 16:38:56 -05:00
08a442fda2
Removed VERSION from .gitignore, and updated VERSION.
2020-02-24 11:50:38 -05:00
9e59048731
Update at Mon Jan 21 20:30:40 EST 2019 by tim
2019-01-21 20:30:40 -05:00
e361640947
Update at Wed Jan 9 20:31:54 EST 2019 by tim
2019-01-09 20:31:54 -05:00
f8ea27d8e8
Update at Mon Nov 19 08:12:57 EST 2018 by tim
2018-11-19 08:12:57 -05:00
d8eefdad9a
Update at Sun Nov 18 13:09:56 EST 2018 by tim
2018-11-18 13:09:56 -05:00
9432bfc182
Update at Wed Nov 14 13:46:12 EST 2018 by tim
2018-11-14 13:46:12 -05:00
7fc668c2d4
Update at Mon Nov 12 16:33:14 EST 2018 by tim
2018-11-12 16:33:14 -05:00
642de57418
Update at Wed Oct 31 14:05:09 EDT 2018 by tim
2018-10-31 14:05:09 -04:00
65c0f6b840
Update at Mon Oct 29 15:19:54 EDT 2018 by tim
2018-10-29 15:19:54 -04:00
b4c189a114
Update at Tue Oct 2 14:41:38 EDT 2018 by tim
2018-10-02 14:41:38 -04:00
83b2084a10
Update at Wed Sep 26 10:49:04 EDT 2018 by tim
2018-09-26 10:49:04 -04:00
a6742bca2e
Update at Mon Sep 24 15:13:30 EDT 2018 by tim
2018-09-24 15:13:30 -04:00
b911aa7b2e
Update at Wed Aug 8 11:28:43 EDT 2018 by tim
2018-08-08 11:28:43 -04:00
2d74b3d94b
Update at Wed Aug 1 15:44:32 EDT 2018 by tim
2018-08-01 15:44:32 -04:00
7bde5125fd
Update at Mon Jun 25 21:26:47 EDT 2018 by tim
2018-06-25 21:26:47 -04:00
f3d850e68e
Update at Sun Jun 17 15:06:17 EDT 2018 by tim
2018-06-17 15:06:17 -04:00
6eb1efd55a
Update at Fri Jun 1 08:47:33 EDT 2018 by tim
2018-06-01 08:47:33 -04:00
ced1299351
Update at Mon May 28 21:39:11 EDT 2018 by tim
2018-05-28 21:39:11 -04:00
f0eb14be5e
Update at Wed May 23 13:05:15 EDT 2018 by tim
2018-05-23 13:05:15 -04:00
84f984e7f0
Update at Tue May 1 14:08:16 EDT 2018 by tim
2018-05-01 14:08:16 -04:00
dfd1e59432
Update at Thu Apr 26 08:01:18 EDT 2018 by tim
2018-04-26 08:01:18 -04:00
7d113beada
Update at Wed Apr 25 15:03:16 EDT 2018 by tim
2018-04-25 15:03:16 -04:00
dc42e98ab9
Update at Mon Apr 16 15:43:23 EDT 2018 by tim
2018-04-16 15:43:23 -04:00
feab5023e5
Update at Thu Apr 12 17:13:41 EDT 2018 by tim
2018-04-12 17:13:41 -04:00
1d1ad3c833
Update at Thu Apr 5 10:10:44 EDT 2018 by tim
2018-04-05 10:10:44 -04:00
9ad6ad3338
Update at Wed Mar 28 12:40:15 EDT 2018 by tim
2018-03-28 12:40:15 -04:00
96a95d337f
Update at Mon Jan 29 13:26:39 EST 2018 by tim
2018-01-29 13:26:39 -05:00
1e8685128c
Update at Fri Jan 26 11:58:05 EST 2018 by tim
2018-01-26 11:58:05 -05:00
2a4c7b3cde
Update at Thu Dec 14 21:50:32 EST 2017 by tim
2017-12-14 21:50:32 -05:00
661157e041
Update at Thu Dec 7 08:46:40 EST 2017 by tim
2017-12-07 08:46:40 -05:00
bdb8917327
Update at Thu Oct 12 10:52:56 EDT 2017 by tim
2017-10-12 10:52:56 -04:00
7a947ee9be
Update at Tue Oct 10 22:25:49 EDT 2017 by tim
2017-10-10 22:25:49 -04:00
4809c02f79
Update at Thu Aug 24 09:51:44 EDT 2017 by tim
2017-08-24 09:51:44 -04:00
25c1f13e16
Update at Thu Aug 10 22:41:12 EDT 2017 by tim
2017-08-10 22:41:12 -04:00
f0eec657a3
Update at Wed Aug 9 09:04:43 EDT 2017 by tim
2017-08-09 09:04:43 -04:00
5ed3fcb3f1
Update at Thu Jun 22 08:12:59 EDT 2017 by tim
2017-06-22 08:13:00 -04:00
39573981be
Update at Tue Jun 20 22:55:24 EDT 2017 by tim
2017-06-20 22:55:24 -04:00
d7927ef547
Update at Mon Jun 19 12:39:00 EDT 2017 by tim
2017-06-19 12:39:00 -04:00
07788e7501
Update at Sun Jun 18 22:48:11 EDT 2017 by tim
2017-06-18 22:48:11 -04:00
25c17abb70
Update at Mon May 15 16:31:00 EDT 2017 by tim
2017-05-15 16:31:00 -04:00
26cd16f3ff
Update at Mon May 8 20:56:58 EDT 2017 by tim
2017-05-08 20:56:58 -04:00
5c168946e3
Update at Fri May 5 17:36:29 EDT 2017 by tim
2017-05-05 17:36:29 -04:00
b083a6df7c
Update at Tue Apr 25 08:47:57 EDT 2017 by tim
2017-04-25 08:47:57 -04:00
09532ee628
Update at Mon Mar 6 14:01:25 EST 2017 by tim
2017-03-06 14:01:25 -05:00
67f1c1a2e9
Update at Fri Mar 3 09:11:52 EST 2017 by tim
2017-03-03 09:11:52 -05:00
b5d5496e40
Update at Mon Feb 27 09:36:52 EST 2017 by tim
2017-02-27 09:36:52 -05:00
516d1c33fb
Update at Wed Feb 8 15:16:59 EST 2017 by tim
2017-02-08 15:16:59 -05:00
4659b0795d
Update at Mon Jan 9 12:52:59 EST 2017 by tim
2017-01-09 12:52:59 -05:00
46458f2836
Update at Sat Jan 7 06:57:25 EST 2017 by tim
2017-01-07 06:57:25 -05:00
4a47c3076d
Update at Mon Dec 12 11:32:42 EST 2016 by tim
2016-12-12 11:32:42 -05:00
809a3c16e9
Update at Wed Dec 7 15:01:55 EST 2016 by tim
2016-12-07 15:01:55 -05:00
46252ad6b9
Update at Fri Nov 11 09:52:18 EST 2016 by tim
2016-11-11 09:52:18 -05:00
2f661ea256
Update at Wed Oct 26 21:21:09 EDT 2016 by tim
2016-10-26 21:21:10 -04:00
b7a8d3cfda
Update at Tue Oct 25 11:29:17 EDT 2016 by tim
2016-10-25 11:29:17 -04:00
31a0f10602
Update at Mon Oct 24 13:43:29 EDT 2016 by tim
2016-10-24 13:43:29 -04:00
bd3b88de4a
Update at Tue Oct 18 09:59:36 EDT 2016 by tim
2016-10-18 09:59:36 -04:00
7ce3b1dcd8
Update at Mon Oct 17 17:47:55 EDT 2016 by tim
2016-10-17 17:47:55 -04:00
675b3e0743
Update at Tue Sep 20 21:51:09 EDT 2016 by tim
2016-09-20 21:51:09 -04:00
22c2a31e7f
Update at Fri Sep 9 09:47:45 EDT 2016 by tim
2016-09-09 09:47:45 -04:00
29566bde4d
Update at Thu Sep 8 22:08:20 EDT 2016 by tim
2016-09-08 22:08:20 -04:00
568ed65c05
Update at Thu Jul 21 11:24:27 EDT 2016 by tim
2016-07-21 11:24:27 -04:00
c60443b862
Update at Sat Jul 16 13:52:34 EDT 2016 by tim
2016-07-16 13:52:34 -04:00
7dfe6ee19f
Update at Mon Jul 11 08:49:52 EDT 2016 by tim
2016-07-11 08:49:52 -04:00
a6e3e7e457
Update at Thu Jun 23 10:18:47 EDT 2016 by tim
2016-06-23 10:18:47 -04:00
99c942eb2b
Update at Thu May 19 16:46:32 EDT 2016 by tim
2016-05-19 16:46:32 -04:00
bbc9110431
Update at Tue May 17 09:05:09 EDT 2016 by tim
2016-05-17 09:05:09 -04:00
acd9a0e846
Update at Mon May 16 10:55:53 EDT 2016 by tim
2016-05-16 10:55:53 -04:00
f7cbae9efe
Update at Thu May 5 10:12:58 EDT 2016 by tim
2016-05-05 10:12:58 -04:00
d612485a9b
Update at Sun Mar 20 11:44:06 EDT 2016 by tim
2016-03-20 11:44:06 -04:00
5735181f88
Update at Wed Mar 16 12:06:38 EDT 2016 by tim
2016-03-16 12:06:38 -04:00
7a87a6f0d9
Update at Mon Dec 7 15:01:41 EST 2015 by tim
2015-12-07 15:01:41 -05:00
1d757943bd
Update at Sun Nov 15 16:53:51 EST 2015 by tim
2015-11-15 16:53:51 -05:00
54a594c5fc
Update at Fri Oct 9 12:42:07 EDT 2015 by tim
2015-10-09 12:42:11 -04:00
aa40ae4814
Update at Tue Sep 29 21:51:04 EDT 2015 by tim
2015-09-29 21:51:05 -04:00
9837884615
Update at Thu Sep 24 08:26:50 EDT 2015 by tim
2015-09-24 08:26:50 -04:00
5b7bf42ca6
Update at Mon Aug 31 09:34:21 EDT 2015 by tim
2015-08-31 09:34:21 -04:00
749556aa7f
Update at Fri Aug 21 08:36:17 EDT 2015 by tim
2015-08-21 08:36:17 -04:00
44a54e40a2
Update at Thu Aug 20 22:13:39 EDT 2015 by tim
2015-08-20 22:13:40 -04:00
aff2ddc775
Update at Mon Aug 10 12:08:23 EDT 2015 by tim
2015-08-10 12:08:23 -04:00
d5e9f81cb0
Initial commit at Mon May 18 09:27:46 EDT 2015 by tim on stravinsky
2015-05-18 09:27:46 -04:00
Tim Edwards
Tim Edwards