The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.
One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.
Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
1.) is_floating is now only true if there is no device
and no subcircuit on a net. This means we only purge
nets if they are really floating. So far we purged
nets without pins which lead to the mismatch:
Before purge:
Layout: (net) <--> DEVICE.TERMINAL
Schematic: PIN <--> DEVICE.TERMINAL
After purge:
Layout: (null) <--> DEVICE.TERMINAL
Schematic: PIN <--> DEVICE.TERMINAL
(null does not match any net)
2.) circuit pin matching was a bit picky. Only when
one circuit did not have pins, matching was sloppy.
In real cases however, circuits may have unconnected
pins:
- top level pins without a counterpart (no label)
- subcircuits pins which are not used
We catch both cases by refining the match: if a pin
is not used, it does not need to match against
any other pin. It's reported as "matching against null"
though.
This implementation is pretty simplistic and
applies "M" the following way:
* R: R(final) = R/M
* L: L(final) = L/M
* C: C(final) = C*M
* M: W(final) = W*M
* D: A(final) = A*M
* Q: AE(final) = AE*M
The other parameters (specifically the other
geometry parameters) are not scaled yet.
Plus: added some missing files
Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
exactly check device parameters
* enhancement of LVS script framework and doc updates
- global pins have been generated for device cells too and lead
to implicit pins which may not be desired. The original problem
was how to make abstract circuits comparable. This has to be
solved differently.
- Circuit boundaries are good for displaying the boxes for
abstract circuits
General topic: abstracts and swappable pins.
Issue: we work bottom up and assign pins. This is the
basis for net graph building. But swappable means those
pins can change. The compare works fine, but debugging
output is strange: as the pin assigned is fixed, the nets
found to be attached to a circuit might not fit any
proposed pin pair (which does not contain swapping).
The problem gets worse with abstracts.
The enhancements are
- Such cases generate only warnings in the browser
and the message says swapping might be the case
- Floating nets are treated differently. This should
lead to a better performance for abstracts/black boxes,
but in case of disconnected pins (due to wire errors),
floating nets happen to create mismatches in the nets above.
- Net graph building does not consider swappable nets. In
case of two swappable pins this wouldn't be an issue, but
for more than two this would create ambiguities and
prevent topological matching.
Plus: Debug output option for net graph
Tests updated
Previous: empty layers occupied a special layer in the DSS
But what when empty layers are required as outputs?
ONE layer isn't good -> would overwrite the layer and it's
no longer empty for others.
So we need to keep the layers separate.
Matthias Koefferlein