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1574 Commits

Author SHA1 Message Date
Matthias Köfferlein d87c27b4cd
Merge pull request #310 from KLayout/issue_293 
Fixed #293: window title of setup form is 'Setup'
 2019-07-21 23:49:38 +02:00
Matthias Köfferlein 8a66f59b6e
Merge pull request #308 from KLayout/issue-305 
Fixed issue #305 (CIF reader issue with rotated boxes)
 2019-07-21 23:49:11 +02:00
Matthias Köfferlein fbb8a432c4
Merge pull request #307 from KLayout/dvb 
Dvb
 2019-07-21 23:48:55 +02:00
Matthias Koefferlein 39011e3a37 Fixed #293: window title of setup form is 'Setup' 2019-07-21 23:22:10 +02:00
Matthias Koefferlein 8f21cdf449 Fixed issue #305 (CIF reader issue with rotated boxes) 2019-07-21 22:57:02 +02:00
Matthias Koefferlein 9d250d6df9 Using a larger branch complexity than default for LVS full test's netlist compare 
In addition: typo fixed, added doc for complexity configuration
parameters.
 2019-07-21 22:24:07 +02:00
Matthias Koefferlein df7195b81f Compatibility with ruby 1.8, force garbage cleanup for LVS/DRC and tests. 2019-07-21 10:23:08 +02:00
Matthias Koefferlein 6e6e449eef Consolidated test data for lvs:full - there are too many variants to support pure text compare. We use the netlist comparer now. 2019-07-21 09:20:44 +02:00
Matthias Köfferlein f82e7929d8 Fixed a conversion issue with ints on MSVC 
Because long is 32bit on Windows (like int), the
conversion from long to unsigned int was subject
to sign overflow. This was fixed by going to
unsigned int via unsigned long.
 2019-07-20 00:28:32 +02:00
Matthias Koefferlein 0215d05a12 Fixed unit tests. 2019-07-19 00:02:05 +02:00
Matthias Köfferlein 7fc907cf7e Fixed a segfault from the testsuite 2019-07-16 23:17:29 +02:00
Matthias Köfferlein 4e1736a181 Updated golden data of two tests for Windows. 2019-07-16 01:27:08 +02:00
Matthias Köfferlein 630f7e56d8
Merge pull request #303 from KLayout/issue-302 
Fixed #302 and plus a potential invalid memory access fixed
 2019-07-16 00:44:00 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Köfferlein df23830a1c Fixed a runtime issue on Windows 2019-07-16 00:39:39 +02:00
Matthias Köfferlein e4efaac12f MSVC builds fixed - XML source needs to accept URLs (specifically resource URLs) also with EXPAT 2019-07-15 23:23:19 +02:00
Matthias Köfferlein 9820e57031 Don't write third terminal for R or C (WithBulk variants) 2019-07-15 23:19:03 +02:00
Matthias Köfferlein eb9ffb4a35 Another msvc2017 build warning fixed 2019-07-15 23:18:20 +02:00
Matthias Köfferlein 9a371b8fd2 Fixed some build warnings with msvc2017 (maybe real issues and memory leaks) 2019-07-15 23:17:24 +02:00
Matthias Köfferlein 350ae397aa MSVC builds fixed - XML source needs to accept URLs (specifically resource URLs) also with EXPAT 2019-07-15 00:18:18 +02:00
Matthias Köfferlein ede217cd0b Fixed #302 and plus a potential invalid memory access fixed 2019-07-15 00:17:01 +02:00
matthias 89ce2be5c2 Merge remote-tracking branch 'origin/master' into dvb 2019-07-14 01:28:11 +02:00
Matthias Köfferlein 1b08656835
Merge pull request #300 from KLayout/issue-264 
Issue 264
 2019-07-14 00:12:58 +02:00
Matthias Köfferlein 397e86f4b4 Merge branch 'dvb' of https://github.com/klayout/klayout into dvb 2019-07-13 23:39:16 +02:00
Matthias Köfferlein 4172b60d60 Fixed a build issue on Windows. 2019-07-13 23:38:26 +02:00
matthias 8b17a4da4f A few utility functions 
Polygon#is_rectilinear?, Polygon#is_empty?
and same for SimplePolygon
 2019-07-13 22:45:22 +02:00
matthias 5f27341995 Some refactoring, better templates 
1.) tl::Stream now can read from resources
    (:<path> URL's)
2.) LVS/DRC templates are kept as resource,
    "create_template" uses the URL to read them.
3.) Added samples for LVS
4.) Configured LVS to match sample
 2019-07-13 18:40:00 +02:00
matthias ebca5e1ce6 Bugfix: small LVS and DRC macro iessues (LVS and DRC menus not working etc.) 2019-07-13 17:00:05 +02:00
Matthias Koefferlein 1251fb2cd6 Added < and > to allowed chars for net names in Spice reader 2019-07-13 08:50:13 +02:00
Matthias Koefferlein 2d57a11f8c Fixed #287 (RecursiveShapeIterator to ObjectInstPath) 
There is a new constructor for ObjectInstPath to
create one from a RecursiveShapeIterator.
 2019-07-12 23:13:50 +02:00
Matthias Koefferlein e8ff8156a0 fix for #264 
1. Errors in coerce_parameters are now shown as
   red label + warning icon in the parameters dialog
2. Errors during produce are always logged now

Plus: the scroll bars of the PCell parameters page
don't jump back on "Apply".
 2019-07-12 21:13:18 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein f66b094e88 Merge branch 'dvb' into dvb_test 2019-07-12 17:44:11 +02:00
Matthias Koefferlein a47190f3ab Write short versions of LVS and L2N DB by default. 2019-07-12 17:43:43 +02:00
Matthias Koefferlein 85717beca6 Allow saving LVS DB files from netlist browser. 2019-07-12 17:29:44 +02:00
Matthias Koefferlein d109a22cf5 Renaming (distro nodes->virtual nodes) 2019-07-11 23:20:42 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 7bc4acd8f6 WIP: new version of subcircuit match algorithm - needs refactoring. 2019-07-11 23:14:53 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 2f01c7a0bd WIP: other algorithm for handling subcircuits in netlist compare 2019-07-10 23:40:16 +02:00
Matthias Koefferlein 67f786035c WIP: during refactoring 2019-07-10 00:32:53 +02:00
Matthias Koefferlein 1fd069ca99 Provide a better description for net mismatch with warning. 2019-07-09 20:29:35 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins 
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
 2019-07-09 19:55:48 +02:00
Matthias Koefferlein 0c6ead6f90 WIP: introduced boundary into L2N format so we have something to display for abstracts. 2019-07-09 01:18:23 +02:00
Matthias Koefferlein c9e08c4500 WIP: propagate global nets to parent hierarchy even if there is no shape inside the cell. 2019-07-08 23:11:35 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein bc2d9448d6 Providing LVS tests. 2019-07-07 21:33:28 +02:00
Matthias Koefferlein 95a1e38fe3 WIP: better reproducablility for .lvsdb layer names, updated tests. 2019-07-07 19:39:00 +02:00