* First attempt to fix. Rather experimental.
* Debugging and bug fixing
The basic issue was a missing break
However, correct computation of cache results for instance-to-instance cluster
interaction is implemented
Plus: identical and overlapping instances are no longer ignored except in the
case of exact duplicates. Otherwise these instance generate dead nets which
are not connected elsewhere.
* Added tests, fixed duplicate cells test, added missing files.
* Code simplification (removed invariant from transformation in cluster-to-cluster interaction cache)
* Skipping cell instance duplicates as some real-world testcases mandate so
* Updated test data
1. Be more careful with net names
Net names are used now for sorting the graph nodes, but not for
strict compare. This is useful to derive swappable pins for
blackbox circuits.
2. Be more careful with pins from schematic netlist
Pins from schematic netlist without a corresponding pin on the layer
side are treated as mandatory unless connected to a trivial net.
Pins connecting to non-trivial nets inside the subcircuit are always
considered mandatory.
This way schematic pins enforce corresponding layout pins.
On the other hand, layout pins connecting to trivial nets inside
the subcircuit are considered non-mandatory.
* WIP: added basic feature and tests.
* WIP: provide tests are GSI binding of new antenna check
* Fixed issue #579 (perimeter_only mode for antenna check)
* Updated DRC doc for 'perimeter_only'
* First implementation of the perimeter factor for antenna check, unit tests.
* Bugfix and unit tests for GSI binding of new antenna check version.
* DRC integration of perimeter-enabled antenna check.
* Enhanced DRC doc for antenna rule
So far, duplicate instances have lead to net propagation
into parent cells and floating nets. This is fixed by ignoring
duplicate instances where possible.
* Spice writer can now be configure to skip the debug
comments
* < and > are allowed chars in spice names now
* global net names have second prio over labels now
Issue solved: some circuit pins may not have a net - these
need to be ignored.
Requirement: all pins with a net must be mapped.
Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.
Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
- edge pairs are normalized before turning them into polygons.
This makes flat and deep implementation more consistent.
- deep region and flat regions were not cooperating in geo
checks
- unnamed layers are not registered in make_layer - this
does not make sense and will just hold a fake ref
- tests now use GDS to represent texts after transformation
(with orientation, OASIS can't do this)
- texts are more consistently handled in the tests
- test debug output is not written in the same format
than golden data unless special normalization is
requested.
- a non-orientable polygon was converted to orientable in
a text because this can be represented in GDS consistently
- DRC testsuite uses "polygons" instead of "input" to achieve
identical behavior for deep and flat mode with respect to
texts
- dbRegionTests are updated because texts are not allowed
for non-original layers too
The device handling in the netlist extractor was now
entirely moved to device cells. New options are introduced
for exporting these cells. Tests have been updated.
Matthias Koefferlein