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46 Commits

Author SHA1 Message Date
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities 
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
 2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein 7bc4acd8f6 WIP: new version of subcircuit match algorithm - needs refactoring. 2019-07-11 23:14:53 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein 993ef78575 WIP: some cleanup/enhancement 
General topic: abstracts and swappable pins.
Issue: we work bottom up and assign pins. This is the
basis for net graph building. But swappable means those
pins can change. The compare works fine, but debugging
output is strange: as the pin assigned is fixed, the nets
found to be attached to a circuit might not fit any
proposed pin pair (which does not contain swapping).

The problem gets worse with abstracts.

The enhancements are
- Such cases generate only warnings in the browser
  and the message says swapping might be the case
- Floating nets are treated differently. This should
  lead to a better performance for abstracts/black boxes,
  but in case of disconnected pins (due to wire errors),
  floating nets happen to create mismatches in the nets above.
- Net graph building does not consider swappable nets. In
  case of two swappable pins this wouldn't be an issue, but
  for more than two this would create ambiguities and
  prevent topological matching.

Plus: Debug output option for net graph

Tests updated
 2019-07-07 18:17:14 +02:00
Matthias Koefferlein ef1441e546 WIP: fixed unit tests. 2019-06-28 17:08:04 +02:00
Matthias Koefferlein d4634f8620 Try to establish reproducability of clock tree compare test. 2019-05-30 07:12:49 +02:00
Matthias Koefferlein 2bf3f3d5c9 Fixed unit tests, bug fixes in netlist DB model. 2019-05-26 18:28:35 +02:00
Matthias Koefferlein 252622e3f8 Fixed unit tests, support floating pins for netlist compare 2019-05-20 23:48:07 +02:00
Matthias Koefferlein 65ea72c569 WIP: netlist cross reference - refactoring of sorting, more robust 2019-05-16 23:26:49 +02:00
Matthias Koefferlein 95caca1dd5 WIP: netlist cross reference - tests and bugfixes 2019-05-16 22:43:28 +02:00
Matthias Koefferlein 924daa65b7 WIP: tests for netlist cross ref. 2019-05-16 00:09:06 +02:00
Matthias Koefferlein 8121f70e65 Netlist compare: Net mismatches reported if nets don't match but we still will proceed 2019-04-18 00:01:21 +02:00
Matthias Koefferlein eabf558186 netlist exaction: selective net joining with labels 
Now, a glob pattern can be used to identify the labels
which implicitly join nets. Also, net joining now
only happens on top level.
 2019-04-15 23:24:27 +02:00
Matthias Koefferlein 9f3bea92fb WIP: less strict pin matching (for top levels with/without pins). Fixed tests. 2019-04-14 19:22:07 +02:00
Matthias Koefferlein 699e94a45f WIP: added configuration options (complexity, depth) for net compare 2019-04-14 19:11:42 +02:00
Matthias Koefferlein 92524dcf57 WIP: netlist compare - bugfixed latest version and updated tests. 2019-04-13 19:56:08 +02:00
Matthias Koefferlein 4e85ae7db0 WIP: netlist compare (better backtracking) 2019-04-13 02:48:10 +02:00
Matthias Koefferlein 187baf2941 WIP: enhanced backtracking of netlist compare. 2019-04-12 00:15:36 +02:00
Matthias Koefferlein f34d161e2f WIP: new backtracking algorithm for net matching. 2019-04-09 23:13:40 +02:00
Matthias Koefferlein 2e9422a753 Netlist compare: a little less freedom when picking derived net pairs ... 2019-04-08 21:32:41 +02:00
Matthias Koefferlein 7cdd40dabb Netlist compare: more detailed derivation of net assignments from known nets (pairing by deduction) 2019-04-08 21:21:34 +02:00
Matthias Koefferlein f6836b96a2 WIP: some enhancements 
Spice writer: don't prefix model name with "M"
Added "device_class_mismatch" message to netlist compare
Assertion if device classes or circuits are nil on
"same_..."
 2019-04-07 10:15:57 +02:00
Matthias Koefferlein aad52b77ba Netlist compare: added the ability to filter small caps and high resistance devices 2019-04-06 19:46:13 +02:00
Matthias Koefferlein da5680ef24 Netlist compare: configurable device parameter compare scheme. 2019-04-06 15:19:43 +02:00
Matthias Koefferlein 8e9f15669f WIP: utilizing netlist compare for DRC checks as well 
+ Some enhancements (e.g. enable pin swapping for pins
  without names and devices or subcircuits)
 2019-04-02 22:39:29 +02:00
Matthias Koefferlein 9613ad72c8 WIP: netlist compare - using it for more tests 
Issue solved: some circuit pins may not have a net - these
need to be ignored.

Requirement: all pins with a net must be mapped.

Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.

Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
 2019-03-31 23:59:43 +02:00
Matthias Koefferlein 06e326dfd9 WIP: netlist compare - some more tests by netlist compare. Needs fixing. 2019-03-31 19:00:42 +02:00
Matthias Koefferlein b391b4510f WIP: can compare empty circuits now 
Empty circuits play a role as abstracts. They
are compared by using the pin names the nets
are attached to. The implementation change is:
* nodes without device terminals or subcircuit pins
  are compared through their net properties (count
  and name of pins attached)
* some enhancements of the net string serializer
  have been made to account for pin name mismatches.
 2019-03-31 09:53:51 +02:00
Matthias Koefferlein 2452c72d2d WIP: netlist compare deployed for netlist extractors 
Some enhancements were required:
* Clusters left over from joined clusters must not be
  turned into nets: this leads to dummy nets.
* null Nets can happen as targets of edges. Don't assert
  in this case but treat null nets as identical for both
  netlists.
* Don't resolve ambiguous nets if there are options to
  do this non-ambiguously.
* logger can be null
* Added compare_netlists to dbTestSupport
 2019-03-30 23:04:57 +01:00
Matthias Koefferlein f06d435b05 WIP: netlist comparer - moved into it's own files. 2019-03-29 00:37:45 +01:00
Matthias Koefferlein e8d59504dd WIP: netlist compare - forced matching of circuits. 2019-03-29 00:13:13 +01:00
Matthias Koefferlein d255617051 WIP: netlist compare - tests for device class equivalence mapping, added Netlist#device_class_by_name 2019-03-28 18:01:22 +01:00
Matthias Koefferlein cefd6e91cf WIP: some refactoring, netlist compare. Goal: support explicit device class and circuit mapping. 2019-03-27 23:17:35 +01:00
Matthias Koefferlein b44a55d901 WIP: netlist compare - pin swapping. 2019-03-26 23:38:36 +01:00
Matthias Koefferlein 46cd80d606 WIP: netlist compare - terminal swapping of devices. 2019-03-26 22:05:08 +01:00
Matthias Koefferlein e0cb3f6303 WIP: netlist compare - subcircuit matching enhanced. 2019-03-26 20:54:49 +01:00
Matthias Koefferlein 93d2341bc7 WIP: netlist compare 2019-03-26 00:10:10 +01:00
Matthias Koefferlein fec2348d97 WIP: Net compare. 2019-03-25 23:26:46 +01:00
Matthias Koefferlein 1a30a3919d WIP: Net compare with subcircuits. 2019-03-25 22:14:16 +01:00
Matthias Koefferlein 55052038ea WIP: netlist compare 2019-03-24 21:14:08 +01:00
Matthias Koefferlein bb2d3765b8 WIP: netlist compare, ambiguous net resolution, device mapping. 2019-03-24 00:45:58 +01:00
Matthias Koefferlein 25b7ab9dab WIP: netlist comparer 2019-03-23 10:31:29 +01:00
Matthias Koefferlein e424a88c90 WIP: netlist compare algo 
1.) Can identify transistor netlists without subcircuits
2.) Ambiguities stay unresolved

Next steps: assign ambiguous nets one by one and continue
in case of ambiguitites.
 2019-03-21 22:13:23 +01:00
Matthias Koefferlein c568838bbe WIP: netlist compare 2019-03-20 23:00:43 +01:00