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114 Commits

Author SHA1 Message Date
Matthias Koefferlein d20e4b2128 Bug fixes, adjusted test data 2023-02-22 15:54:28 +01:00
Matthias Koefferlein 0e60c90514 Bugfix LVS: same_nets with two arguments was not working as described 2023-02-02 00:30:00 +01:00
Matthias Koefferlein b2624b4c94 Updated golden test data 2022-12-02 00:14:58 +01:00
Matthias Koefferlein 9dc7cbb0ed Updated golden test data 2022-12-01 22:33:26 +01:00
Matthias Koefferlein 50ec2ff006 Updating golden test data 2022-11-25 00:12:31 +01:00
Matthias Koefferlein dc24ec2d15 Updated golden test data 2022-11-24 21:46:56 +01:00
Matthias Koefferlein 0c73b11f9b Added a convenience version for GenericDeviceExtractor#define_terminal which takes terminal and layer names 2022-10-03 22:02:13 +02:00
Matthias Koefferlein ad1ec18361 WIP: updated tests 2022-08-13 18:57:13 +02:00
Matthias Koefferlein 90df9451b6 WIP: reworked log enabling in LVS, added 'no_lvs_hints' feature, updated tests 2022-08-13 18:30:02 +02:00
Matthias Köfferlein 7ffdc211e5
Fixed issue-1135 (LVS mismatch on parallel devices) (#1136) 
* Fixed issue-1135 (LVS mismatch on parallel devices)

The fix consists of a more elaborate device identity analysis
following the topological matching. In this step, the devices
are identified according to their connections and parameters.
It is important to properly identify devices taking their
parameters into account as well as their connections.

* Second part of issue fixed (inverter chain ambiguity)

* Added test

* Updated tests

* Updated golden test results

* Updated golden test data for Windows

Co-authored-by: klayoutmatthias <matthias@klayout.org>
 2022-08-10 20:27:11 +02:00
Matthias Köfferlein 2f8a7149d3
Fixed issue-1111 (#1112) 2022-07-03 09:35:40 +02:00
Matthias Koefferlein 4d55ba2dc5 New testdata variants for MSVC2017 2022-03-18 23:13:21 +01:00
Matthias Koefferlein 5b9f194ecc Forget last commit - problem was that golden netlists should not be compared with net names as those are node numbers and they might change with C++ STL implementation 2022-03-18 00:10:00 +01:00
Matthias Koefferlein d3093f83c3 Updated test data for MSVC2017 2022-03-17 18:00:00 +01:00
Matthias Köfferlein 4a06bc1bb5
Another change related to issue-1011 (aligning flat and deep mode text representation for LVS) (#1037) 2022-03-16 23:33:08 +01:00
Matthias Koefferlein 9f0052e55b Fixed LVS testdata (merge issue) 2022-03-15 23:41:19 +01:00
Matthias Köfferlein 7d78194cf0
Issue 1021 (#1026) - LVS match issue on SRAM sample 
* First step for solution:

Problem was: the ambiguity resolver was making decisions which later resulted in
a name conflict. Later on, another branch of the backtracking algorithm came
across the same situation but decided based on names, creating an conflict.

First part of the solution is to establish the backtracking information
during ambiguity resolution and using that rather than an alternative branch
later on. This avoids this conflict, but does not favor names as mandated
by the "use_names" flag. This will be the second step of the solution.

* Bugfixed solution (partially)

* Introducing third pass in netlist compare

The second pass is "ambiguity resolution by name" and
is skipped if "consider_net_names" is false. The third
pass then is ignoring the names.

* Bugfix

* Comment fixed, test updates

* Added tests

* Added test data variant for CentOS 8
 2022-03-15 21:14:32 +01:00
Matthias Köfferlein e9c5782c51
Issue 1011 (#1027) - DRC violation on texts in deep mode 
* Fixed issue-1011 by using single-point polygons for texts in deep mode. Tests need fixing.

* Updated tests (text become a single point)

* Added test for issue-1011
 2022-03-15 21:13:57 +01:00
Matthias Köfferlein 0005c5d742
Fixed #971 (double compare fails in LVS) (#1001) 2022-02-12 17:04:47 +01:00
Matthias Koefferlein a22ee41414 Updated test data 2021-08-01 00:32:51 +02:00
Matthias Koefferlein 218e22dfa9 Updated test data 2021-07-31 23:12:12 +02:00
Matthias Koefferlein 23dc0e0f5a testdata update 2021-07-31 22:18:42 +02:00
Matthias Koefferlein 58650a57dd testdata update 2021-07-31 22:11:35 +02:00
Matthias Koefferlein 05050e6091 Added missing file 2021-07-31 08:44:21 +02:00
Matthias Koefferlein 48b5193414 Updated test data. 2021-07-31 00:53:18 +02:00
Matthias Koefferlein b744f89dda Updated test data. 2021-07-31 00:03:05 +02:00
Matthias Koefferlein f7ebe9a950 Added test data for CentOS-7 2021-07-30 22:56:35 +02:00
Matthias Koefferlein 0f09dfe8eb Added LVS tests, updated doc. 2021-07-29 22:56:11 +02:00
Matthias Koefferlein 23d0fcae8d Added new tests 2021-07-19 08:32:55 +02:00
Matthias Koefferlein 4e54715d64 Merge branch 'wip-lvs' 2021-07-06 23:40:44 +02:00
Matthias Koefferlein 4e0d8d92ef Updated doc, reverted netlist writer to write all parameters - it will only write primary parameters for R, L and C 2021-07-05 22:45:40 +02:00
Matthias Koefferlein 24c34f1d60 Updated test data 2021-07-05 22:29:33 +02:00
Matthias Koefferlein e34fc8967a Some enhancements 
* Device#net_for_terminal with terminal name
* Spice writer now dumps all parameters for resistors and caps (also secondary)
* Enabled Spice writer delegate in LVS (spice_format(...))
* Device class factories for built-in device extractors
 2021-07-05 22:22:13 +02:00
Matthias Koefferlein 1a0b05e663 Updated test data 2021-07-02 23:38:38 +02:00
Matthias Koefferlein 2d2cf11308 Added tests for new features. 2021-06-28 23:08:02 +02:00
Matthias Koefferlein ab70c42c68 Some enhancements for strong matching of nets 
* same_nets! method for strong matching
* same_nets and same_nets! except glob pattern to circuits and nets
* both observe case sensitivity
* helper functions for case sensitivity Netlist#is_case_sensitive?, Netlist#case_sensitive=
* Netlist#nets_by_name to get nets from pattern
 2021-06-28 22:33:46 +02:00
Matthias Koefferlein dae5d3227a Enhanced documentation for blank_circuit, consilidated 'blank_circuit' method provided which can be used anywhere 2021-06-28 19:51:57 +02:00
Matthias Koefferlein 24afd571f0 LVS: can be used anywhere now: tolerance and join_symmetric_nets 2021-06-28 18:56:07 +02:00
Matthias Koefferlein c24c0933bf Bugfix: blackbox mode/abstract pins 
Abstract pins are created when pins are not attached to any or only to passive nets
(passive nets are those without device terminals or subcircuit pins).

1. Such pins were treated swappable. Now named pins will not be treated
   swappable but are mapped by name. This enables blackbox models where
   the pins are labelled and must correspond to schematic pins.
2. A bug was present which lead to incorrect handling of abstract
   nets in net compare.
 2021-06-27 22:56:28 +02:00
Matthias Koefferlein fcb966393a Fixed #806: first, the internal error gone. Second, the implementation of custom comparers is simplified as the 'equals' method does not need to be implemented. 2021-05-26 22:39:28 +02:00
Matthias Koefferlein 94e7f0dbd3 Updated test data, fixed DRC/LVS doc. 2021-05-25 23:30:43 +02:00
Matthias Koefferlein c48be51cb6 Made SPICE netlist elements case insensitive in LVS scripts 2021-03-24 22:11:15 +01:00
Matthias Koefferlein 1495d9521c Tests updated. 2021-03-15 16:51:56 +01:00
Matthias Köfferlein 10eee4d895
Fixed #709. (#714) 2021-01-31 19:21:00 +01:00
Matthias Köfferlein b413cb9d74
Netlist compare: Ambiguity resolution through name matching now default (can be turned off) (#594) 
* WIP: some refactoring

* WIP: some refactoring

* Netlist compare: introducing ambiguity resolution by net names

By default now net names are used for resolving ambiguities.
If net names match, they will be used to associate nets if the
choice is ambiguous. This is usually much faster and more reliable
than trying to resolve ambiguities through topology analysis.

This feature can be disabled using "consider_net_names(false)" in
the LVS script.

* Some refactoring, Jenkinsfile modified for better test coverage
 2020-06-29 20:47:57 +02:00
Matthias Koefferlein 43ceeecf6e Golden test data for Ubuntu 20 and Windows, pipe output stream for Windows. 2020-06-27 09:50:55 +02:00
Matthias Koefferlein 868adbceab Updated golden test data 2020-06-26 23:52:18 +02:00
Matthias Koefferlein b91e2324d0 Netlist compare enhancement 
This enhancement targets towards a better resolution
of ambiguities. The enhancement is to utilize knowledge
about device and subcircuit equivalences to avoid stale
branches of the ambiguity resolution tree.

So far following these branches could lead to a
contradictions which render an ambiguitiy resolution
choice useless.

One effect of this change is enhanced reproducibility
of the matching log because some pointers are not
involved anymore.
 2020-06-26 17:01:03 +02:00
Matthias Köfferlein 3246e0d36f
Fixed #565 (SPICE global nets must not produce pins if not present) (#567) 
* Fixed #565 (SPICE global nets must not produce pins if not present)

* Fixed unit tests.
 2020-05-26 23:47:59 +02:00
Matthias Koefferlein ee53869cbd Connect_implicit test with labels. 2020-05-23 21:21:30 +02:00