Nick Gasson 64e85304b5 VHDL translation for timescale ...

This patch generates delays with the correct VHDL units. Taking
into account the source module's timescale and precision.

2009-02-23 16:23:56 -08:00

..

vhpi

Move the VHDL support package

2008-07-07 15:36:13 +01:00

cast.cc

VHDL fix concatenation of std_logics

2009-01-25 07:59:06 -08:00

display.cc

Handle %m in VHDL $display code

2009-01-25 07:55:20 -08:00

expr.cc

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

logic.cc

Fix some more errors when reading from VHDL outputs

2009-01-25 07:50:03 -08:00

lpm.cc

Fix some more errors when reading from VHDL outputs

2009-01-25 07:50:03 -08:00

Makefile.in

Update mkinstalldirs to handle paths with spaces.

2009-02-04 08:44:22 -08:00

process.cc

Clean up VHDL debug messages

2009-01-17 09:19:58 -08:00

scope.cc

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

state.cc

Fix VHDL naming collisions with modules

2009-02-05 14:40:47 -08:00

state.hh

Fix VHDL naming collisions with modules

2009-02-05 14:40:47 -08:00

stmt.cc

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

support.cc

Move VHDL global state management to a single file

2009-01-17 09:19:58 -08:00

support.hh

Tidy up reduction functions in support.cc

2008-09-13 18:20:12 +01:00

vhdl_config.h.in

Makefile and autoconf changes to build VHDL code generator

2008-05-28 17:17:39 +01:00

vhdl_element.cc

Improve memory management in VHDL target

2009-01-18 16:42:10 -08:00

vhdl_element.hh

Improve memory management in VHDL target

2009-01-18 16:42:10 -08:00

vhdl_helper.hh

Improve memory management in VHDL target

2009-01-18 16:42:10 -08:00

vhdl_syntax.cc

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

vhdl_syntax.hh

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

vhdl_target.h

Fix VHDL naming collisions with modules

2009-02-05 14:40:47 -08:00

vhdl_type.cc

Generate VHDL array type declarations of Verilog arrays

2008-07-17 13:08:55 +01:00

vhdl_type.hh

Generate VHDL array type declarations of Verilog arrays

2008-07-17 13:08:55 +01:00

vhdl-s.conf

Cary R.'s additional system functions, real value error messages, etc.

2008-09-06 12:06:01 +01:00

vhdl.cc

Support named blocks with local variables in VHDL target

2009-02-01 07:08:55 -08:00

vhdl.conf

Remove redundant back-end selections.

2008-09-07 16:43:54 -07:00