iverilog/vhdlpp
Huang Rui 0100c0bc5c [3/20]vhdlpp/Makefile.in:fix install timestamp check
Fix bug: https://bugs.gentoo.org/705412
Fix bug: https://github.com/gentoo/gentoo/pull/14096
Related: https://github.com/steveicarus/iverilog/pull/294

Signed-off-by: Huang Rui <vowstar@gmail.com>
2020-02-12 22:08:40 +08:00
..
Makefile.in [3/20]vhdlpp/Makefile.in:fix install timestamp check 2020-02-12 22:08:40 +08:00
README.txt
architec.cc vhdlpp: Variables are moved to respective process scopes. 2016-03-07 11:38:11 +01:00
architec.h More spelling, comments only 2016-04-01 11:02:34 -07:00
architec_debug.cc Spelling and whitespace 2016-03-14 12:25:50 -07:00
architec_elaborate.cc More spelling, comments only 2016-04-01 11:02:34 -07:00
architec_emit.cc vhdlpp: Evaluate conditional signal assignments upon simulation start. 2016-09-01 12:08:43 +02:00
compiler.cc vhdlpp: Variables are moved to respective process scopes. 2016-03-07 11:38:11 +01:00
compiler.h More spelling, comments only 2016-04-01 11:02:34 -07:00
debug.cc vhdlpp: Moved Exp*::dump() methods from debug.cc to expression_debug.cc. 2016-09-01 12:08:39 +02:00
entity.cc
entity.h vhdlpp: Out & inout arguments in subprogram calls are turned to registers. 2015-12-01 10:32:47 +01:00
entity_elaborate.cc
entity_emit.cc
entity_stream.cc
expression.cc vhdlpp: Subprograms are matched once. ExpFunc::probe_type() return exact type 2016-09-01 12:08:44 +02:00
expression.h Undo redefinition of unique_ptr at end of header files. 2018-11-02 21:22:10 +00:00
expression_debug.cc vhdlpp: Support for unary sign operator. 2016-09-01 12:08:43 +02:00
expression_elaborate.cc vhdlpp: Use the wider variable size for arith operations on (un)signed 2016-09-01 12:08:44 +02:00
expression_emit.cc vhdlpp: VTypeArray::dimensions() returns std::vector<range_t> 2016-09-01 12:08:43 +02:00
expression_evaluate.cc vhdlpp: VTypeArray::dimensions() returns std::vector<range_t> 2016-09-01 12:08:43 +02:00
expression_stream.cc vhdlpp: Support for unary sign operator. 2016-09-01 12:08:43 +02:00
ivl_assert.h
lexor.lex Update flex destroy routines to work for version 2.6 and greater 2017-11-16 19:11:50 -08:00
lexor_keyword.gperf
library.cc vhdlpp: Removed unused parameters to mute warnings 2016-09-19 12:53:41 -07:00
library.h vhdlpp: Support for subprogram overloading. 2016-03-07 09:54:28 +01:00
main.cc vhdlpp: Elaborate subprograms in packages. 2016-01-05 14:23:25 +01:00
package.cc vhdlpp: Subprograms are linked to Package instead of generic Scope. 2016-03-07 17:11:53 +01:00
package.h vhdlpp: Removed a non-existing method declaration. 2016-03-07 09:54:28 +01:00
package_emit.cc vhdlpp: Support for subprogram overloading. 2016-03-07 09:54:28 +01:00
parse.y replace deprecated yacc directives 2019-09-29 18:19:45 -05:00
parse_api.h
parse_misc.cc vhdlpp: Clearer error messages 2016-09-01 12:08:44 +02:00
parse_misc.h vhdlpp: line feed character (LF). 2016-03-07 09:54:28 +01:00
parse_types.h vhdlpp: Fixing memory leaks and muting valgrind. 2016-01-06 15:30:20 +01:00
parse_wrap.h
scope.cc Fix reference to undefined value (valgrind) 2016-03-24 23:43:07 -07:00
scope.h vhdlpp: Specify lifetime for variables. 2016-03-29 11:27:14 +02:00
sequential.cc vhdlpp: Fixed a few shadow warnings. 2016-03-12 12:03:17 +00:00
sequential.h vhdlpp: Fixed a few shadow warnings. 2016-03-12 12:03:17 +00:00
sequential_debug.cc vhdlpp: Limited support for final wait statement. 2016-03-07 09:54:28 +01:00
sequential_elaborate.cc vhdlpp: Elaborate wait statement argument as time type. 2016-03-07 09:54:28 +01:00
sequential_emit.cc vhdlpp: Handle limited-length strings in reports. 2016-03-07 11:38:11 +01:00
std_funcs.cc Don't allow non-vectorable arguments to $signed/$unsigned. 2018-05-14 22:13:56 +01:00
std_funcs.h vhdlpp: Some of the standard library functions are imported only on request 2016-09-01 12:08:44 +02:00
std_types.cc vhdlpp: Time type can be packed. 2016-03-07 09:54:28 +01:00
std_types.h vhdlpp: file_open_status enum. 2016-03-07 09:54:28 +01:00
subprogram.cc vhdlpp: Subprograms are matched once. ExpFunc::probe_type() return exact type 2016-09-01 12:08:44 +02:00
subprogram.h vhdlpp: Subprograms are matched once. ExpFunc::probe_type() return exact type 2016-09-01 12:08:44 +02:00
subprogram_emit.cc vhdlpp: Fixed automatic variables initalization in subprograms. 2016-03-29 11:27:14 +02:00
vhdlint.cc
vhdlint.h
vhdlnum.h
vhdlpp_config.h.in
vhdlreal.cc
vhdlreal.h
vsignal.cc vhdlpp: Specify lifetime for variables. 2016-03-29 11:27:14 +02:00
vsignal.h vhdlpp: Fixed automatic variables initalization in subprograms. 2016-03-29 11:27:14 +02:00
vtype.cc Fix space issues 2016-08-14 19:37:40 -07:00
vtype.h vhdlpp: Stricter array type matching 2016-09-01 12:08:43 +02:00
vtype_elaborate.cc vhdlpp: VTypeRangeExpr::elaborate() 2016-03-07 09:54:28 +01:00
vtype_emit.cc vhdlpp: VTypeArray::dimensions() returns std::vector<range_t> 2016-09-01 12:08:43 +02:00
vtype_match.cc vhdlpp: Stricter array type matching 2016-09-01 12:08:43 +02:00
vtype_stream.cc vhdlpp: Fixes for subtypes handling. 2016-03-07 09:54:28 +01:00

README.txt

vhdlpp COMMAND LINE FLAGS:

-D <token>
  Debug flags. The token can be:

  * yydebug | no-yydebug

  * entities=<path>

-L <path>
  Library path. Add the directory name to the front of the library
  search path. The library search path is initially empty.

-V
  Display version on stdout

-v
  Verbose: Display version on stderr, and enable verbose messages to
  stderr.

-w <path>
  Work path. This is the directory where the working directory is.


LIBRARY FORMAT:

The vhdlpp program stores libraries as directory that contain
packages. The name of the directory (in lower case) is the name of the
library as used on the "import" statement. Within that library, there
are packages in files named <foo>.pkg. For example:

    <directory>/...
       sample/...
         test1.pkg
	 test2.pkg
       bar/...
         test3.pkg

Use the "+vhdl-libdir+<directory>" record in a config file to tell
Icarus Verilog that <directory> is a place to look for libraries. Then
in your VHDL code, access packages like this:

    library sample;
    library bar;
    use sample.test1.all;
    use bar.test3.all;

The *.pkg files are just VHDL code containing only the package with
the same name. When Icarus Verilog encounters the "use <lib>.<name>.*;"
statement, it looks for the <name>.pkg file in the <lib> library and
parses that file to get the package header declared therein.