vhdlpp: inout direction for ports.

vhdlpp/entity.h

@@ -27,7 +27,7 @@
 # include  "StringHeap.h"
 # include  "LineInfo.h"
 
-typedef enum { PORT_NONE=0, PORT_IN, PORT_OUT } port_mode_t;
+typedef enum { PORT_NONE=0, PORT_IN, PORT_OUT, PORT_INOUT } port_mode_t;
 
 class Architecture;
 class Expression;

vhdlpp/entity_emit.cc

@@ -74,17 +74,21 @@ int Entity::emit(ostream&out)
 
 		  switch (port->mode) {
 		      case PORT_NONE: // Should not happen
+			cerr << get_fileline() << ": error: Undefined port direction." << endl;
 			out << "NO_PORT " << port->name;
 			break;
 		      case PORT_IN:
 			out << "input ";
-			errors += decl.emit(out, port->name);
 			break;
 		      case PORT_OUT:
 			out << "output ";
-			errors += decl.emit(out, port->name);
+			break;
+		      case PORT_INOUT:
+			out << "inout ";
 			break;
 		  }
+
+		  errors += decl.emit(out, port->name);
 	    }
 	    cout << ")";
       }

vhdlpp/entity_stream.cc

@@ -69,6 +69,9 @@ void ComponentBase::write_to_stream(ostream&fd) const
                     case PORT_OUT:
                     fd << "out ";
                     break;
+                    case PORT_INOUT:
+                    fd << "inout ";
+                    break;
                 }
 
                 item->type->write_to_stream(fd);

vhdlpp/parse.y

@@ -1584,6 +1584,7 @@ loop_statement
 mode
   : K_in  { $$ = PORT_IN; }
   | K_out { $$ = PORT_OUT; }
+  | K_inout { $$ = PORT_INOUT; }
   ;
 
 mode_opt : mode {$$ = $1;} | {$$ = PORT_NONE;} ;

vhdlpp/subprogram_emit.cc

@@ -50,6 +50,9 @@ int Subprogram::emit_package(ostream&fd) const
 		case PORT_OUT:
 		  fd << "output ";
 		  break;
+		case PORT_INOUT:
+		  fd << "inout ";
+		  break;
 		case PORT_NONE:
 		  fd << "inout /* PORT_NONE? */ ";
 		  break;