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.cvsignore
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Add the fpga target.
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2001-08-28 04:14:20 +00:00 |
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Makefile.in
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Missing copyright notice.
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2003-07-02 00:27:24 +00:00 |
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configure.in
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Preserve user specifiec CFLAGS/CPPFLAGS.
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2003-04-23 05:27:44 +00:00 |
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d-generic-edif.c
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No longer export generic-edif functions.
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2003-07-02 00:48:03 +00:00 |
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d-generic.c
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Add ivl_synthesis_cell support for virtex2.
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2003-06-24 03:55:00 +00:00 |
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d-virtex.c
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Generate MUXF5 based 4-input N-wide muxes.
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2003-07-04 00:10:09 +00:00 |
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d-virtex2.c
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Generate MUXF5 based 4-input N-wide muxes.
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2003-07-04 00:10:09 +00:00 |
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device.h
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Add ivl_synthesis_cell support for virtex2.
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2003-06-24 03:55:00 +00:00 |
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edif.c
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Add ivl_synthesis_cell support for virtex2.
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2003-06-24 03:55:00 +00:00 |
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edif.h
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Add ivl_synthesis_cell support for virtex2.
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2003-06-24 03:55:00 +00:00 |
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fpga.c
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Spelling fixes.
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2003-06-25 01:49:06 +00:00 |
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fpga.txt
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Allow attributes on Verilog 2001 port declarations.
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2003-07-04 03:57:18 +00:00 |
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fpga_priv.h
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No longer export generic-edif functions.
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2003-07-02 00:48:03 +00:00 |
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gates.c
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Add ivl_synthesis_cell support for virtex2.
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2003-06-24 03:55:00 +00:00 |
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generic.c
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IOPAD support.
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2003-07-03 17:46:33 +00:00 |
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generic.h
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IOPAD support.
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2003-07-03 17:46:33 +00:00 |
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mangle.c
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conditional ident string using autoconfig.
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2002-08-12 01:34:58 +00:00 |
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tables.c
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Add new virtex2 architecture family, and
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2003-03-24 00:47:54 +00:00 |
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xilinx.c
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PAD attribute can be used to assign pins.
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2003-07-04 01:08:03 +00:00 |
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xilinx.h
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Generate MUXF5 based 4-input N-wide muxes.
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2003-07-04 00:10:09 +00:00 |
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