Cary R ae49197a14 Cleanup a few more issues found with cppcheck. ...

Minor fixes and code reorganization to remove a few more issues
that cppcheck is complaining about. It has a few false warnings
and some issues that need more investigation.

2009-10-31 20:42:43 -07:00

..

vhpi

…

cast.cc

VHDL fix concatenation of std_logics

2009-01-25 07:59:06 -08:00

display.cc

Handle %m in VHDL $display code

2009-01-25 07:55:20 -08:00

expr.cc

Cleanup a few more issues found with cppcheck.

2009-10-31 20:42:43 -07:00

logic.cc

Fix some more errors when reading from VHDL outputs

2009-01-25 07:50:03 -08:00

lpm.cc

Convert IVL_LPM_CONCAT to use ivl_lpm_size() instead of ivl_lpm_selects()

2009-09-03 17:02:16 -07:00

Makefile.in

Still more build system cleanup.

2009-10-23 10:57:41 -07:00

process.cc

Allow labelled begin blocks to contain processes in VHDL target

2009-09-03 17:13:41 -07:00

scope.cc

Handle generate scopes with signals in VHDL target

2009-09-03 17:13:33 -07:00

state.cc

Handle generate scopes with signals in VHDL target

2009-09-03 17:13:33 -07:00

state.hh

Handle generate scopes with signals in VHDL target

2009-09-03 17:13:33 -07:00

stmt.cc

Fix some memory leaks/issues found with cppcheck.

2009-08-06 10:50:08 -07:00

support.cc

Move VHDL global state management to a single file

2009-01-17 09:19:58 -08:00

support.hh

Tidy up reduction functions in support.cc

2008-09-13 18:20:12 +01:00

vhdl_config.h.in

Fix memory.h include issues.

2009-10-26 11:09:02 -07:00

vhdl_element.cc

Improve memory management in VHDL target

2009-01-18 16:42:10 -08:00

vhdl_element.hh

Improve memory management in VHDL target

2009-01-18 16:42:10 -08:00

vhdl_helper.hh

Improve memory management in VHDL target

2009-01-18 16:42:10 -08:00

vhdl_syntax.cc

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

vhdl_syntax.hh

VHDL translation for timescale

2009-02-23 16:23:56 -08:00

vhdl_target.h

Fix VHDL naming collisions with modules

2009-02-05 14:40:47 -08:00

vhdl_type.cc

Generate VHDL array type declarations of Verilog arrays

2008-07-17 13:08:55 +01:00

vhdl_type.hh

Generate VHDL array type declarations of Verilog arrays

2008-07-17 13:08:55 +01:00

vhdl-s.conf

Cary R.'s additional system functions, real value error messages, etc.

2008-09-06 12:06:01 +01:00

vhdl.cc

Support named blocks with local variables in VHDL target

2009-02-01 07:08:55 -08:00

vhdl.conf

Remove redundant back-end selections.

2008-09-07 16:43:54 -07:00