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iverilog/tgt-vhdl
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Nick Gasson a34348bb35 Add (temporary) error for ICT_SCOPE_GENERATE 
Generate scopes were previously ignored, and this would cause a segfault
later on. This patch gives an error whenever it encounters a generate
scope. This should be removed once generate statements are implemented.
 		2008-09-06 11:38:37 +01:00
..
vhpi Move the VHDL support package 2008-07-07 15:36:13 +01:00
Makefile.in Build files compatible with snapshot 20080830 2008-08-30 17:09:51 -07:00
cast.cc Fix vhdl_expr::cast when expression has no assigned type 2008-09-02 20:22:50 +01:00
configure.in Makefile and autoconf changes to build VHDL code generator 2008-05-28 17:17:39 +01:00
display.cc Avoid printing field widths in $display/$write output 2008-08-15 19:43:16 +01:00
expr.cc Ensure binary operands have correct signedness 2008-08-28 21:53:12 +01:00
logic.cc Handle BUFIF logic when vector inputs 2008-08-18 15:48:07 +01:00
lpm.cc Add IVL_LPM_CMP_GT 2008-09-02 19:07:38 +01:00
process.cc Use ivl_process_* functions for file/line number information 2008-08-02 10:44:03 +01:00
scope.cc Add (temporary) error for ICT_SCOPE_GENERATE 2008-09-06 11:38:37 +01:00
stmt.cc Add more warnings about untranslatable constructs 2008-08-22 20:25:58 +01:00
support.cc Support conversion of (un)signed to std_logic 2008-08-22 20:59:14 +01:00
support.hh Support conversion of (un)signed to std_logic 2008-08-22 20:59:14 +01:00
vhdl.cc Add (temporary) error for ICT_SCOPE_GENERATE 2008-09-06 11:38:37 +01:00
vhdl.conf Makefile and autoconf changes to build VHDL code generator 2008-05-28 17:17:39 +01:00
vhdl_config.h.in Makefile and autoconf changes to build VHDL code generator 2008-05-28 17:17:39 +01:00
vhdl_element.cc Compress support function definitions a bit 2008-07-19 21:04:52 +01:00
vhdl_element.hh Compress support function definitions a bit 2008-07-19 21:04:52 +01:00
vhdl_helper.hh Handle '?' in vl_to_vhdl_bit 2008-08-11 13:53:42 +01:00
vhdl_syntax.cc Use case-insensitive string comparison for get_decl 2008-08-22 20:15:45 +01:00
vhdl_syntax.hh Refactor and clean up cast.cc 2008-08-27 16:47:07 +01:00
vhdl_target.h Avoid generating useless `wait for 0ns' statements 2008-08-05 11:02:36 +01:00
vhdl_type.cc Generate VHDL array type declarations of Verilog arrays 2008-07-17 13:08:55 +01:00
vhdl_type.hh Generate VHDL array type declarations of Verilog arrays 2008-07-17 13:08:55 +01:00