Refactor and clean up cast.cc
This splits up the monolithic and confusing vhdl_expr::cast function into several smaller to_XXX functions which each generate code to cast an expression to type XXX. This makes it much easier to understand and maintain.
This commit is contained in:
Nick Gasson
parent
924ddb787a
commit
b5e65ac9ed
245
tgt-vhdl/cast.cc
245
tgt-vhdl/cast.cc
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@ -39,75 +39,119 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
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else
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return resize(to->get_width());
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}
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else if (to->get_name() == VHDL_TYPE_BOOLEAN) {
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if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
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// '1' is true all else are false
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vhdl_const_bit *one = new vhdl_const_bit('1');
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return new vhdl_binop_expr
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(this, VHDL_BINOP_EQ, one, vhdl_type::boolean());
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}
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else if (type_->get_name() == VHDL_TYPE_UNSIGNED) {
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// Need to use a support function for this conversion
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require_support_function(SF_UNSIGNED_TO_BOOLEAN);
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else if (to->get_name() == VHDL_TYPE_BOOLEAN)
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return to_boolean();
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else if (to->get_name() == VHDL_TYPE_INTEGER)
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return to_integer();
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else if (to->get_name() == VHDL_TYPE_UNSIGNED
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|| to->get_name() == VHDL_TYPE_SIGNED
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|| to->get_name() == VHDL_TYPE_STD_LOGIC_VECTOR)
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return to_vector(to->get_name(), to->get_width());
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else if (to->get_name() == VHDL_TYPE_STD_LOGIC)
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return to_std_logic();
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else
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assert(false);
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}
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vhdl_fcall *conv =
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new vhdl_fcall(support_function::function_name(SF_UNSIGNED_TO_BOOLEAN),
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vhdl_type::boolean());
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conv->add_expr(this);
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return conv;
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}
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else if (type_->get_name() == VHDL_TYPE_SIGNED) {
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require_support_function(SF_SIGNED_TO_BOOLEAN);
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vhdl_fcall *conv =
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new vhdl_fcall(support_function::function_name(SF_SIGNED_TO_BOOLEAN),
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vhdl_type::boolean());
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conv->add_expr(this);
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return conv;
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}
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else {
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assert(false);
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}
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}
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else if (to->get_name() == VHDL_TYPE_INTEGER) {
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vhdl_fcall *conv;
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if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
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require_support_function(SF_LOGIC_TO_INTEGER);
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conv = new vhdl_fcall(support_function::function_name(SF_LOGIC_TO_INTEGER),
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vhdl_type::integer());
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}
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else
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conv = new vhdl_fcall("To_Integer", new vhdl_type(*to));
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conv->add_expr(this);
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return conv;
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}
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else if ((to->get_name() == VHDL_TYPE_UNSIGNED
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|| to->get_name() == VHDL_TYPE_SIGNED
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|| to->get_name() == VHDL_TYPE_STD_LOGIC_VECTOR) &&
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type_->get_name() == VHDL_TYPE_STD_LOGIC) {
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vhdl_expr *others = to->get_width() == 1 ? NULL : new vhdl_const_bit('0');
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/*
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* Generate code to cast an expression to a vector type (std_logic_vector,
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* signed, unsigned).
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*/
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vhdl_expr *vhdl_expr::to_vector(vhdl_type_name_t name, int w)
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{
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if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
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vhdl_expr *others = w == 1 ? NULL : new vhdl_const_bit('0');
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vhdl_bit_spec_expr *bs =
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new vhdl_bit_spec_expr(new vhdl_type(*to), others);
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new vhdl_bit_spec_expr(new vhdl_type(name, w - 1, 0), others);
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bs->add_bit(0, this);
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return bs;
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}
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else if (to->get_name() == VHDL_TYPE_STD_LOGIC &&
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type_->get_name() == VHDL_TYPE_BOOLEAN) {
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else {
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// We have to cast the expression before resizing or the
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// wrong sign bit may be extended (i.e. when casting between
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// signed/unsigned *and* resizing)
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vhdl_type *t = new vhdl_type(name, w - 1, 0);
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vhdl_fcall *conv = new vhdl_fcall(t->get_string().c_str(), t);
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conv->add_expr(this);
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if (w != type_->get_width())
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return conv->resize(w);
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else
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return conv;
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}
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}
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/*
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* Convert a generic expression to an Integer.
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*/
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vhdl_expr *vhdl_expr::to_integer()
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{
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vhdl_fcall *conv;
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if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
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require_support_function(SF_LOGIC_TO_INTEGER);
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conv = new vhdl_fcall(support_function::function_name(SF_LOGIC_TO_INTEGER),
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vhdl_type::integer());
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}
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else
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conv = new vhdl_fcall("To_Integer", vhdl_type::integer());
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conv->add_expr(this);
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return conv;
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}
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/*
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* Convert a generic expression to a Boolean.
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*/
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vhdl_expr *vhdl_expr::to_boolean()
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{
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if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
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// '1' is true all else are false
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vhdl_const_bit *one = new vhdl_const_bit('1');
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return new vhdl_binop_expr
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(this, VHDL_BINOP_EQ, one, vhdl_type::boolean());
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}
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else if (type_->get_name() == VHDL_TYPE_UNSIGNED) {
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// Need to use a support function for this conversion
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require_support_function(SF_UNSIGNED_TO_BOOLEAN);
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vhdl_fcall *conv =
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new vhdl_fcall(support_function::function_name(SF_UNSIGNED_TO_BOOLEAN),
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vhdl_type::boolean());
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conv->add_expr(this);
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return conv;
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}
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else if (type_->get_name() == VHDL_TYPE_SIGNED) {
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require_support_function(SF_SIGNED_TO_BOOLEAN);
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vhdl_fcall *conv =
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new vhdl_fcall(support_function::function_name(SF_SIGNED_TO_BOOLEAN),
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vhdl_type::boolean());
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conv->add_expr(this);
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return conv;
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}
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else {
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assert(false);
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}
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}
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/*
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* Generate code to convert and expression to std_logic.
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*/
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vhdl_expr *vhdl_expr::to_std_logic()
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{
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if (type_->get_name() == VHDL_TYPE_BOOLEAN) {
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require_support_function(SF_BOOLEAN_TO_LOGIC);
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vhdl_fcall *ah =
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new vhdl_fcall(support_function::function_name(SF_BOOLEAN_TO_LOGIC),
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vhdl_type::std_logic());
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ah->add_expr(this);
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return ah;
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}
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else if (to->get_name() == VHDL_TYPE_STD_LOGIC
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&& (type_->get_name() == VHDL_TYPE_SIGNED)) {
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else if (type_->get_name() == VHDL_TYPE_SIGNED) {
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require_support_function(SF_SIGNED_TO_LOGIC);
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vhdl_fcall *ah =
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@ -117,8 +161,7 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
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return ah;
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}
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else if (to->get_name() == VHDL_TYPE_STD_LOGIC
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&& (type_->get_name() == VHDL_TYPE_UNSIGNED)) {
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else if (type_->get_name() == VHDL_TYPE_UNSIGNED) {
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require_support_function(SF_UNSIGNED_TO_LOGIC);
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vhdl_fcall *ah =
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@ -128,21 +171,13 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
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return ah;
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}
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else {
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// We have to cast the expression before resizing or the
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// wrong sign bit may be extended (i.e. when casting between
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// signed/unsigned *and* resizing)
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vhdl_fcall *conv =
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new vhdl_fcall(to->get_string().c_str(), new vhdl_type(*to));
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conv->add_expr(this);
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if (to->get_width() != type_->get_width())
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return conv->resize(to->get_width());
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else
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return conv;
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}
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else
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assert(false);
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}
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/*
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* Change the width of a signed/unsigned type.
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*/
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vhdl_expr *vhdl_expr::resize(int newwidth)
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{
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vhdl_type *rtype;
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@ -161,21 +196,20 @@ vhdl_expr *vhdl_expr::resize(int newwidth)
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return resize;
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}
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vhdl_expr *vhdl_const_int::cast(const vhdl_type *to)
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vhdl_expr *vhdl_const_int::to_vector(vhdl_type_name_t name, int w)
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{
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if (to->get_name() == VHDL_TYPE_SIGNED
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|| to->get_name() == VHDL_TYPE_UNSIGNED) {
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if (name == VHDL_TYPE_SIGNED || name == VHDL_TYPE_UNSIGNED) {
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const char *fname = to->get_name() == VHDL_TYPE_SIGNED
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const char *fname = name == VHDL_TYPE_SIGNED
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? "To_Signed" : "To_Unsigned";
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vhdl_fcall *conv = new vhdl_fcall(fname, new vhdl_type(*to));
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vhdl_fcall *conv = new vhdl_fcall(fname, new vhdl_type(name, w - 1, 0));
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conv->add_expr(this);
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conv->add_expr(new vhdl_const_int(to->get_width()));
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conv->add_expr(new vhdl_const_int(w));
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return conv;
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}
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else
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return vhdl_expr::cast(to);
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return vhdl_expr::to_vector(name, w);
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}
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int vhdl_const_bits::bits_to_int() const
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@ -193,41 +227,44 @@ int vhdl_const_bits::bits_to_int() const
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return result;
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}
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vhdl_expr *vhdl_const_bits::cast(const vhdl_type *to)
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vhdl_expr *vhdl_const_bits::to_std_logic()
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{
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// VHDL won't let us cast directly between a vector and
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// a scalar type
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// But we don't need to here as we have the bits available
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// Take the least significant bit
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char lsb = value_[0];
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return new vhdl_const_bit(lsb);
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}
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vhdl_expr *vhdl_const_bits::to_vector(vhdl_type_name_t name, int w)
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{
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if (to->get_name() == VHDL_TYPE_STD_LOGIC) {
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// VHDL won't let us cast directly between a vector and
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// a scalar type
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// But we don't need to here as we have the bits available
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// Take the least significant bit
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char lsb = value_[0];
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return new vhdl_const_bit(lsb);
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}
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else if (to->get_name() == VHDL_TYPE_STD_LOGIC_VECTOR) {
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if (name == VHDL_TYPE_STD_LOGIC_VECTOR) {
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// Don't need to do anything
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return this;
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}
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else if (to->get_name() == VHDL_TYPE_SIGNED
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|| to->get_name() == VHDL_TYPE_UNSIGNED) {
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else if (name == VHDL_TYPE_SIGNED || name == VHDL_TYPE_UNSIGNED) {
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// Extend with sign bit
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value_.resize(to->get_width(), value_[0]);
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value_.resize(w, value_[0]);
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return this;
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}
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else if (to->get_name() == VHDL_TYPE_INTEGER)
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return new vhdl_const_int(bits_to_int());
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else
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return vhdl_expr::cast(to);
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assert(false);
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}
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vhdl_expr *vhdl_const_bit::cast(const vhdl_type *to)
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vhdl_expr *vhdl_const_bits::to_integer()
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{
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if (to->get_name() == VHDL_TYPE_INTEGER)
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return new vhdl_const_int(bit_ == '1' ? 1 : 0);
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else if (to->get_name() == VHDL_TYPE_BOOLEAN)
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return new vhdl_const_bool(bit_ == '1');
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else
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return vhdl_expr::cast(to);
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return new vhdl_const_int(bits_to_int());
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}
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vhdl_expr *vhdl_const_bit::to_integer()
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{
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return new vhdl_const_int(bit_ == '1' ? 1 : 0);
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}
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vhdl_expr *vhdl_const_bit::to_boolean()
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{
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return new vhdl_const_bool(bit_ == '1');
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}
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@ -36,8 +36,13 @@ public:
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const vhdl_type *get_type() const { return type_; }
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bool constant() const { return isconst_; }
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virtual vhdl_expr *cast(const vhdl_type *to);
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vhdl_expr *cast(const vhdl_type *to);
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virtual vhdl_expr *resize(int newwidth);
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virtual vhdl_expr *to_boolean();
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virtual vhdl_expr *to_integer();
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virtual vhdl_expr *to_std_logic();
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virtual vhdl_expr *to_vector(vhdl_type_name_t name, int w);
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protected:
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vhdl_type *type_;
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bool isconst_;
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@ -165,7 +170,9 @@ public:
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vhdl_const_bits(const char *value, int width, bool issigned);
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void emit(std::ostream &of, int level) const;
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const std::string &get_value() const { return value_; }
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vhdl_expr *cast(const vhdl_type *to);
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vhdl_expr *to_integer();
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vhdl_expr *to_std_logic();
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vhdl_expr *to_vector(vhdl_type_name_t name, int w);
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private:
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int bits_to_int() const;
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@ -178,7 +185,8 @@ public:
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vhdl_const_bit(char bit)
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: vhdl_expr(vhdl_type::std_logic(), true), bit_(bit) {}
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void emit(std::ostream &of, int level) const;
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vhdl_expr *cast(const vhdl_type *to);
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vhdl_expr *to_boolean();
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vhdl_expr *to_integer();
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private:
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char bit_;
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};
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@ -202,7 +210,7 @@ public:
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vhdl_const_int(int64_t value)
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: vhdl_expr(vhdl_type::integer(), true), value_(value) {}
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void emit(std::ostream &of, int level) const;
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vhdl_expr *cast(const vhdl_type *to);
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vhdl_expr *to_vector(vhdl_type_name_t name, int w);
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private:
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int64_t value_;
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};
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