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41 Commits
Author SHA1 Message Date
Stephen Williams 9b807c78d3 Prepare for 20070812 snapshot 2007-08-12 20:27:38 -07:00
Stephen Williams 1942899a3f Fix return of net strength value.
The calculated return value for the calculated strength value of
a net was left dangling. This patch fixes that. See pr1770199 in
the regression test suite.

Signed-off-by: Stephen Williams <[email protected]>
2007-08-10 21:51:13 -07:00
Stephen Williams 5e385e901d Fix missing endif 2007-08-10 10:14:00 -07:00
Stephen Williams 3b94c122b7 Constant concat operands are self determined
distinguish between self-determined and value-preserving when
evaluating constants that are arguments to concatenations.

Signed-off-by: Stephen Williams <[email protected]>
2007-08-09 22:08:54 -07:00
Stephen Williams f46be09914 Initialize assignments of reals
Support initialization assignments of real value variables. In the
process, clean up the processing of real variable declarations in
the parser.

Signed-off-by: Stephen Williams <[email protected]>
2007-08-04 21:50:06 -07:00
Cary R 1aa4394d75 Check the random function seed type and a fix to handle time variables.
The standard states that the seed for the random functions should be
an integer/time variable or a register. This patch fixes the compiletf
routines to check for this. There is also a small patch to
vvp/vpi_signal.cc that removes an assert that was failing and replaces
it with appropriate code. The assert was verifying that the source was
not bigger than an integer. The problem with this is that a time
variable or register may be bigger than an integer. I altered the code
to remove the assert and copy only the lower (8 * sizeof integer) bits.
The potential overflow/loss of precision is not checked. This passes
the regression tests.
2007-07-25 21:36:06 -07:00
Stephen Williams 8dc23dad59 Delay compiletf until bindings are complete
Delat the compiletf calls until after all the label references
are resolved and link bindings are complete. Otherwise, there may
be dangling references.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-24 18:24:24 -07:00
Cary R b23eb1b917 [PATCH] Add compiletf routine for deposit system task and fix string constants.
This patch adds a compiletf routine to the $deposit system task and
simplifies the calltf routine. It also patches the constant string code
to return an appropriate integer value when needed. A number of compiletf
routines that check for this can now be simplified since this (string
constants) no longer causes an assert in an integer environment.
2007-07-23 21:23:55 -07:00
Stephen Williams 824f29a7d2 Better errors for invalid scope path
Better handle cases where the scope part of a heirarchical name does
not match any existing scope, or where scope index expressions are
not correct.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-22 21:55:35 -07:00
Stephen Williams a6bd1ff3ce Vector parts into reduction nets
In rare cases, the reduction logic nodes may get vector part inputs.
This patch adds support for vector parts entering a reduction node.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-22 21:52:28 -07:00
Stephen Williams fa05344738 Parameter names in generate blocks from containing scopes.
Parameter names used in generate blocks can look in containing
scopes (but not past the containing module) for their definitions.
2007-07-21 17:47:37 -07:00
Martin Whitaker 42fe46a7db Elaborate memory references with non-zero bases.
This fixes r-value type references to memory words for memories
that have a non-zero base address. Elaborate the expression
needed to get the canonical word index.
2007-07-21 17:19:24 -07:00
Stephen Williams 3d51810f01 Merge branch 'master' of [email protected]:git/verilog 2007-07-20 19:35:22 -07:00
Stephen Williams dd5e34dc90 Invalid assertion on udp port count
The port input count assertion was triggering incorrectly. It was
comparing the count with the bytes instead of bits in a word.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-20 19:31:27 -07:00
Cary R a359ec45f7 Pass the finish and stop system task argument correctly.
The argument passed to $finish and $stop is not currently used, but it
is now passed down to the functions that may someday do something
useful with it (schedule_finish() and schedule_stop() in vvp/schedule.cc).
2007-07-20 14:01:35 -07:00
Cary R a024eaead2 Add missing probabilistic functions and compiletf routines.
Add the missing probabilistic functions and add compiletf routines
for all the functions. The original calltf routines have been
modified as appropriate. The base functions are straight copies
from the standard. I have visually verified the curves with 5,000
points and they look correct.
2007-07-20 13:54:49 -07:00
Cary R 1aa6fc3f7a [PATCH] Update vpiFinish arguments to be in correct range.
Even though vpiFinish does not currently do anything with it's
argument I thought it would be best to have them all be in the
correct range [0, 1, 2], so they have been updated as appropriate.
2007-07-19 17:35:40 -07:00
Cary R e546a9d5c8 Update the files to use vpi_control vs vpi_sim_control.
vpi_sim_control is no longer part of the standard, so update the code to
use the standard function (vpi_control).
2007-07-19 17:29:05 -07:00
Stephen Williams 58cb5a668b Real value constants in vector declaration
Handle real valued expressions in vector declarations. Also clean
up the handling of vector declaration expressions.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-17 18:07:34 -07:00
Stephen Williams 6b0c62c9c4 Minor improvements to $bits implementation
Signed-off-by: Stephen Williams <[email protected]>
2007-07-17 18:05:48 -07:00
Stephen Williams 7aa323bcbf Handle nil parameter overrides
Nil parameter overrides can turn up in positional paramter override
lists, where items are intentionally skipped.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-14 17:11:14 -07:00
Stephen Williams b327b86e4a Propagate real values properly
Be careful to include bitwise differences in double values, because
it is the bit pattern we are passing aroung, not the arithmetic value.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-13 18:42:35 -07:00
Cary R acddb99305 Document the predefined __ICARUS__ macro 2007-07-12 19:05:09 -07:00
Stephen Williams 32ecd260f0 Merge branch 'master' of [email protected]:git/verilog 2007-07-11 21:43:33 -07:00
Stephen Williams 7132b8ff6b Start runtime trace aids
The runtime is a vvp runtime engine debug aid that allows for
detailed dump into a debug log. The trace is enabled by setting
the VVP_DEBUG variable and activating specific debug messages
in the vvp source.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-11 21:38:56 -07:00
Stephen Williams b54ef4f585 Variable drivers propogate initial values.
Make varable drivers (reg vectors and real) propagate their initial
values using a special init scheduler queue. This causes the net to
be loaded with reasonable initial values.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-11 21:31:09 -07:00
Larry Doolittle 371c5d932d Correct wrong or misleading comments. 2007-07-06 12:46:32 -07:00
Stephen Williams a72977a7ed Bit select of array word
fix support for bit select of array word in behavioral expressions.
2007-07-03 20:17:43 -07:00
Stephen Williams e75e7131ac Fix signed compare with minus values
If the operands were negative, and not equal, the lt flag
would be set incorrectly.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-02 21:33:05 -07:00
Stephen Williams 018f1a6e7f Handle indexed part select in continuous assign.
Non-constant indexed part select in continuous assignment generates
a select node with the correct width. In the process factor out and
share some of the part select calculations with expr part select
handling methods.

Signed-off-by: Stephen Williams <[email protected]>
2007-07-02 20:53:02 -07:00
Stephen Williams 88dea0c318 Remove restriction on size of constants
Constant strings are now formed in dynamically allocated memory
instead of a fixed array.

Signed-off-by: Stephen Williams <[email protected]>
2007-06-30 20:27:08 -07:00
Stephen Williams 21d6fb6bc6 Fix runtime crash dumping VCD
Words of net arrays were incorrectly added to the scope. They should
only be attached to the array, and accessed as a word of the array.


Signed-off-by: Stephen Williams <[email protected]>
2007-06-30 09:34:02 -07:00
Stephen Williams d7c3a32b06 Fix code generation for real expressions
Real value are vector width of 1, fix real literal to reflect this.
fix leaking real registers in code generation for function arguments.
Load of signal should handle conversion from real to vector. Function
arguments, type vector passed a real value, are an example where this
comes up.

Signed-off-by: Stephen Williams <[email protected]>
2007-06-29 21:10:37 -07:00
Stephen Williams b525a63f50 Do not process back-slash escapes twice.
Backslash-escapes are processed early, during elaboration, so that
escaped characters show up in all places with the calculated value.
This means the $display formatting will get processed strings and
should not process back-slashes again.

Signed-off-by: Stephen Williams <[email protected]>
2007-06-28 18:07:22 -07:00
Stephen Williams 4cf9447ad9 Merge branch 'master' of [email protected]:git/verilog 2007-06-27 22:17:46 -07:00
Stephen Williams 845e74c30e Evaluate parameter expressions losslessly
Make sure parameter expressions are evaluated losslessly, as if
the l-value is unsigned and thus virtually infinite.
2007-06-27 22:05:36 -07:00
Stephen Williams a6f898a702 Careful not to lose bits parameter add expression
Parameter expressions that do not otherwise have a size should
evaluate expressions losslessly, expanding as necessary to prevent
overflow of data.

Signed-off-by: Stephen Williams <[email protected]>
2007-06-27 21:51:31 -07:00
Stephen Williams 59a43ab2ce Do not match scopes in ident expressions
Identifiers in expressions cannot be scope names, even
though the special case of a simple system task argument
expression allows it.
2007-06-25 20:33:40 -07:00
Stephen Williams ed698deeaa Add support for collapsed/aliased arrays.
Arrays of nets that have all their words collapsed together can become
a collapsed array as a whole. Add support for this case in the vvp code
generator and runtime.
2007-06-24 18:17:37 -07:00
Stephen Williams 396ffd1cdd Add support for conditional generate. In the process, fix bugs
related to generate used multiple times by multiple scopes causing
spurious generation results.


Signed-off-by: Stephen Williams <[email protected]>
2007-06-21 19:04:48 -07:00
Stephen Williams 9d2dd782c0 Get offsets right for non-zero and reversed part selects.
Signed-off-by: Stephen Williams <[email protected]>
2007-06-15 16:59:24 -07:00
54 changed files with 1893 additions and 3267 deletions
+23 -3
View File
@@ -79,9 +79,15 @@ class PExpr : public LineInfo {
// Procedural elaboration of the expression. The expr_width is
// the width of the context of the expression (i.e. the
// l-value width of an assignment) or -1 if the expression is
// self-determinted. The sys_task_arg flag is true if
// expressions are allowed to be incomplete.
// l-value width of an assignment),
//
// ... or -1 if the expression is self-determined. or
// ... or -2 if the expression is losslessly
// self-determined. This can happen in situations where the
// result is going to a pseudo-infinitely wide context.
//
// The sys_task_arg flag is true if expressions are allowed to
// be incomplete.
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
int expr_width, bool sys_task_arg) const;
@@ -352,6 +358,20 @@ class PEIdent : public PExpr {
Link::strength_t drive0,
Link::strength_t drive1) const;
NetNet* elaborate_net_net_(Design*des, NetScope*scope,
NetNet*sig, unsigned lwidth,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
NetNet* elaborate_net_net_idx_up_(Design*des, NetScope*scope,
NetNet*sig, unsigned lwidth,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const;
NetNet* elaborate_net_bitmux_(Design*des, NetScope*scope,
NetNet*sig,
const NetExpr* rise,
+9 -3
View File
@@ -50,7 +50,7 @@ class PGenerate : public LineInfo {
const unsigned id_number;
perm_string scope_name;
enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT};
enum scheme_t {GS_NONE, GS_LOOP, GS_CONDIT, GS_ELSE};
scheme_t scheme_type;
// generate loops have an index variable and three
@@ -78,13 +78,19 @@ class PGenerate : public LineInfo {
// contain the generated scope.
bool generate_scope(Design*des, NetScope*container);
bool elaborate_sig(Design*des) const;
bool elaborate(Design*des) const;
// Elaborate signals within any of the generated scopes that
// were made by this generate block within the given container scope.
bool elaborate_sig(Design*des, NetScope*container) const;
bool elaborate(Design*des, NetScope*container) const;
void dump(ostream&out, unsigned indent) const;
private:
bool generate_scope_loop_(Design*des, NetScope*container);
bool generate_scope_condit_(Design*des, NetScope*container, bool else_flag);
// Elaborate_scope within a generated scope.
void elaborate_subscope_(Design*des, NetScope*scope);
// These are the scopes created by generate_scope.
list<NetScope*>scope_list_;
+6
View File
@@ -338,6 +338,12 @@ and directory strings.
Variable values come from the operating system environment, and not
from preprocessor defines elsewhere in the file or the command line.
.SH PREDEFINED MACROS
The following macro is predefined by the compiler:
.TP 8
.B __ICARUS__ = 1\fP
.SH EXAMPLES
These examples assume that you have a Verilog source file called hello.v in
+90 -282
View File
@@ -208,7 +208,7 @@ NetEBinary* PEBinary::elaborate_expr_base_(Design*des,
case '+':
case '-':
tmp = new NetEBAdd(op_, lp, rp);
tmp = new NetEBAdd(op_, lp, rp, expr_wid==-2? true : false);
if (expr_wid > 0 && (tmp->expr_type() == IVL_VT_BOOL
|| tmp->expr_type() == IVL_VT_LOGIC))
tmp->set_width(expr_wid);
@@ -368,11 +368,20 @@ NetExpr* PECallFunction::elaborate_sfunc_(Design*des, NetScope*scope) const
<< " Use $bits() instead." << endl;
PExpr*expr = parms_[0];
NetExpr*sub = expr->elaborate_expr(des, scope, -1, true);
verinum val (sub->expr_width(), 8*sizeof(unsigned));
delete sub;
ivl_assert(*this, expr);
sub = new NetEConst(val);
/* Elaborate the sub-expression to get its
self-determined width, and save that width. Then
delete the expression because we don't really want
the expression itself. */
long sub_expr_width = 0;
if (NetExpr*tmp = expr->elaborate_expr(des, scope, -1, true)) {
sub_expr_width = tmp->expr_width();
delete tmp;
}
verinum val (sub_expr_width, 8*sizeof(unsigned));
NetEConst*sub = new NetEConst(val);
sub->set_line(*this);
return sub;
@@ -549,6 +558,11 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope,
{
NetExpr* repeat = 0;
if (debug_elaborate) {
cerr << get_line() << ": debug: Elaborate expr=" << *this
<< ", expr_wid=" << expr_wid << endl;
}
/* If there is a repeat expression, then evaluate the constant
value and set the repeat count. */
if (repeat_) {
@@ -584,7 +598,7 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope,
}
assert(parms_[idx]);
NetExpr*ex = elab_and_eval(des, scope, parms_[idx], -1);
NetExpr*ex = elab_and_eval(des, scope, parms_[idx], 0, 0);
if (ex == 0) continue;
ex->set_line(*parms_[idx]);
@@ -609,6 +623,7 @@ NetExpr* PEFNumber::elaborate_expr(Design*des, NetScope*scope, int, bool) const
{
NetECReal*tmp = new NetECReal(*value_);
tmp->set_line(*this);
tmp->set_width(1U, false);
return tmp;
}
@@ -793,6 +808,10 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
if (path_.size() == 1
&& scope->genvar_tmp.str()
&& strcmp(peek_tail_name(path_), scope->genvar_tmp) == 0) {
if (debug_elaborate)
cerr << get_line() << ": debug: " << path_
<< " is genvar with value " << scope->genvar_tmp_val
<< "." << endl;
verinum val (scope->genvar_tmp_val);
NetEConst*tmp = new NetEConst(val);
tmp->set_line(*this);
@@ -823,10 +842,26 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
}
assert(tmp);
tmp->set_line(*this);
if (debug_elaborate)
cerr << get_line() << ": debug: " << path_
<< " is a specparam" << endl;
return tmp;
}
}
// At this point we've exhausted all the possibilities that
// are not scopes. If this is not a system task argument, then
// it cannot be a scope name, so give up.
if (! sys_task_arg) {
// I cannot interpret this identifier. Error message.
cerr << get_line() << ": error: Unable to bind wire/reg/memory "
"`" << path_ << "' in `" << scope_path(scope) << "'" << endl;
des->errors += 1;
return 0;
}
// Finally, if this is a scope name, then return that. Look
// first to see if this is a name of a local scope. Failing
// that, search globally for a hierarchical name.
@@ -835,16 +870,36 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
if (NetScope*nsc = scope->child(use_name)) {
NetEScope*tmp = new NetEScope(nsc);
tmp->set_line(*this);
if (debug_elaborate)
cerr << get_line() << ": debug: Found scope "
<< use_name << " in scope " << scope->basename()
<< endl;
return tmp;
}
}
list<hname_t> spath = eval_scope_path(des, scope, path_);
ivl_assert(*this, spath.size() == path_.size());
// Try full hierarchical scope name.
if (NetScope*nsc = des->find_scope(spath)) {
NetEScope*tmp = new NetEScope(nsc);
tmp->set_line(*this);
if (debug_elaborate)
cerr << get_line() << ": debug: Found scope "
<< nsc->basename()
<< " path=" << path_ << endl;
if (! sys_task_arg) {
cerr << get_line() << ": error: Scope name "
<< nsc->basename() << " not allowed here." << endl;
des->errors += 1;
}
return tmp;
}
@@ -852,6 +907,11 @@ NetExpr* PEIdent::elaborate_expr(Design*des, NetScope*scope,
if (NetScope*nsc = des->find_scope(scope, spath)) {
NetEScope*tmp = new NetEScope(nsc);
tmp->set_line(*this);
if (debug_elaborate)
cerr << get_line() << ": debug: Found scope "
<< nsc->basename() << " in " << scope_path(scope) << endl;
return tmp;
}
@@ -1142,12 +1202,23 @@ NetExpr* PEIdent::elaborate_expr_net_word_(Design*des, NetScope*scope,
delete word_index;
word_index = tmp;
}
} else if (word_index) {
// If there is a non-zero base to the memory, then build an
// expression to calculate the canonical address.
if (long base = net->array_first()) {
word_index = make_add_expr(word_index, 0-base);
if (NetExpr*tmp = word_index->eval_tree()) {
word_index = tmp;
}
}
}
NetESignal*res = new NetESignal(net, word_index);
res->set_line(*this);
// Detect that the word has a part select as well.
// Detect that the word has a bit/part select as well.
index_component_t::ctype_t word_sel = index_component_t::SEL_NONE;
if (name_tail.index.size() > 1)
@@ -1162,6 +1233,9 @@ NetExpr* PEIdent::elaborate_expr_net_word_(Design*des, NetScope*scope,
if (word_sel == index_component_t::SEL_IDX_DO)
return elaborate_expr_net_idx_do_(des, scope, res, found_in);
if (word_sel == index_component_t::SEL_BIT)
return elaborate_expr_net_bit_(des, scope, res, found_in);
ivl_assert(*this, word_sel == index_component_t::SEL_NONE);
return res;
}
@@ -1264,8 +1338,14 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
return ss;
}
if (long offset = net->lsi())
base = make_add_expr(base, 0-offset);
if (net->msi() > net->lsi()) {
if (long offset = net->lsi())
base = make_add_expr(base, 0-offset);
} else {
long vwid = net->lsi() - net->msi() + 1;
long offset = net->msi();
base = make_sub_expr(vwid-offset-wid, base);
}
NetESelect*ss = new NetESelect(net, base, wid);
ss->set_line(*this);
@@ -1279,7 +1359,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
}
/*
* Part select up, i.e. net[<m> +: <l>]
* Part select indexed down, i.e. net[<m> -: <l>]
*/
NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in)const
@@ -1685,275 +1765,3 @@ NetExpr* PEUnary::elaborate_expr(Design*des, NetScope*scope,
return tmp;
}
/*
* $Log: elab_expr.cc,v $
* Revision 1.126 2007/06/02 03:42:12 steve
* Properly evaluate scope path expressions.
*
* Revision 1.125 2007/05/24 04:07:11 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.124 2007/04/01 05:28:26 steve
* Get offsets into indexed part selects correct.
*
* Revision 1.123 2007/03/26 19:23:13 steve
* Handle part select of array words.
*
* Revision 1.122 2007/03/14 05:06:49 steve
* Replace some asserts with ivl_asserts.
*
* Revision 1.121 2007/03/07 00:38:15 steve
* Lint fixes.
*
* Revision 1.120 2007/03/06 05:22:49 steve
* Support signed function return values.
*
* Revision 1.119 2007/03/02 01:55:36 steve
* Better error message when operating on array.
*
* Revision 1.118 2007/01/19 05:42:40 steve
* Precalculate constant power expressions, and constant function arguments.
*
* Revision 1.117 2007/01/16 05:44:14 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.116 2006/11/10 04:54:26 steve
* Add test_width methods for PETernary and PEString.
*
* Revision 1.115 2006/11/04 06:19:24 steve
* Remove last bits of relax_width methods, and use test_width
* to calculate the width of an r-value expression that may
* contain unsized numbers.
*
* Revision 1.114 2006/10/30 05:44:49 steve
* Expression widths with unsized literals are pseudo-infinite width.
*
* Revision 1.113 2006/10/15 03:25:57 steve
* More detailed internal error message.
*
* Revision 1.112 2006/10/03 05:06:00 steve
* Support real valued specify delays, properly scaled.
*
* Revision 1.111 2006/09/28 04:35:18 steve
* Support selective control of specify and xtypes features.
*
* Revision 1.110 2006/09/28 00:29:49 steve
* Allow specparams as constants in expressions.
*
* Revision 1.109 2006/09/19 23:00:15 steve
* Use elab_and_eval for bit select expressions.
*
* Revision 1.108 2006/08/09 05:19:08 steve
* Add support for real valued modulus.
*
* Revision 1.107 2006/07/31 03:50:17 steve
* Add support for power in constant expressions.
*
* Revision 1.106 2006/07/07 04:06:37 steve
* Fix context determined with of constants.
*
* Revision 1.105 2006/06/02 04:48:49 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.104 2006/06/01 03:54:51 steve
* Fix broken subtraction of small constants.
*
* Revision 1.103 2006/04/12 05:05:03 steve
* Use elab_and_eval to evaluate genvar expressions.
*
* Revision 1.102 2006/02/02 02:43:57 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.101 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.100 2005/11/14 22:11:52 steve
* Fix compile warning.
*
* Revision 1.99 2005/11/10 13:28:11 steve
* Reorganize signal part select handling, and add support for
* indexed part selects.
*
* Expand expression constant propagation to eliminate extra
* sums in certain cases.
*
* Revision 1.98 2005/10/04 04:09:25 steve
* Add support for indexed select attached to parameters.
*
* Revision 1.97 2005/09/19 21:45:35 steve
* Spelling patches from Larry.
*
* Revision 1.96 2005/09/14 02:53:13 steve
* Support bool expressions and compares handle them optimally.
*
* Revision 1.95 2005/09/01 04:10:47 steve
* Check operand types for compatibility.
*
* Revision 1.94 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.93 2005/01/24 05:28:30 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.92 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.91 2004/10/04 01:10:52 steve
* Clean up spurious trailing white space.
*
* Revision 1.90 2004/08/28 15:42:11 steve
* Add support for $unsigned.
*
* Revision 1.89 2004/08/26 03:52:07 steve
* Add the $is_signed function.
*
* Revision 1.88 2004/06/17 16:06:18 steve
* Help system function signedness survive elaboration.
*
* Revision 1.87 2004/06/04 23:34:15 steve
* Special case for unary - of real literal.
*
* Revision 1.86 2004/05/31 23:34:36 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.85 2004/03/09 04:29:42 steve
* Separate out the lookup_sys_func table, for eventual
* support for function type tables.
*
* Remove ipal compile flags.
*
* Revision 1.84 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.83 2004/01/21 04:57:40 steve
* Generate error when missing concatenation operands.
*
* Revision 1.82 2003/10/09 16:52:52 steve
* Put parameter name in NetEConstParam, not scope.
*
* Revision 1.81 2003/09/19 03:30:05 steve
* Fix name search in elab_lval.
*
* Revision 1.80 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.79 2003/06/18 03:55:18 steve
* Add arithmetic shift operators.
*
* Revision 1.78 2003/06/10 04:29:57 steve
* PR735: bit select indices are signed constants.
*
* Revision 1.77 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.76 2003/04/22 04:48:29 steve
* Support event names as expressions elements.
*
* Revision 1.75 2003/04/19 04:19:38 steve
* Set line number for ternary expressions.
*
* Revision 1.74 2003/04/02 04:25:26 steve
* Fix xz extension of constants.
*
* Revision 1.73 2003/03/25 03:00:04 steve
* Scope names can be relative.
*
* Revision 1.72 2003/03/15 04:46:28 steve
* Better organize the NetESFunc return type guesses.
*
* Revision 1.71 2003/03/10 23:40:53 steve
* Keep parameter constants for the ivl_target API.
*
* Revision 1.70 2003/03/07 02:44:34 steve
* Implement $realtobits.
*
* Revision 1.69 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.68 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.67 2002/12/21 00:55:57 steve
* The $time system task returns the integer time
* scaled to the local units. Change the internal
* implementation of vpiSystemTime the $time functions
* to properly account for this. Also add $simtime
* to get the simulation time.
*
* Revision 1.66 2002/09/21 21:28:18 steve
* Allow constant bit selects out of range.
*
* Revision 1.65 2002/09/18 04:08:45 steve
* Spelling errors.
*
* Revision 1.64 2002/09/12 15:49:43 steve
* Add support for binary nand operator.
*
* Revision 1.63 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.62 2002/08/12 01:34:58 steve
* conditional ident string using autoconfig.
*
* Revision 1.61 2002/06/14 21:38:41 steve
* Fix expression width for repeat concatenations.
*
* Revision 1.60 2002/05/24 00:44:54 steve
* Add support for $bits (SystemVerilog)
*
* Revision 1.59 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.58 2002/05/05 21:11:49 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.57 2002/04/27 05:03:46 steve
* Preserve stringiness string part select and concatenation.
*
* Revision 1.56 2002/04/27 02:38:04 steve
* Support selecting bits from parameters.
*
* Revision 1.55 2002/04/25 05:04:31 steve
* Evaluate constant bit select of constants.
*
* Revision 1.54 2002/04/14 21:16:48 steve
* Evaluate logical not at elaboration time.
*
* Revision 1.53 2002/04/14 03:55:25 steve
* Precalculate unary - if possible.
*
* Revision 1.52 2002/04/13 02:33:17 steve
* Detect missing indices to memories (PR#421)
*
* Revision 1.51 2002/03/09 02:10:22 steve
* Add the NetUserFunc netlist node.
*
* Revision 1.50 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.49 2002/01/11 05:25:45 steve
* The stime system function is 32bits.
*/
+150 -40
View File
@@ -1709,10 +1709,74 @@ NetNet* PEIdent::elaborate_net(Design*des, NetScope*scope,
drive0, drive1);
}
return elaborate_net_net_(des, scope, sig, lwidth,
rise, fall, decay, drive0, drive1);
}
NetNet* PEIdent::process_select_(Design*des, NetScope*scope,
NetNet*sig) const
{
// If there are more index items then there are array
// dimensions, then treat them as word part selects. For
// example, if this is a memory array, then array dimensions
// is the first and part select the remainder.
unsigned midx, lidx;
if (! eval_part_select_(des, scope, sig, midx, lidx))
return sig;
unsigned part_count = midx-lidx+1;
// Maybe this is a full-width constant part select? If
// so, do nothing.
if (part_count == sig->vector_width())
return sig;
if (debug_elaborate) {
cerr << get_line() << ": debug: Elaborate part select"
<< " of word from " << sig->name() << "[base="<<lidx
<< " wid=" << part_count << "]" << endl;
}
NetPartSelect*ps = new NetPartSelect(sig, lidx, part_count,
NetPartSelect::VP);
ps->set_line(*sig);
des->add_node(ps);
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, part_count-1, 0);
tmp->data_type( sig->data_type() );
tmp->local_flag(true);
connect(tmp->pin(0), ps->pin(0));
return tmp;
}
NetNet* PEIdent::elaborate_net_net_(Design*des, NetScope*scope,
NetNet*sig, unsigned lwidth,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const
{
const name_component_t&name_tail = path_.back();
index_component_t::ctype_t use_sel = index_component_t::SEL_NONE;
if (!name_tail.index.empty())
use_sel = name_tail.index.back().sel;
switch (use_sel) {
case index_component_t::SEL_IDX_UP:
case index_component_t::SEL_IDX_DO:
return elaborate_net_net_idx_up_(des, scope, sig, lwidth,
rise, fall, decay, drive0, drive1);
default:
break;
}
/* Catch the case of a non-constant bit select. That should be
handled elsewhere. */
if (use_sel == index_component_t::SEL_BIT) {
@@ -1755,45 +1819,87 @@ NetNet* PEIdent::elaborate_net(Design*des, NetScope*scope,
}
return sig;
}
NetNet* PEIdent::process_select_(Design*des, NetScope*scope,
NetNet*sig) const
NetNet* PEIdent::elaborate_net_net_idx_up_(Design*des, NetScope*scope,
NetNet*sig, unsigned lwidth,
const NetExpr* rise,
const NetExpr* fall,
const NetExpr* decay,
Link::strength_t drive0,
Link::strength_t drive1) const
{
const name_component_t&name_tail = path_.back();
ivl_assert(*this, !name_tail.index.empty());
// If there are more index items then there are array
// dimensions, then treat them as word part selects. For
// example, if this is a memory array, then array dimensions
// is 1 and
unsigned midx, lidx;
if (! eval_part_select_(des, scope, sig, midx, lidx))
return sig;
const index_component_t&index_tail = name_tail.index.back();
ivl_assert(*this, index_tail.lsb != 0);
ivl_assert(*this, index_tail.msb != 0);
unsigned part_count = midx-lidx+1;
NetExpr*base = elab_and_eval(des, scope, index_tail.msb, -1);
// Maybe this is a full-width constant part select? If
// so, do nothing.
if (part_count == sig->vector_width())
return sig;
unsigned long wid = 0;
calculate_up_do_width_(des, scope, wid);
if (debug_elaborate) {
cerr << get_line() << ": debug: Elaborate part select"
<< " of word from " << sig->name() << "[base="<<lidx
<< " wid=" << part_count << "]" << endl;
bool down_flag = name_tail.index.back().sel==index_component_t::SEL_IDX_DO;
// Handle the special case that the base is constant as
// well. In this case it can be converted to a conventional
// part select.
if (NetEConst*base_c = dynamic_cast<NetEConst*> (base)) {
long lsv = base_c->value().as_long();
// convert from -: to +: form.
if (down_flag) lsv -= (wid-1);
// If the part select convers exactly the entire
// vector, then do not bother with it. Return the
// signal itself.
if (sig->sb_to_idx(lsv) == 0 && wid == sig->vector_width())
return sig;
NetPartSelect*sel = new NetPartSelect(sig, sig->sb_to_idx(lsv),
wid, NetPartSelect::VP);
sel->set_line(*this);
des->add_node(sel);
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, wid);
tmp->set_line(*this);
tmp->data_type(sig->data_type());
connect(tmp->pin(0), sel->pin(0));
delete base;
return tmp;
}
NetPartSelect*ps = new NetPartSelect(sig, lidx, part_count,
NetPartSelect::VP);
ps->set_line(*sig);
des->add_node(ps);
if (sig->msb() > sig->lsb()) {
long offset = sig->lsb();
if (down_flag)
offset += (wid-1);
if (offset != 0)
base = make_add_expr(base, 0-offset);
} else {
long vwid = sig->lsb() - sig->msb() + 1;
long offset = sig->msb();
if (down_flag)
offset += (wid-1);
base = make_sub_expr(vwid-offset-wid, base);
}
NetPartSelect*sel = new NetPartSelect(sig, base->synthesize(des), wid);
sel->set_line(*this);
des->add_node(sel);
NetNet*tmp = new NetNet(scope, scope->local_symbol(),
NetNet::WIRE, part_count-1, 0);
tmp->data_type( sig->data_type() );
tmp->local_flag(true);
connect(tmp->pin(0), ps->pin(0));
NetNet::WIRE, wid);
tmp->set_line(*this);
tmp->data_type(sig->data_type());
connect(tmp->pin(0), sel->pin(0));
delete base;
return tmp;
}
@@ -2136,18 +2242,17 @@ bool PEIdent::eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
case index_component_t::SEL_IDX_UP: {
NetExpr*tmp_ex = elab_and_eval(des, scope, index_tail.msb, -1);
NetEConst*tmp = dynamic_cast<NetEConst*>(tmp_ex);
assert(tmp);
ivl_assert(*this, tmp);
long midx_val = tmp->value().as_long();
midx = sig->sb_to_idx(midx_val);
delete tmp_ex;
tmp_ex = elab_and_eval(des, scope, index_tail.lsb, -1);
tmp = dynamic_cast<NetEConst*>(tmp_ex);
assert(tmp);
long wid = tmp->value().as_long();
delete tmp_ex;
/* The width (a constant) is calculated here. */
unsigned long wid = 0;
bool flag = calculate_up_do_width_(des, scope, wid);
if (! flag)
return false;
if (index_tail.sel == index_component_t::SEL_IDX_UP)
lidx = sig->sb_to_idx(midx_val+wid-1);
@@ -2165,6 +2270,9 @@ bool PEIdent::eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
case index_component_t::SEL_PART: {
long msb, lsb;
bool flag = calculate_parts_(des, scope, msb, lsb);
#if 0
NetExpr*tmp_ex = elab_and_eval(des, scope, index_tail.msb, -1);
NetEConst*tmp = dynamic_cast<NetEConst*>(tmp_ex);
assert(tmp);
@@ -2185,15 +2293,17 @@ bool PEIdent::eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
long lidx_val = tmp->value().as_long();
lidx = sig->sb_to_idx(lidx_val);
delete tmp_ex;
#endif
lidx = sig->sb_to_idx(lsb);
midx = sig->sb_to_idx(msb);
/* Detect reversed indices of a part select. */
if (lidx > midx) {
cerr << get_line() << ": error: Part select "
<< sig->name() << "[" << midx_val << ":"
<< lidx_val << "] indices reversed." << endl;
<< sig->name() << "[" << msb << ":"
<< lsb << "] indices reversed." << endl;
cerr << get_line() << ": : Did you mean "
<< sig->name() << "[" << lidx_val << ":"
<< midx_val << "]?" << endl;
<< sig->name() << "[" << lsb << ":"
<< msb << "]?" << endl;
unsigned tmp = midx;
midx = lidx;
lidx = tmp;
@@ -2203,8 +2313,8 @@ bool PEIdent::eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
/* Detect a part select out of range. */
if (midx >= sig->vector_width()) {
cerr << get_line() << ": error: Part select "
<< sig->name() << "[" << midx_val << ":"
<< midx_val << "] out of range." << endl;
<< sig->name() << "[" << msb << ":"
<< lsb << "] out of range." << endl;
midx = sig->vector_width() - 1;
lidx = 0;
des->errors += 1;
+16 -113
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
* Copyright (c) 2000-2007 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -28,6 +28,7 @@
# include "netmisc.h"
# include <iostream>
# include "ivl_assert.h"
NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*sc) const
{
@@ -54,7 +55,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
return 0;
}
NetEBinary*tmp = elaborate_expr_base_(des, lp, rp, -1);
NetEBinary*tmp = elaborate_expr_base_(des, lp, rp, -2);
return tmp;
}
@@ -143,7 +144,19 @@ NetExpr*PEIdent::elaborate_pexpr(Design*des, NetScope*scope) const
const NetExpr*ex_msb;
const NetExpr*ex_lsb;
const NetExpr*ex = pscope->get_parameter(name_tail.name, ex_msb, ex_lsb);
const NetExpr*ex = 0;
// Look up the parameter name in the current scope. If the
// name is not found in the pscope, look in containing scopes,
// but do not go outside the containing module instance.
for (;;) {
ex = pscope->get_parameter(name_tail.name, ex_msb, ex_lsb);
if (ex != 0)
break;
if (pscope->type() == NetScope::MODULE)
break;
pscope = pscope->parent();
ivl_assert(*this, pscope);
}
if (ex == 0) {
cerr << get_line() << ": error: identifier ``" << name_tail.name <<
"'' is not a parameter in "<< scope_path(scope)<< "." << endl;
@@ -241,113 +254,3 @@ NetExpr*PEUnary::elaborate_pexpr (Design*des, NetScope*scope) const
return tmp;
}
/*
* $Log: elab_pexpr.cc,v $
* Revision 1.28 2007/06/02 03:42:12 steve
* Properly evaluate scope path expressions.
*
* Revision 1.27 2007/05/24 04:07:11 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.26 2007/04/26 03:06:22 steve
* Rework hname_t to use perm_strings.
*
* Revision 1.25 2006/11/04 06:19:25 steve
* Remove last bits of relax_width methods, and use test_width
* to calculate the width of an r-value expression that may
* contain unsized numbers.
*
* Revision 1.24 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.23 2006/02/02 02:43:58 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.22 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.21 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.20 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.19 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.18 2002/12/05 02:14:33 steve
* Support bit select in constant expressions.
*
* Revision 1.17 2002/11/09 01:40:19 steve
* Postpone parameter width check to evaluation.
*
* Revision 1.16 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/05/06 02:30:27 steve
* Allow parameters in concatenation of widths are defined.
*
* Revision 1.14 2002/05/05 21:11:50 steve
* Put off evaluation of concatenation repeat expresions
* until after parameters are defined. This allows parms
* to be used in repeat expresions.
*
* Add the builtin $signed system function.
*
* Revision 1.13 2002/01/28 00:52:41 steve
* Add support for bit select of parameters.
* This leads to a NetESelect node and the
* vvp code generator to support that.
*
* Revision 1.12 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.11 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.10 2001/10/07 03:38:08 steve
* parameter names do not have defined size.
*
* Revision 1.9 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.8 2001/01/14 23:04:56 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
*
* Allow parameters to be referenced by hierarchical name.
*
* Revision 1.7 2001/01/02 04:21:13 steve
* Support a bunch of unary operators in parameter expressions.
*
* Revision 1.6 2000/12/16 19:03:30 steve
* Evaluate <= and ?: in parameter expressions (PR#81)
*
* Revision 1.5 2000/06/13 05:22:16 steve
* Support concatenation in parameter expressions.
*
* Revision 1.4 2000/06/01 02:31:39 steve
* Parameters can be strings.
*
* Revision 1.3 2000/03/12 18:22:11 steve
* Binary and unary operators in parameter expressions.
*
* Revision 1.2 2000/03/12 04:35:22 steve
* Allow parameter identifiers in parameter expressions.
*
* Revision 1.1 2000/03/08 04:36:53 steve
* Redesign the implementation of scopes and parameters.
* I now generate the scopes and notice the parameters
* in a separate pass over the pform. Once the scopes
* are generated, I can process overrides and evalutate
* paremeters before elaboration begins.
*
*/
+65 -128
View File
@@ -146,6 +146,12 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
; cur != replacements.end() ; cur ++) {
NetExpr*val = (*cur).second;
if (val == 0) {
cerr << get_line() << ": internal error: "
<< "Missing expression in parameter replacement for "
<< (*cur).first;
}
assert(val);
if (debug_scopes) {
cerr << get_line() << ": debug: "
<< "Replace " << (*cur).first
@@ -309,6 +315,12 @@ bool PGenerate::generate_scope(Design*des, NetScope*container)
case GS_LOOP:
return generate_scope_loop_(des, container);
case GS_CONDIT:
return generate_scope_condit_(des, container, false);
case GS_ELSE:
return generate_scope_condit_(des, container, true);
default:
cerr << get_line() << ": sorry: Generate of this sort"
<< " is not supported yet!" << endl;
@@ -379,15 +391,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
<< loop_index << " = " << genvar_verinum << endl;
}
// Scan the generated scope for gates that may create
// their own scopes.
typedef list<PGate*>::const_iterator pgate_list_it_t;
for (pgate_list_it_t cur = gates.begin()
; cur != gates.end() ; cur ++) {
(*cur) ->elaborate_scope(des, scope);
}
scope_list_.push_back(scope);
elaborate_subscope_(des, scope);
// Calculate the step for the loop variable.
NetExpr*step_ex = elab_and_eval(des, container, loop_step, -1);
@@ -413,6 +417,54 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
return true;
}
bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else_flag)
{
NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
NetEConst*test = dynamic_cast<NetEConst*> (test_ex);
assert(test);
// If the condition evaluates as false, then do not create the
// scope.
if (test->value().as_long() == 0 && !else_flag
|| test->value().as_long() != 0 && else_flag) {
if (debug_elaborate)
cerr << get_line() << ": debug: Generate condition "
<< (else_flag? "(else)" : "(if)")
<< " value=" << test->value() << ": skip generation"
<< endl;
delete test_ex;
return true;
}
hname_t use_name (scope_name);
if (debug_elaborate)
cerr << get_line() << ": debug: Generate condition "
<< (else_flag? "(else)" : "(if)")
<< " value=" << test->value() << ": Generate scope="
<< use_name << endl;
NetScope*scope = new NetScope(container, use_name,
NetScope::GENBLOCK);
elaborate_subscope_(des, scope);
return true;
}
void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
{
// Scan the generated scope for gates that may create
// their own scopes.
typedef list<PGate*>::const_iterator pgate_list_it_t;
for (pgate_list_it_t cur = gates.begin()
; cur != gates.end() ; cur ++) {
(*cur) ->elaborate_scope(des, scope);
}
// Save the scope that we created, for future use.
scope_list_.push_back(scope);
}
void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
{
if (get_name() == "") {
@@ -578,6 +630,10 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
; cur != replace.end() ; cur ++ ) {
PExpr*tmp = (*cur).second;
// No expression means that the parameter is not
// replaced at all.
if (tmp == 0)
continue;
NetExpr*val = tmp->elaborate_pexpr(des, sc);
replace_net[(*cur).first] = val;
}
@@ -752,122 +808,3 @@ void PWhile::elaborate_scope(Design*des, NetScope*scope) const
if (statement_)
statement_ -> elaborate_scope(des, scope);
}
/*
* $Log: elab_scope.cc,v $
* Revision 1.46 2007/06/02 03:42:12 steve
* Properly evaluate scope path expressions.
*
* Revision 1.45 2007/05/24 04:07:11 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.44 2007/03/22 16:08:15 steve
* Spelling fixes from Larry
*
* Revision 1.43 2007/03/08 06:11:35 steve
* Elaborate scopes of modules instantated in generate loops.
*
* Revision 1.42 2007/03/05 05:59:10 steve
* Handle processes within generate loops.
*
* Revision 1.41 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.40 2006/04/12 05:05:03 steve
* Use elab_and_eval to evaluate genvar expressions.
*
* Revision 1.39 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.38 2006/03/30 01:49:07 steve
* Fix instance arrays indexed by overridden parameters.
*
* Revision 1.37 2006/03/18 22:53:38 steve
* Support more parameter syntax.
*
* Revision 1.36 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.35 2004/09/10 00:15:17 steve
* Missing stdio.h header for warnings.
*
* Revision 1.34 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.33 2004/08/26 04:02:03 steve
* Add support for localparam ranges.
*
* Revision 1.32 2004/06/13 04:56:54 steve
* Add support for the default_nettype directive.
*
* Revision 1.31 2004/05/25 19:21:06 steve
* More identifier lists use perm_strings.
*
* Revision 1.30 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.29 2004/02/19 07:06:57 steve
* LPM, logic and Variables have perm_string names.
*
* Revision 1.28 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.27 2003/09/13 01:01:51 steve
* Spelling fixes.
*
* Revision 1.26 2003/08/28 04:11:17 steve
* Spelling patch.
*
* Revision 1.25 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.24 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
*
* Revision 1.23 2003/06/16 00:34:08 steve
* Functions can have sub-scope.
*
* Revision 1.22 2003/06/13 19:10:46 steve
* Properly manage real variables in subscopes.
*
* Revision 1.21 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.20 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.19 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.18 2003/01/26 21:15:58 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.17 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.16 2002/09/01 03:01:48 steve
* Properly cast signedness of parameters with ranges.
*
* Revision 1.15 2002/08/19 02:39:16 steve
* Support parameters with defined ranges.
*
* Revision 1.14 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.13 2001/12/30 04:47:57 steve
* Properly handle empty target in positionla parameter override.
*
* Revision 1.12 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*/
+12 -158
View File
@@ -186,7 +186,7 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
(*cur) -> elaborate_sig(des);
(*cur) -> elaborate_sig(des, scope);
}
// Get all the gates of the module and elaborate them by
@@ -269,7 +269,7 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
return flag;
}
bool PGenerate::elaborate_sig(Design*des) const
bool PGenerate::elaborate_sig(Design*des, NetScope*container) const
{
bool flag = true;
@@ -277,9 +277,15 @@ bool PGenerate::elaborate_sig(Design*des) const
for (scope_list_it_t cur = scope_list_.begin()
; cur != scope_list_.end() ; cur ++ ) {
NetScope*scope = *cur;
if (scope->parent() != container)
continue;
if (debug_elaborate)
cerr << get_line() << ": debug: Elaborate nets in "
<< "scope " << scope_path(*cur) << endl;
<< "scope " << scope_path(*cur)
<< " in generate " << id_number << endl;
flag = elaborate_sig_(des, *cur) & flag;
}
@@ -578,11 +584,9 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
continue;
}
NetEConst*tmp;
NetExpr*texpr = elab_and_eval(des, scope, msb_[idx], -1);
tmp = dynamic_cast<NetEConst*>(texpr);
if (tmp == 0) {
if (! eval_as_long(mnum[idx], texpr)) {
cerr << msb_[idx]->get_line() << ": error: "
"Unable to evaluate constant expression ``" <<
*msb_[idx] << "''." << endl;
@@ -590,12 +594,11 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
return 0;
}
mnum[idx] = tmp->value().as_long();
delete texpr;
texpr = elab_and_eval(des, scope, lsb_[idx], -1);
tmp = dynamic_cast<NetEConst*>(texpr);
if (tmp == 0) {
if (! eval_as_long(lnum[idx], texpr) ) {
cerr << msb_[idx]->get_line() << ": error: "
"Unable to evaluate constant expression ``" <<
*lsb_[idx] << "''." << endl;
@@ -603,9 +606,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
return 0;
}
lnum[idx] = tmp->value().as_long();
delete texpr;
}
/* Check that the declarations were all scalar or all
@@ -763,150 +764,3 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
return sig;
}
/*
* $Log: elab_sig.cc,v $
* Revision 1.52 2007/06/02 03:42:12 steve
* Properly evaluate scope path expressions.
*
* Revision 1.51 2007/05/24 04:07:11 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.50 2007/04/26 03:06:22 steve
* Rework hname_t to use perm_strings.
*
* Revision 1.49 2007/04/02 01:12:34 steve
* Seperate arrayness from word count
*
* Revision 1.48 2007/03/08 06:11:35 steve
* Elaborate scopes of modules instantated in generate loops.
*
* Revision 1.47 2007/03/07 04:24:59 steve
* Make integer width controllable.
*
* Revision 1.46 2007/03/06 05:22:49 steve
* Support signed function return values.
*
* Revision 1.45 2007/02/01 05:24:08 steve
* Include type in signal create message.
*
* Revision 1.44 2007/01/29 02:07:34 steve
* Types of task/function arguments set in multiple steps.
*
* Revision 1.43 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.42 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.41 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.40 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.39 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.38 2005/02/13 01:15:07 steve
* Replace supply nets with wires connected to pullup/down supply devices.
*
* Revision 1.37 2004/12/11 02:31:25 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.36 2004/09/27 22:34:10 steve
* Cleanup and factoring of autoconf.
*
* Revision 1.35 2004/09/05 17:44:41 steve
* Add support for module instance arrays.
*
* Revision 1.34 2004/05/31 23:34:37 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.33 2004/02/18 17:11:55 steve
* Use perm_strings for named langiage items.
*
* Revision 1.32 2003/09/20 05:24:00 steve
* Evaluate memory index constants using elab_and_eval.
*
* Revision 1.31 2003/07/15 03:49:22 steve
* Spelling fixes.
*
* Revision 1.30 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.29 2003/06/21 01:21:43 steve
* Harmless fixup of warnings.
*
* Revision 1.28 2003/03/06 00:28:41 steve
* All NetObj objects have lex_string base names.
*
* Revision 1.27 2003/01/30 16:23:07 steve
* Spelling fixes.
*
* Revision 1.26 2003/01/27 05:09:17 steve
* Spelling fixes.
*
* Revision 1.25 2002/08/12 01:34:59 steve
* conditional ident string using autoconfig.
*
* Revision 1.24 2002/08/05 04:18:45 steve
* Store only the base name of memories.
*
* Revision 1.23 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.22 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.21 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.20 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.19 2002/01/23 03:35:17 steve
* Detect incorrect function ports.
*
* Revision 1.18 2001/12/03 04:47:14 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.17 2001/11/07 04:01:59 steve
* eval_const uses scope instead of a string path.
*
* Revision 1.16 2001/11/01 05:21:26 steve
* Catch ports that have no direction.
*
* Revision 1.15 2001/10/31 03:11:15 steve
* detect module ports not declared within the module.
*
* Revision 1.14 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.13 2001/05/25 02:21:34 steve
* Detect input and input ports declared as reg.
*
* Revision 1.12 2001/02/17 05:15:33 steve
* Allow task ports to be given real types.
*
* Revision 1.11 2001/02/10 20:29:39 steve
* In the context of range declarations, use elab_and_eval instead
* of the less robust eval_const methods.
*/
+14 -4
View File
@@ -1754,6 +1754,10 @@ NetProc* PCondit::elaborate(Design*des, NetScope*scope) const
{
assert(scope);
if (debug_elaborate)
cerr << get_line() << ": debug: Elaborate condition statement"
<< " with conditional: " << *expr_ << endl;
// Elaborate and try to evaluate the conditional expression.
NetExpr*expr = elab_and_eval(des, scope, expr_, -1);
if (expr == 0) {
@@ -3227,7 +3231,7 @@ bool Module::elaborate(Design*des, NetScope*scope) const
typedef list<PGenerate*>::const_iterator generate_it_t;
for (generate_it_t cur = generate_schemes.begin()
; cur != generate_schemes.end() ; cur ++ ) {
(*cur)->elaborate(des);
(*cur)->elaborate(des, scope);
}
// Elaborate functions.
@@ -3288,7 +3292,7 @@ bool Module::elaborate(Design*des, NetScope*scope) const
return result_flag;
}
bool PGenerate::elaborate(Design*des) const
bool PGenerate::elaborate(Design*des, NetScope*container) const
{
bool flag = true;
@@ -3296,11 +3300,17 @@ bool PGenerate::elaborate(Design*des) const
for (scope_list_it_t cur = scope_list_.begin()
; cur != scope_list_.end() ; cur ++ ) {
NetScope*scope = *cur;
// Check that this scope is one that is contained in the
// container that the caller passed in.
if (scope->parent() != container)
continue;
if (debug_elaborate)
cerr << get_line() << ": debug: Elaborate in "
<< "scope " << scope_path(*cur) << endl;
<< "scope " << scope_path(scope) << endl;
flag = elaborate_(des, *cur) & flag;
flag = elaborate_(des, scope) & flag;
}
return flag;
+21 -99
View File
@@ -128,6 +128,21 @@ NetExpr* NetEBAdd::eval_tree(int prune_to_width)
return 0;
}
/* Result might have known width. */
if (has_width()) {
if (debug_eval_tree) {
cerr << get_line() << ": debug: Evaluate expr=" << *this
<< " --- prune=" << prune_to_width << endl;
}
unsigned lwid = lc->expr_width();
unsigned rwid = rc->expr_width();
unsigned wid = (rwid > lwid) ? rwid : lwid;
if (prune_to_width < 0)
wid += 1;
verinum val2=verinum(val,wid);
val=val2;
}
return new NetEConst(val);
}
@@ -1104,6 +1119,11 @@ NetEConst* NetEConcat::eval_tree(int prune_to_width)
unsigned repeat_val = repeat();
unsigned local_errors = 0;
if (debug_eval_tree) {
cerr << get_line() << ": debug: Evaluate expr=" << *this
<< ", prune_to_width=" << prune_to_width << endl;
}
unsigned gap = 0;
for (unsigned idx = 0 ; idx < parms_.count() ; idx += 1) {
@@ -1124,7 +1144,7 @@ NetEConst* NetEConcat::eval_tree(int prune_to_width)
// that is here. If I succeed, reset the parameter to
// the evaluated value.
assert(parms_[idx]);
NetExpr*expr = parms_[idx]->eval_tree();
NetExpr*expr = parms_[idx]->eval_tree(0);
if (expr) {
delete parms_[idx];
parms_[idx] = expr;
@@ -1652,101 +1672,3 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width)
return new NetEConst(verinum(res, 1));
}
/*
* $Log: eval_tree.cc,v $
* Revision 1.77 2007/06/02 03:42:12 steve
* Properly evaluate scope path expressions.
*
* Revision 1.76 2007/05/31 18:36:06 steve
* Fix warning (ldolittle)
*
* Revision 1.75 2007/04/07 04:46:18 steve
* Handle evaluate of addition of real valued constants.
*
* Revision 1.74 2007/03/08 05:30:02 steve
* Limit the calculated widths of constants.
*
* Revision 1.73 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.72 2006/11/04 06:16:27 steve
* Fix padding of constant eval of NetESelect.
*
* Revision 1.71 2006/10/30 05:44:49 steve
* Expression widths with unsized literals are pseudo-infinite width.
*
* Revision 1.70 2006/09/19 23:00:15 steve
* Use elab_and_eval for bit select expressions.
*
* Revision 1.69 2006/07/31 03:50:17 steve
* Add support for power in constant expressions.
*
* Revision 1.68 2006/03/18 22:52:27 steve
* Properly handle signedness in compare.
*
* Revision 1.67 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.66 2005/11/10 13:28:12 steve
* Reorganize signal part select handling, and add support for
* indexed part selects.
*
* Expand expression constant propagation to eliminate extra
* sums in certain cases.
*
* Revision 1.65 2005/09/14 02:53:14 steve
* Support bool expressions and compares handle them optimally.
*
* Revision 1.64 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.63 2005/06/17 05:05:53 steve
* Watch out for signed constants in magnitude compare.
*
* Revision 1.62 2004/10/04 01:10:53 steve
* Clean up spurious trailing white space.
*
* Revision 1.61 2004/09/10 23:51:42 steve
* Fix the evaluation of constant ternary expressions.
*
* Revision 1.60 2004/02/20 06:22:56 steve
* parameter keys are per_strings.
*
* Revision 1.59 2003/10/31 02:47:11 steve
* NetEUReduce has its own dup_expr method.
*
* Revision 1.58 2003/10/26 04:54:56 steve
* Support constant evaluation of binary ^ operator.
*
* Revision 1.57 2003/09/04 01:52:50 steve
* Evaluate real parameter expressions that contain real parameters.
*
* Revision 1.56 2003/08/01 02:12:30 steve
* Fix || with true case on the right.
*
* Revision 1.55 2003/06/24 01:38:02 steve
* Various warnings fixed.
*
* Revision 1.54 2003/06/05 04:28:24 steve
* Evaluate <= with real operands.
*
* Revision 1.53 2003/06/04 01:26:17 steve
* internal error for <= expression errors.
*
* Revision 1.52 2003/05/30 02:55:32 steve
* Support parameters in real expressions and
* as real expressions, and fix multiply and
* divide with real results.
*
* Revision 1.51 2003/04/15 05:06:56 steve
* Handle real constants evaluation > and >=.
*
* Revision 1.50 2003/04/14 03:40:21 steve
* Make some effort to preserve bits while
* operating on constant values.
*/
+2 -2
View File
@@ -29,13 +29,13 @@
*/
int tf_dofinish(void)
{
vpi_sim_control(vpiFinish, 0);
vpi_control(vpiFinish, 0);
return 0;
}
int tf_dostop(void)
{
vpi_sim_control(vpiStop, 0);
vpi_control(vpiStop, 0);
return 0;
}
+5 -3
View File
@@ -37,7 +37,7 @@ ivl_variable_type_t NetExpr::expr_type() const
* Create an add/sub node from the two operands. Make a best guess of
* the
*/
NetEBAdd::NetEBAdd(char op, NetExpr*l, NetExpr*r)
NetEBAdd::NetEBAdd(char op, NetExpr*l, NetExpr*r, bool lossless_flag)
: NetEBinary(op, l, r)
{
NetEConst* tmp;
@@ -75,14 +75,16 @@ NetEBAdd::NetEBAdd(char op, NetExpr*l, NetExpr*r)
}
unsigned pad_width = lossless_flag? 1 : 0;
/* Now that we have the operand sizes the way we like, or as
good as we are going to get them, set the size of myself. */
if (r->expr_width() > l->expr_width()) {
expr_width(r->expr_width());
expr_width(r->expr_width() + pad_width);
} else {
expr_width(l->expr_width());
expr_width(l->expr_width() + pad_width);
}
cast_signed(l->has_sign() && r->has_sign());
+5
View File
@@ -2188,6 +2188,11 @@ ivl_variable_type_t NetETernary::expr_type() const
if (tru == IVL_VT_BOOL && fal == IVL_VT_LOGIC)
return IVL_VT_LOGIC;
if (tru != fal) {
cerr << get_line() << ": internal error:"
<< " Unexpected ?: type clash:"
<< " tru=" << tru << ", fal=" << fal << endl;
}
ivl_assert(*this, tru == fal);
return tru;
}
+6 -255
View File
@@ -1122,7 +1122,11 @@ class NetExpr : public LineInfo {
// constants.
//
// The prune_to_width is the maximum width that the result
// should be. If it is -1, then do not prune the result.
// should be. If it is 0 or -1, then do not prune the
// result. If it is -1, go through special efforts to preserve
// values that may expand. A width of 0 corresponds to a
// self-determined context, and a width of -1 corresponds to
// an infinitely wide context.
virtual NetExpr*eval_tree(int prune_to_width = -1);
// Make a duplicate of myself, and subexpressions if I have
@@ -2636,7 +2640,7 @@ class NetEBinary : public NetExpr {
class NetEBAdd : public NetEBinary {
public:
NetEBAdd(char op, NetExpr*l, NetExpr*r);
NetEBAdd(char op, NetExpr*l, NetExpr*r, bool lossless_flag =false);
~NetEBAdd();
virtual ivl_variable_type_t expr_type() const;
@@ -3505,257 +3509,4 @@ inline __ScopePathManip scope_path(const NetScope*scope)
extern ostream& operator << (ostream&o, __ScopePathManip);
/*
* $Log: netlist.h,v $
* Revision 1.380 2007/06/02 03:42:13 steve
* Properly evaluate scope path expressions.
*
* Revision 1.379 2007/05/24 04:07:12 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.378 2007/04/26 03:06:22 steve
* Rework hname_t to use perm_strings.
*
* Revision 1.377 2007/04/17 04:34:23 steve
* Fix handling calls to tasks in combinational always block
*
* Revision 1.376 2007/04/07 04:46:18 steve
* Handle evaluate of addition of real valued constants.
*
* Revision 1.375 2007/04/02 01:12:34 steve
* Seperate arrayness from word count
*
* Revision 1.374 2007/03/26 18:17:50 steve
* Remove pretense of general use for t_cookie.
*
* Revision 1.373 2007/03/22 16:08:16 steve
* Spelling fixes from Larry
*
* Revision 1.372 2007/03/08 05:30:03 steve
* Limit the calculated widths of constants.
*
* Revision 1.371 2007/03/02 06:13:22 steve
* Add support for edge sensitive spec paths.
*
* Revision 1.370 2007/03/01 06:19:38 steve
* Add support for conditional specify delay paths.
*
* Revision 1.369 2007/02/20 05:58:36 steve
* Handle unary minus of real valued expressions.
*
* Revision 1.368 2007/02/14 05:59:46 steve
* Handle type of ternary expressions properly.
*
* Revision 1.367 2007/02/02 04:33:00 steve
* Use inttypes.h instead of stdint.h for portability.
*
* Revision 1.366 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.365 2006/11/04 06:19:25 steve
* Remove last bits of relax_width methods, and use test_width
* to calculate the width of an r-value expression that may
* contain unsized numbers.
*
* Revision 1.364 2006/10/30 05:44:49 steve
* Expression widths with unsized literals are pseudo-infinite width.
*
* Revision 1.363 2006/10/03 05:06:00 steve
* Support real valued specify delays, properly scaled.
*
* Revision 1.362 2006/09/26 19:48:40 steve
* Missing PSpec.cc file.
*
* Revision 1.361 2006/09/23 04:57:19 steve
* Basic support for specify timing.
*
* Revision 1.360 2006/08/08 05:11:37 steve
* Handle 64bit delay constants.
*
* Revision 1.359 2006/07/31 03:50:17 steve
* Add support for power in constant expressions.
*
* Revision 1.358 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.357 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.356 2006/03/18 22:53:04 steve
* Properly handle signedness in compare.
*
* Revision 1.355 2006/02/02 02:43:58 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.354 2006/01/02 05:33:19 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.353 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.352 2005/11/26 00:35:43 steve
* More precise about r-value width of constants.
*
* Revision 1.351 2005/09/19 21:45:36 steve
* Spelling patches from Larry.
*
* Revision 1.350 2005/09/14 02:53:14 steve
* Support bool expressions and compares handle them optimally.
*
* Revision 1.349 2005/09/01 04:11:37 steve
* Generate code to handle real valued muxes.
*
* Revision 1.348 2005/08/31 05:07:31 steve
* Handle memory references is continuous assignments.
*
* Revision 1.347 2005/07/14 23:34:19 steve
* gcc4 compile errors.
*
* Revision 1.346 2005/07/11 16:56:50 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.345 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.344 2005/05/24 01:44:28 steve
* Do sign extension of structuran nets.
*
* Revision 1.343 2005/05/17 20:56:55 steve
* Parameters cannot have their width changed.
*
* Revision 1.342 2005/05/08 23:44:08 steve
* Add support for variable part select.
*
* Revision 1.341 2005/04/24 23:44:02 steve
* Update DFF support to new data flow.
*
* Revision 1.340 2005/04/08 04:51:16 steve
* All memory addresses are signed.
*
* Revision 1.339 2005/04/06 05:29:08 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.338 2005/03/18 02:56:03 steve
* Add support for LPM_UFUNC user defined functions.
*
* Revision 1.337 2005/03/12 06:43:36 steve
* Update support for LPM_MOD.
*
* Revision 1.336 2005/03/09 05:52:04 steve
* Handle case inequality in netlists.
*
* Revision 1.335 2005/02/19 02:43:38 steve
* Support shifts and divide.
*
* Revision 1.334 2005/02/12 06:25:40 steve
* Restructure NetMux devices to pass vectors.
* Generate NetMux devices from ternary expressions,
* Reduce NetMux devices to bufif when appropriate.
*
* Revision 1.333 2005/02/08 00:12:36 steve
* Add the NetRepeat node, and code generator support.
*
* Revision 1.332 2005/02/03 04:56:20 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.331 2005/01/30 01:43:48 steve
* Clarify width argument to NetNet constructor.
*
* Revision 1.330 2005/01/28 05:39:33 steve
* Simplified NetMult and IVL_LPM_MULT.
*
* Revision 1.329 2005/01/24 05:28:31 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.328 2005/01/22 18:16:01 steve
* Remove obsolete NetSubnet class.
*
* Revision 1.327 2005/01/22 01:06:55 steve
* Change case compare from logic to an LPM node.
*
* Revision 1.326 2005/01/16 04:20:32 steve
* Implement LPM_COMPARE nodes as two-input vector functors.
*
* Revision 1.325 2005/01/12 03:17:37 steve
* Properly pad vector widths in pgassign.
*
* Revision 1.324 2005/01/09 20:16:01 steve
* Use PartSelect/PV and VP to handle part selects through ports.
*
* Revision 1.323 2004/12/29 23:55:43 steve
* Unify elaboration of l-values for all proceedural assignments,
* including assing, cassign and force.
*
* Generate NetConcat devices for gate outputs that feed into a
* vector results. Use this to hande gate arrays. Also let gate
* arrays handle vectors of gates when the outputs allow for it.
*
* Revision 1.322 2004/12/11 02:31:27 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.321 2004/10/04 01:10:54 steve
* Clean up spurious trailing white space.
*
* Revision 1.320 2004/10/04 00:25:18 steve
* Remove inaccurate comment.
*
* Revision 1.319 2004/09/05 17:44:42 steve
* Add support for module instance arrays.
*
* Revision 1.318 2004/09/04 04:24:15 steve
* PR1026: assignment statements can have sensitivities in the l-values.
*
* Revision 1.317 2004/08/28 16:23:05 steve
* Fix use of system tasks in AT_STAR statements.
*
* Revision 1.316 2004/08/28 15:08:31 steve
* Do not change reg to wire in NetAssign_ unless synthesizing.
*
* Revision 1.315 2004/06/30 15:32:18 steve
* nex_output for NetPDelay statements.
*
* Revision 1.314 2004/06/30 02:16:26 steve
* Implement signed divide and signed right shift in nets.
*
* Revision 1.313 2004/06/13 04:56:55 steve
* Add support for the default_nettype directive.
*
* Revision 1.312 2004/05/31 23:34:38 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.311 2004/02/20 06:22:57 steve
* parameter keys are per_strings.
*
* Revision 1.310 2004/02/19 07:06:57 steve
* LPM, logic and Variables have perm_string names.
*
* Revision 1.309 2004/02/19 06:57:10 steve
* Memory and Event names use perm_string.
*
* Revision 1.308 2004/02/18 17:11:57 steve
* Use perm_strings for named langiage items.
*
* Revision 1.307 2003/12/17 16:52:39 steve
* Debug dumps for synth2.
*
* Revision 1.306 2003/11/10 20:59:03 steve
* Design::get_flag returns const char* instead of string.
*
* Revision 1.305 2003/11/08 20:06:21 steve
* Spelling fixes in comments.
*
* Revision 1.304 2003/10/31 02:47:11 steve
* NetEUReduce has its own dup_expr method.
*/
#endif
+20 -22
View File
@@ -140,6 +140,21 @@ NetExpr* elab_and_eval(Design*des, NetScope*scope,
return tmp;
}
bool eval_as_long(long&value, NetExpr*expr)
{
if (NetEConst*tmp = dynamic_cast<NetEConst*>(expr) ) {
value = tmp->value().as_long();
return true;
}
if (NetECReal*rtmp = dynamic_cast<NetECReal*>(expr)) {
value = rtmp->value().as_long();
return true;
}
return false;
}
std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
const pform_name_t&path)
{
@@ -165,6 +180,11 @@ std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
res.push_back(hname_t(comp.name, ctmp->value().as_long()));
delete ctmp;
continue;
} else {
cerr << index.msb->get_line() << ": error: "
<< "Scope index expression is not constant: "
<< *index.msb << endl;
des->errors += 1;
}
return res;
@@ -173,25 +193,3 @@ std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
return res;
}
/*
* $Log: netmisc.cc,v $
* Revision 1.14 2007/06/02 03:42:13 steve
* Properly evaluate scope path expressions.
*
* Revision 1.13 2007/03/08 05:30:03 steve
* Limit the calculated widths of constants.
*
* Revision 1.12 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.11 2005/04/08 04:50:31 steve
* Don not give to make_add express an unwanted width.
*
* Revision 1.10 2005/01/24 05:28:31 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*/
+7 -88
View File
@@ -123,95 +123,14 @@ extern NetExpr* elab_and_eval(Design*des, NetScope*scope,
const PExpr*pe, int expr_wid,
int prune_width =-1);
/*
* Get the long integer value for the passed in expression, if
* possible. If it is not possible (the expression is not evaluated
* down to a constant) then return false and leave value unchanged.
*/
bool eval_as_long(long&value, NetExpr*expr);
extern std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
const pform_name_t&path);
/*
* $Log: netmisc.h,v $
* Revision 1.31 2007/06/02 03:42:13 steve
* Properly evaluate scope path expressions.
*
* Revision 1.30 2007/05/24 04:07:12 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.29 2007/03/08 05:30:03 steve
* Limit the calculated widths of constants.
*
* Revision 1.28 2007/02/26 19:49:49 steve
* Spelling fixes (larry doolittle)
*
* Revision 1.27 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.26 2006/09/28 00:29:49 steve
* Allow specparams as constants in expressions.
*
* Revision 1.25 2006/06/02 04:48:50 steve
* Make elaborate_expr methods aware of the width that the context
* requires of it. In the process, fix sizing of the width of unary
* minus is context determined sizes.
*
* Revision 1.24 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.23 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.22 2005/05/24 01:44:28 steve
* Do sign extension of structuran nets.
*
* Revision 1.21 2005/04/24 23:44:02 steve
* Update DFF support to new data flow.
*
* Revision 1.20 2005/01/24 05:28:31 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.19 2004/03/07 20:04:11 steve
* MOre thorough use of elab_and_eval function.
*
* Revision 1.18 2003/09/19 03:30:05 steve
* Fix name search in elab_lval.
*
* Revision 1.17 2003/01/30 16:23:08 steve
* Spelling fixes.
*
* Revision 1.16 2002/08/31 03:48:50 steve
* Fix reverse bit ordered bit select in continuous assignment.
*
* Revision 1.15 2002/08/12 01:35:00 steve
* conditional ident string using autoconfig.
*
* Revision 1.14 2002/06/25 01:33:22 steve
* Cache calculated driven value.
*
* Revision 1.13 2002/06/24 01:49:39 steve
* Make link_drive_constant cache its results in
* the Nexus, to improve cprop performance.
*
* Revision 1.12 2001/02/15 06:59:36 steve
* FreeBSD port has a maintainer now.
*
* Revision 1.11 2001/02/10 20:29:39 steve
* In the context of range declarations, use elab_and_eval instead
* of the less robust eval_const methods.
*
* Revision 1.10 2000/11/20 00:58:40 steve
* Add support for supply nets (PR#17)
*
* Revision 1.9 2000/09/20 02:53:15 steve
* Correctly measure comples l-values of assignments.
*
* Revision 1.8 2000/06/25 19:59:42 steve
* Redesign Links to include the Nexus class that
* carries properties of the connected set of links.
*
* Revision 1.7 2000/05/14 17:55:04 steve
* Support initialization of FF Q value.
*/
#endif
+60 -36
View File
@@ -191,8 +191,8 @@ static list<perm_string>* list_from_identifier(list<perm_string>*tmp, char*id)
%type <statement> udp_initial udp_init_opt
%type <expr> udp_initial_expr_opt
%type <text> register_variable net_variable
%type <perm_strings> register_variable_list net_variable_list list_of_identifiers
%type <text> register_variable net_variable real_variable
%type <perm_strings> register_variable_list net_variable_list real_variable_list list_of_identifiers
%type <net_decl_assign> net_decl_assign net_decl_assigns
@@ -369,8 +369,8 @@ block_item_decl
if ($1) delete $1;
}
| K_time register_variable_list ';'
{ pform_set_reg_time($2);
| attribute_list_opt K_time register_variable_list ';'
{ pform_set_reg_time($3);
}
/* real declarations are fairly simple as there is no range of
@@ -378,20 +378,10 @@ block_item_decl
with real value. Note that real and realtime are interchangable
in this context. */
| K_real list_of_identifiers ';'
{ pform_makewire(@1, 0, true, $2,
NetNet::REG,
NetNet::NOT_A_PORT,
IVL_VT_REAL,
0);
}
| K_realtime list_of_identifiers ';'
{ pform_makewire(@1, 0, true, $2,
NetNet::REG,
NetNet::NOT_A_PORT,
IVL_VT_REAL,
0);
}
| attribute_list_opt K_real real_variable_list ';'
{ delete $3; }
| attribute_list_opt K_realtime real_variable_list ';'
{ delete $3; }
| K_parameter parameter_assign_decl ';'
| K_localparam localparam_assign_decl ';'
@@ -409,15 +399,15 @@ block_item_decl
yyerrok;
if ($1) delete $1;
}
| K_time error ';'
{ yyerror(@1, "error: syntax error in time variable list.");
| attribute_list_opt K_time error ';'
{ yyerror(@2, "error: syntax error in time variable list.");
yyerrok;
}
| K_real error ';'
{ yyerror(@1, "error: syntax error in real variable list.");
| attribute_list_opt K_real error ';'
{ yyerror(@2, "error: syntax error in real variable list.");
yyerrok;
}
| K_realtime error ';'
| attribute_list_opt K_realtime error ';'
{ yyerror(@1, "error: syntax error in realtime variable list.");
yyerrok;
}
@@ -1894,22 +1884,28 @@ module_item
is supposed to be limited to certain kinds of module items, but
the semantic tests will check that for us. */
| K_generate module_item_list_opt K_endgenerate
| K_generate module_item_list_opt K_endgenerate
| K_genvar list_of_identifiers ';'
{ pform_genvars($2); }
| K_genvar list_of_identifiers ';'
{ pform_genvars($2); }
| K_for '(' IDENTIFIER '=' expression ';'
expression ';'
IDENTIFIER '=' expression ')'
{ pform_start_generate_for(@1, $3, $5, $7, $9, $11); }
generate_block
{ pform_endgenerate(); }
| K_for '(' IDENTIFIER '=' expression ';'
expression ';'
IDENTIFIER '=' expression ')'
{ pform_start_generate_for(@1, $3, $5, $7, $9, $11); }
generate_block
{ pform_endgenerate(); }
| K_if '(' expression ')' generate_block_opt K_else generate_block
{ yyerror(@1, "sorry: Condition generate not supported yet.");
}
| generate_if
generate_block_opt
K_else
{ pform_start_generate_else(@1); }
generate_block
{ pform_endgenerate(); }
| generate_if
generate_block_opt %prec less_than_K_else
{ pform_endgenerate(); }
/* specify blocks are parsed but ignored. */
@@ -1966,6 +1962,7 @@ module_item
{ yyerror(@1, "error: Malformed $attribute parameter list."); }
;
generate_if : K_if '(' expression ')' { pform_start_generate_if(@1, $3); }
module_item_list
: module_item_list module_item
@@ -1990,7 +1987,7 @@ generate_block
{ pform_generate_block_name($3); }
;
generate_block_opt : generate_block | ;
generate_block_opt : generate_block | ';' ;
/* A net declaration assignment allows the programmer to combine the
@@ -2509,6 +2506,33 @@ register_variable_list
}
;
real_variable
: IDENTIFIER
{ pform_makewire(@1, $1, NetNet::REG, NetNet::NOT_A_PORT, IVL_VT_REAL, 0);
$$ = $1;
}
| IDENTIFIER '=' expression
{ pform_makewire(@1, $1, NetNet::REG, NetNet::NOT_A_PORT, IVL_VT_REAL, 0);
pform_make_reginit(@1, $1, $3);
$$ = $1;
}
;
real_variable_list
: real_variable
{ list<perm_string>*tmp = new list<perm_string>;
tmp->push_back(lex_strings.make($1));
$$ = tmp;
delete[]$1;
}
| real_variable_list ',' real_variable
{ list<perm_string>*tmp = $1;
tmp->push_back(lex_strings.make($3));
$$ = tmp;
delete[]$3;
}
;
net_variable
: IDENTIFIER
{ pform_makewire(@1, $1, NetNet::IMPLICIT,
+71 -289
View File
@@ -362,6 +362,48 @@ void pform_start_generate_for(const struct vlltype&li,
delete[]ident2;
}
void pform_start_generate_if(const struct vlltype&li, PExpr*test)
{
PGenerate*gen = new PGenerate(scope_generate_counter++);
gen->set_file(li.text);
gen->set_lineno(li.first_line);
// For now, assume that generates do not nest.
gen->parent = pform_cur_generate;
pform_cur_generate = gen;
pform_cur_generate->scheme_type = PGenerate::GS_CONDIT;
pform_cur_generate->loop_init = 0;
pform_cur_generate->loop_test = test;
pform_cur_generate->loop_step = 0;
}
void pform_start_generate_else(const struct vlltype&li)
{
assert(pform_cur_generate);
assert(pform_cur_generate->scheme_type == PGenerate::GS_CONDIT);
PGenerate*cur = pform_cur_generate;
pform_endgenerate();
PGenerate*gen = new PGenerate(scope_generate_counter++);
gen->set_file(li.text);
gen->set_lineno(li.first_line);
// For now, assume that generates do not nest.
gen->parent = pform_cur_generate;
pform_cur_generate = gen;
pform_cur_generate->scheme_type = PGenerate::GS_ELSE;
pform_cur_generate->loop_init = 0;
pform_cur_generate->loop_test = cur->loop_test;
pform_cur_generate->loop_step = 0;
}
void pform_generate_block_name(char*name)
{
assert(pform_cur_generate != 0);
@@ -375,6 +417,14 @@ void pform_endgenerate()
assert(pform_cur_generate != 0);
assert(pform_cur_module);
// If there is no explicit block name, then use a default
// internal name.
if (pform_cur_generate->scope_name == 0) {
char tmp[16];
snprintf(tmp, sizeof tmp, "$gen%d", pform_cur_generate->id_number);
pform_cur_generate->scope_name = lex_strings.make(tmp);
}
PGenerate*cur = pform_cur_generate;
pform_cur_generate = cur->parent;
@@ -1233,16 +1283,26 @@ void pform_makewire(const vlltype&li, const char*nm,
}
}
if (cur) {
cur->set_file(li.text);
cur->set_lineno(li.first_line);
return;
bool new_wire_flag = false;
if (! cur) {
new_wire_flag = true;
cur = new PWire(name, type, pt, dt);
}
cur = new PWire(name, type, pt, dt);
cur->set_file(li.text);
cur->set_lineno(li.first_line);
switch (dt) {
case IVL_VT_REAL:
cur->set_data_type(dt);
cur->set_range(0, 0);
cur->set_signed(true);
break;
default:
break;
}
if (attr) {
for (unsigned idx = 0 ; idx < attr->count() ; idx += 1) {
named_pexpr_t*tmp = (*attr)[idx];
@@ -1250,10 +1310,12 @@ void pform_makewire(const vlltype&li, const char*nm,
}
}
if (pform_cur_generate)
pform_cur_generate->add_wire(cur);
else
pform_cur_module->add_wire(cur);
if (new_wire_flag) {
if (pform_cur_generate)
pform_cur_generate->add_wire(cur);
else
pform_cur_module->add_wire(cur);
}
}
/*
@@ -1786,283 +1848,3 @@ int pform_parse(const char*path, FILE*file)
return error_count;
}
/*
* $Log: pform.cc,v $
* Revision 1.148 2007/06/12 04:05:45 steve
* Put instantiated modules in the proper generated scope.
*
* Revision 1.147 2007/06/02 03:42:13 steve
* Properly evaluate scope path expressions.
*
* Revision 1.146 2007/05/24 04:07:12 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.145 2007/04/26 03:06:22 steve
* Rework hname_t to use perm_strings.
*
* Revision 1.144 2007/04/19 02:52:53 steve
* Add support for -v flag in command file.
*
* Revision 1.143 2007/04/13 02:34:35 steve
* Parse edge sensitive paths without edge specifier.
*
* Revision 1.142 2007/03/07 04:24:59 steve
* Make integer width controllable.
*
* Revision 1.141 2007/03/05 05:59:10 steve
* Handle processes within generate loops.
*
* Revision 1.140 2007/02/12 01:52:21 steve
* Parse all specify paths to pform.
*
* Revision 1.139 2007/01/27 05:36:11 steve
* Fix padding of x when literal is sized and unsigned.
*
* Revision 1.138 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.137 2006/09/23 04:57:19 steve
* Basic support for specify timing.
*
* Revision 1.136 2006/08/08 05:11:37 steve
* Handle 64bit delay constants.
*
* Revision 1.135 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.134 2006/03/30 05:22:34 steve
* task/function ports can have types.
*
* Revision 1.133 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.132 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.131 2005/05/06 00:25:13 steve
* Handle synthesis of concatenation expressions.
*
* Revision 1.130 2004/12/11 02:31:27 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.129 2004/10/04 01:10:55 steve
* Clean up spurious trailing white space.
*
* Revision 1.128 2004/08/26 04:02:04 steve
* Add support for localparam ranges.
*
* Revision 1.127 2004/06/13 04:56:55 steve
* Add support for the default_nettype directive.
*
* Revision 1.126 2004/05/31 23:34:39 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.125 2004/05/25 19:21:07 steve
* More identifier lists use perm_strings.
*
* Revision 1.124 2004/03/08 00:10:30 steve
* Verilog2001 new style port declartions for primitives.
*
* Revision 1.123 2004/02/20 18:53:35 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.122 2004/02/20 06:22:58 steve
* parameter keys are per_strings.
*
* Revision 1.121 2004/02/19 06:57:10 steve
* Memory and Event names use perm_string.
*
* Revision 1.120 2004/02/18 17:11:57 steve
* Use perm_strings for named langiage items.
*
* Revision 1.119 2004/02/15 17:48:28 steve
* Better error checking of primitive tables.
*
* Revision 1.118 2003/07/04 03:57:19 steve
* Allow attributes on Verilog 2001 port declarations.
*
* Revision 1.117 2003/06/24 01:38:03 steve
* Various warnings fixed.
*
* Revision 1.116 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
*
* Revision 1.115 2003/06/13 19:10:46 steve
* Properly manage real variables in subscopes.
*
* Revision 1.114 2003/06/13 00:27:09 steve
* Task/functions can have signed ports.
*
* Revision 1.113 2003/04/28 17:50:57 steve
* More 2001 port declaration support.
*
* Revision 1.112 2003/04/14 03:39:15 steve
* Break sized constants into a size token
* and a based numeric constant.
*
* Revision 1.111 2003/03/06 04:37:12 steve
* lex_strings.add module names earlier.
*
* Revision 1.110 2003/03/01 06:25:30 steve
* Add the lex_strings string handler, and put
* scope names and system task/function names
* into this table. Also, permallocate event
* names from the beginning.
*
* Revision 1.109 2003/02/27 06:45:11 steve
* specparams as far as pform.
*
* Revision 1.108 2003/02/02 19:02:39 steve
* Add support for signed ports and nets.
*
* Revision 1.107 2003/01/26 21:15:59 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.106 2003/01/17 05:47:30 steve
* Missed a case of setting line on an PEident.
*
* Revision 1.105 2003/01/16 21:44:19 steve
* Detect duplicate module declarations.
*
* Revision 1.104 2003/01/14 21:16:18 steve
* Move strstream to ostringstream for compatibility.
*
* Revision 1.103 2003/01/10 03:08:13 steve
* Spelling fixes.
*
* Revision 1.102 2002/09/01 03:01:48 steve
* Properly cast signedness of parameters with ranges.
*
* Revision 1.101 2002/08/19 02:39:17 steve
* Support parameters with defined ranges.
*
* Revision 1.100 2002/08/12 01:35:00 steve
* conditional ident string using autoconfig.
*
* Revision 1.99 2002/06/21 04:59:35 steve
* Carry integerness throughout the compilation.
*
* Revision 1.98 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.97 2002/05/24 04:36:23 steve
* Verilog 2001 attriubtes on nets/wires.
*
* Revision 1.96 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.95 2002/05/20 02:06:01 steve
* Add ranges and signed to port list declarations.
*
* Revision 1.94 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.93 2002/04/18 18:38:37 steve
* Fix first_file test for timescale warning.
*
* Revision 1.92 2002/04/15 00:04:23 steve
* Timescale warnings.
*
* Revision 1.91 2002/04/12 02:57:08 steve
* Detect mismatches in reg as module items and ports.
*
* Revision 1.90 2002/01/31 04:10:15 steve
* Detect duplicate port declarations.
*
* Revision 1.89 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.88 2002/01/12 04:03:39 steve
* Drive strengths for continuous assignments.
*
* Revision 1.87 2001/12/07 05:03:13 steve
* Support integer for function return value.
*
* Revision 1.86 2001/12/03 04:47:15 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*
* Revision 1.85 2001/11/29 17:37:51 steve
* Properly parse net_decl assignments with delays.
*
* Revision 1.84 2001/11/10 02:08:49 steve
* Coerse input to inout when assigned to.
*
* Revision 1.83 2001/10/31 03:11:15 steve
* detect module ports not declared within the module.
*
* Revision 1.82 2001/10/21 01:55:24 steve
* Error messages for missing UDP port declarations.
*
* Revision 1.81 2001/10/21 00:42:48 steve
* Module types in pform are char* instead of string.
*
* Revision 1.80 2001/10/20 23:02:40 steve
* Add automatic module libraries.
*
* Revision 1.79 2001/10/20 05:21:51 steve
* Scope/module names are char* instead of string.
*
* Revision 1.78 2001/07/25 03:10:49 steve
* Create a config.h.in file to hold all the config
* junk, and support gcc 3.0. (Stephan Boettcher)
*
* Revision 1.77 2001/05/25 02:21:34 steve
* Detect input and input ports declared as reg.
*
* Revision 1.76 2001/05/20 15:03:25 steve
* Deleted wrong time when -Tmax is selected.
*
* Revision 1.75 2001/04/28 23:18:08 steve
* UDP instances need not have user supplied names.
*
* Revision 1.74 2001/02/17 05:15:33 steve
* Allow task ports to be given real types.
*
* Revision 1.73 2001/01/15 00:47:01 steve
* Pass scope type information to the target module.
*
* Revision 1.72 2001/01/14 23:04:56 steve
* Generalize the evaluation of floating point delays, and
* get it working with delay assignment statements.
*
* Allow parameters to be referenced by hierarchical name.
*
* Revision 1.71 2001/01/10 05:32:44 steve
* Match memories within task scopes. (PR#101)
*
* Revision 1.70 2001/01/06 06:31:59 steve
* declaration initialization for time variables.
*
* Revision 1.69 2001/01/06 02:29:36 steve
* Support arrays of integers.
*
* Revision 1.68 2000/12/11 00:31:43 steve
* Add support for signed reg variables,
* simulate in t-vvm signed comparisons.
*
* Revision 1.67 2000/11/30 17:31:42 steve
* Change LineInfo to store const C strings.
*/
+2
View File
@@ -186,6 +186,8 @@ extern void pform_start_generate_for(const struct vlltype&li,
PExpr*test,
char*ident2,
PExpr*next);
extern void pform_start_generate_if(const struct vlltype&li, PExpr*test);
extern void pform_start_generate_else(const struct vlltype&li);
extern void pform_generate_block_name(char*name);
extern void pform_endgenerate();
+10 -127
View File
@@ -417,10 +417,14 @@ void PGModule::dump(ostream&out, unsigned ind) const
out << setw(ind) << "" << type_ << " ";
// If parameters are overridden by order, dump them.
if (overrides_) {
if (overrides_ && overrides_->count() > 0) {
assert(parms_ == 0);
out << "#(";
out << *((*overrides_)[0]);
if ((*overrides_)[0] == 0)
out << "<nil>";
else
out << *((*overrides_)[0]);
for (unsigned idx = 1 ; idx < overrides_->count() ; idx += 1) {
out << "," << *((*overrides_)[idx]);
}
@@ -839,6 +843,10 @@ void PGenerate::dump(ostream&out, unsigned indent) const
<< "=" << *loop_step << ")";
break;
case GS_CONDIT:
out << " if (" << *loop_test << ")";
break;
case GS_ELSE:
out << " else !(" << *loop_test << ")";
break;
}
@@ -1069,128 +1077,3 @@ void PUdp::dump(ostream&out) const
out << "endprimitive" << endl;
}
/*
* $Log: pform_dump.cc,v $
* Revision 1.101 2007/06/04 02:19:07 steve
* Handle bit/part select of array words in nets.
*
* Revision 1.100 2007/06/02 03:42:13 steve
* Properly evaluate scope path expressions.
*
* Revision 1.99 2007/05/31 18:35:50 steve
* Missing return value to perm_string dump
*
* Revision 1.98 2007/05/24 04:07:12 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.97 2007/03/07 00:38:15 steve
* Lint fixes.
*
* Revision 1.96 2007/03/05 05:59:10 steve
* Handle processes within generate loops.
*
* Revision 1.95 2007/02/12 01:52:21 steve
* Parse all specify paths to pform.
*
* Revision 1.94 2006/09/23 04:57:19 steve
* Basic support for specify timing.
*
* Revision 1.93 2006/04/28 04:19:31 steve
* Dump indexes of ident expressions
*
* Revision 1.92 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.91 2005/10/04 04:09:26 steve
* Add support for indexed select attached to parameters.
*
* Revision 1.90 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.89 2005/07/07 16:22:49 steve
* Generalize signals to carry types.
*
* Revision 1.88 2004/10/04 01:10:55 steve
* Clean up spurious trailing white space.
*
* Revision 1.87 2004/05/31 23:34:39 steve
* Rewire/generalize parsing an elaboration of
* function return values to allow for better
* speed and more type support.
*
* Revision 1.86 2004/05/25 19:21:07 steve
* More identifier lists use perm_strings.
*
* Revision 1.85 2004/02/20 18:53:35 steve
* Addtrbute keys are perm_strings.
*
* Revision 1.84 2004/02/20 06:22:58 steve
* parameter keys are per_strings.
*
* Revision 1.83 2004/02/18 17:11:57 steve
* Use perm_strings for named langiage items.
*
* Revision 1.82 2003/07/05 20:42:08 steve
* Fix some enumeration warnings.
*
* Revision 1.81 2003/06/20 00:53:19 steve
* Module attributes from the parser
* through to elaborated form.
*
* Revision 1.80 2003/06/13 19:10:46 steve
* Properly manage real variables in subscopes.
*
* Revision 1.79 2003/02/27 06:45:11 steve
* specparams as far as pform.
*
* Revision 1.78 2003/01/26 21:15:59 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.77 2002/10/19 22:59:49 steve
* Redo the parameter vector support to allow
* parameter names in range expressions.
*
* Revision 1.76 2002/08/19 02:39:17 steve
* Support parameters with defined ranges.
*
* Revision 1.75 2002/08/12 01:35:00 steve
* conditional ident string using autoconfig.
*
* Revision 1.74 2002/05/26 01:39:02 steve
* Carry Verilog 2001 attributes with processes,
* all the way through to the ivl_target API.
*
* Divide signal reference counts between rval
* and lval references.
*
* Revision 1.73 2002/05/24 04:36:23 steve
* Verilog 2001 attriubtes on nets/wires.
*
* Revision 1.72 2002/05/23 03:08:51 steve
* Add language support for Verilog-2001 attribute
* syntax. Hook this support into existing $attribute
* handling, and add number and void value types.
*
* Add to the ivl_target API new functions for access
* of complex attributes attached to gates.
*
* Revision 1.71 2002/05/19 23:37:28 steve
* Parse port_declaration_lists from the 2001 Standard.
*
* Revision 1.70 2002/04/21 04:59:08 steve
* Add support for conbinational events by finding
* the inputs to expressions and some statements.
* Get case and assignment statements working.
*
* Revision 1.69 2002/01/26 05:28:28 steve
* Detect scalar/vector declarion mismatch.
*
* Revision 1.68 2001/12/03 04:47:15 steve
* Parser and pform use hierarchical names as hname_t
* objects instead of encoded strings.
*/
+7 -32
View File
@@ -49,7 +49,13 @@ NetScope*symbol_search(Design*des, NetScope*scope, pform_name_t path,
scope that we are supposed to search. */
if (! path.empty()) {
list<hname_t> path_list = eval_scope_path(des, scope, path);
assert(path_list.size() == path.size());
assert(path_list.size() <= path.size());
// If eval_scope_path returns a short list, then some
// part of the scope was not found. Abort.
if (path_list.size() < path.size())
return 0;
scope = des->find_scope(scope, path_list);
}
@@ -71,34 +77,3 @@ NetScope*symbol_search(Design*des, NetScope*scope, pform_name_t path,
return 0;
}
/*
* $Log: symbol_search.cc,v $
* Revision 1.7 2007/06/02 03:42:13 steve
* Properly evaluate scope path expressions.
*
* Revision 1.6 2007/05/24 04:07:12 steve
* Rework the heirarchical identifier parse syntax and pform
* to handle more general combinations of heirarch and bit selects.
*
* Revision 1.5 2007/04/26 03:06:22 steve
* Rework hname_t to use perm_strings.
*
* Revision 1.4 2007/01/16 05:44:15 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.3 2005/11/27 05:56:20 steve
* Handle bit select of parameter with ranges.
*
* Revision 1.2 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.1 2003/09/19 03:30:05 steve
* Fix name search in elab_lval.
*
*/
+1
View File
@@ -50,6 +50,7 @@ static void function_argument_real(ivl_signal_t port, ivl_expr_t exp)
assert(ivl_signal_array_count(port) == 1);
fprintf(vvp_out, " %%set/wr v%p_0, %d;\n", port, res);
clr_word(res);
}
static void draw_function_argument(ivl_signal_t port, ivl_expr_t exp)
+15 -167
View File
@@ -1608,9 +1608,21 @@ static void draw_signal_dest(ivl_expr_t exp, struct vector_info res)
word = get_number_immediate(ix);
}
/* If this is a REG (a variable) then I can do a vector read. */
fprintf(vvp_out, " %%load/v %u, v%p_%u, %u;\n",
res.base, sig, word, swid);
if (ivl_signal_data_type(sig) == IVL_VT_REAL) {
int tmp = allocate_word();
fprintf(vvp_out, " %%load/wr %d, v%p_%u;\n", tmp, sig, word);
fprintf(vvp_out, " %%cvt/vr %u, %d, %u;\n", res.base, tmp, res.wid);
clr_word(tmp);
} else {
/* If this is a REG (a variable) then I can do a vector read. */
fprintf(vvp_out, " %%load/v %u, v%p_%u, %u;\n",
res.base, sig, word, swid);
}
pad_expr_in_place(exp, res, swid);
}
@@ -2231,169 +2243,5 @@ struct vector_info draw_eval_expr(ivl_expr_t exp, int stuff_ok_flag)
/*
* $Log: eval_expr.c,v $
* Revision 1.137 2007/04/14 04:43:01 steve
* Finish up part select of array words.
*
* Revision 1.136 2007/03/22 16:08:18 steve
* Spelling fixes from Larry
*
* Revision 1.135 2007/02/26 19:49:50 steve
* Spelling fixes (larry doolittle)
*
* Revision 1.134 2007/02/12 04:37:58 steve
* Get padding right when loading array word into big vector.
*
* Revision 1.133 2007/01/19 05:24:53 steve
* Handle real constants in vector expressions.
*
* Revision 1.132 2007/01/17 04:39:18 steve
* Remove dead code related to memories.
*
* Revision 1.131 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.130 2006/02/02 02:43:59 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.129 2006/01/02 05:33:20 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.128 2005/12/22 15:42:22 steve
* Pad part selects
*
* Revision 1.127 2005/10/11 18:54:10 steve
* Remove the $ from signal labels. They do not help.
*
* Revision 1.126 2005/10/11 18:30:50 steve
* Remove obsolete vvp_memory_label function.
*
* Revision 1.125 2005/09/19 21:45:36 steve
* Spelling patches from Larry.
*
* Revision 1.124 2005/09/19 20:18:20 steve
* Fix warnings about uninitialized variables.
*
* Revision 1.123 2005/09/17 04:01:32 steve
* Improve loading of part selects when easy.
*
* Revision 1.122 2005/09/17 01:01:00 steve
* More robust use of precalculated expressions, and
* Separate lookaside for written variables that can
* also be reused.
*
* Revision 1.121 2005/09/15 02:49:47 steve
* Better reuse of IVL_EX_SELECT expressions.
*
* Revision 1.120 2005/09/14 02:53:15 steve
* Support bool expressions and compares handle them optimally.
*
* Revision 1.119 2005/07/13 04:52:31 steve
* Handle functions with real values.
*
* Revision 1.118 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.117 2005/03/12 23:45:33 steve
* Handle function/task port vectors.
*
* Revision 1.116 2005/03/03 04:34:42 steve
* Rearrange how memories are supported as vvp_vector4 arrays.
*
* Revision 1.115 2005/02/15 07:12:55 steve
* Support constant part select writes to l-values, and large part select reads from signals.
*
* Revision 1.114 2005/01/28 05:37:48 steve
* Special handling of constant shift 0.
*
* Revision 1.113 2005/01/24 05:28:31 steve
* Remove the NetEBitSel and combine all bit/part select
* behavior into the NetESelect node and IVL_EX_SELECT
* ivl_target expression type.
*
* Revision 1.112 2005/01/24 05:08:02 steve
* Part selects are done in the compiler, not here.
*
* Revision 1.111 2004/12/11 02:31:28 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.110 2004/10/04 01:10:57 steve
* Clean up spurious trailing white space.
*
* Revision 1.109 2004/09/10 00:14:31 steve
* Relaxed width constraint on pad_expression output.
*
* Revision 1.108 2004/06/30 03:07:32 steve
* Watch out for real compared to constant. Handle as real.
*
* Revision 1.107 2004/06/19 16:17:37 steve
* Generate signed modulus if appropriate.
*
* Revision 1.106 2003/10/01 17:44:20 steve
* Slightly more efficient unary minus.
*
* Revision 1.105 2003/09/24 20:46:20 steve
* Clear expression lookaside after true cause of ternary.
*
* Revision 1.104 2003/08/03 03:53:38 steve
* Subtract from constant values.
*
* Revision 1.103 2003/07/26 03:34:43 steve
* Start handling pad of expressions in code generators.
*
* Revision 1.102 2003/06/18 03:55:19 steve
* Add arithmetic shift operators.
*
* Revision 1.101 2003/06/17 19:17:42 steve
* Remove short int restrictions from vvp opcodes.
*
* Revision 1.100 2003/06/16 22:14:15 steve
* Fix fprintf warning.
*
* Revision 1.99 2003/06/15 22:49:32 steve
* More efficient code for ternary expressions.
*
* Revision 1.98 2003/06/14 22:18:54 steve
* Sign extend signed vectors.
*
* Revision 1.97 2003/06/13 19:10:20 steve
* Handle assign of real to vector.
*
* Revision 1.96 2003/06/11 02:23:45 steve
* Proper pad of signed constants.
*
* Revision 1.95 2003/05/10 02:38:49 steve
* Proper width handling of || expressions.
*
* Revision 1.94 2003/03/25 02:15:48 steve
* Use hash code for scope labels.
*
* Revision 1.93 2003/03/15 04:45:18 steve
* Allow real-valued vpi functions to have arguments.
*
* Revision 1.92 2003/02/28 20:21:13 steve
* Merge vpi_call and vpi_func draw functions.
*
* Revision 1.91 2003/02/07 02:46:16 steve
* Handle real value subtract and comparisons.
*
* Revision 1.90 2003/01/27 00:14:37 steve
* Support in various contexts the $realtime
* system task.
*
* Revision 1.89 2003/01/26 21:15:59 steve
* Rework expression parsing and elaboration to
* accommodate real/realtime values and expressions.
*
* Revision 1.88 2002/12/20 01:11:14 steve
* Evaluate shift index after shift operand because
* the chift operand may use the index register itself.
*
* Revision 1.87 2002/12/19 23:11:29 steve
* Keep bit select subexpression width if it is constant.
*/
+85 -222
View File
@@ -400,12 +400,13 @@ static ivl_signal_t find_modpath(ivl_nexus_t nex)
return 0;
}
static void draw_C4_to_string(char*result, size_t nresult,
ivl_net_const_t cptr)
static char* draw_C4_to_string(ivl_net_const_t cptr)
{
const char*bits = ivl_const_bits(cptr);
unsigned idx;
size_t result_len = 5 + ivl_const_width(cptr);
char*result = malloc(result_len);
char*dp = result;
strcpy(dp, "C4<");
dp += strlen(dp);
@@ -422,16 +423,18 @@ static void draw_C4_to_string(char*result, size_t nresult,
*dp++ = bits[idx];
break;
}
assert(dp - result < nresult);
assert((dp - result) < result_len);
}
strcpy(dp, ">");
return result;
}
static void draw_C8_to_string(char*result, size_t nresult,
ivl_net_const_t cptr,
ivl_drive_t dr0, ivl_drive_t dr1)
static char* draw_C8_to_string(ivl_net_const_t cptr,
ivl_drive_t dr0, ivl_drive_t dr1)
{
size_t nresult = 5 + 3*ivl_const_width(cptr);
char*result = malloc(nresult);
const char*bits = ivl_const_bits(cptr);
unsigned idx;
@@ -474,6 +477,7 @@ static void draw_C8_to_string(char*result, size_t nresult,
}
strcpy(dp, ">");
return result;
}
/*
@@ -483,9 +487,8 @@ static void draw_C8_to_string(char*result, size_t nresult,
* to this nexus.
*/
static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
static char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
{
static char result[2048];
unsigned nptr_pin = ivl_nexus_ptr_pin(nptr);
ivl_net_const_t cptr;
ivl_net_logic_t lptr;
@@ -498,7 +501,7 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
if (! can_elide_bufz(lptr, nptr))
break;
return draw_net_input(ivl_logic_pin(lptr, 1));
return strdup(draw_net_input(ivl_logic_pin(lptr, 1)));
} while(0);
/* If this is a pulldown device, then there is a single pin
@@ -508,6 +511,8 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
then we can draw a C4<> constant instead. */
if (lptr && (ivl_logic_type(lptr) == IVL_LO_PULLDOWN)) {
if (ivl_nexus_ptr_drive0(nptr) == IVL_DR_STRONG) {
size_t result_len = ivl_logic_width(lptr) + 5;
char*result = malloc(result_len);
char*dp = result;
strcpy(dp, "C4<");
dp += strlen(dp);
@@ -515,10 +520,12 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
dp += ivl_logic_width(lptr);
*dp++ = '>';
*dp = 0;
assert((dp-result) <= sizeof result);
assert((dp-result) <= result_len);
return result;
} else {
char val[4];
size_t result_len = 3*ivl_logic_width(lptr) + 5;
char*result = malloc(result_len);
char*dp = result;
val[0] = "01234567"[ivl_nexus_ptr_drive0(nptr)];
@@ -532,13 +539,15 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
dp += 3*ivl_logic_width(lptr);
*dp++ = '>';
*dp = 0;
assert((dp-result) <= sizeof result);
assert((dp-result) <= result_len);
return result;
}
}
if (lptr && (ivl_logic_type(lptr) == IVL_LO_PULLUP)) {
if (ivl_nexus_ptr_drive1(nptr) == IVL_DR_STRONG) {
size_t result_len = 5 + ivl_logic_width(lptr);
char*result = malloc(result_len);
char*dp = result;
strcpy(dp, "C4<");
dp += strlen(dp);
@@ -546,10 +555,12 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
dp += ivl_logic_width(lptr);
*dp++ = '>';
*dp = 0;
assert((dp-result) <= sizeof result);
assert((dp-result) <= result_len);
return result;
} else {
char val[4];
size_t result_len = 5 + 3*ivl_logic_width(lptr);
char*result = malloc(result_len);
char*dp = result;
val[0] = "01234567"[ivl_nexus_ptr_drive0(nptr)];
@@ -563,28 +574,31 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
dp += 3*ivl_logic_width(lptr);
*dp++ = '>';
*dp = 0;
assert((dp-result) <= sizeof result);
assert((dp-result) <= result_len);
return result;
}
}
if (lptr && (nptr_pin == 0)) {
sprintf(result, "L_%p", lptr);
return result;
char tmp[128];
snprintf(tmp, sizeof tmp, "L_%p", lptr);
return strdup(tmp);
}
sptr = ivl_nexus_ptr_sig(nptr);
if (sptr && (ivl_signal_type(sptr) == IVL_SIT_REG)) {
char tmp[128];
/* Input is a .var. This device may be a non-zero pin
because it may be an array of reg vectors. */
snprintf(result, sizeof result, "v%p_%u", sptr, nptr_pin);
return result;
snprintf(tmp, sizeof tmp, "v%p_%u", sptr, nptr_pin);
return strdup(tmp);
}
cptr = ivl_nexus_ptr_con(nptr);
if (cptr) {
/* Constants should have exactly 1 pin, with a literal value. */
assert(nptr_pin == 0);
char *result = 0;
switch (ivl_const_type(cptr)) {
case IVL_VT_LOGIC:
@@ -592,18 +606,21 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
if ((ivl_nexus_ptr_drive0(nptr) == IVL_DR_STRONG)
&& (ivl_nexus_ptr_drive1(nptr) == IVL_DR_STRONG)) {
draw_C4_to_string(result, sizeof(result), cptr);
result = draw_C4_to_string(cptr);
} else {
draw_C8_to_string(result, sizeof(result), cptr,
ivl_nexus_ptr_drive0(nptr),
ivl_nexus_ptr_drive1(nptr));
result = draw_C8_to_string(cptr,
ivl_nexus_ptr_drive0(nptr),
ivl_nexus_ptr_drive1(nptr));
}
break;
case IVL_VT_REAL:
snprintf(result, sizeof(result),
"Cr<%lg>", ivl_const_real(cptr));
{ char tmp[256];
snprintf(tmp, sizeof(tmp),
"Cr<%lg>", ivl_const_real(cptr));
result = strdup(tmp);
}
break;
default:
@@ -647,18 +664,21 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
case IVL_LPM_PART_PV: /* NOTE: This is only a partial driver. */
case IVL_LPM_REPEAT:
if (ivl_lpm_q(lpm, 0) == nex) {
sprintf(result, "L_%p", lpm);
return result;
char tmp[128];
snprintf(tmp, sizeof tmp, "L_%p", lpm);
return strdup(tmp);
}
break;
case IVL_LPM_PART_BI:
if (ivl_lpm_q(lpm, 0) == nex) {
sprintf(result, "L_%p/P", lpm);
return result;
char tmp[128];
snprintf(tmp, sizeof tmp, "L_%p/P", lpm);
return strdup(tmp);
} else if (ivl_lpm_data(lpm,0) == nex) {
sprintf(result, "L_%p/V", lpm);
return result;
char tmp[128];
snprintf(tmp, sizeof tmp, "L_%p/V", lpm);
return strdup(tmp);
}
break;
}
@@ -666,7 +686,7 @@ static const char* draw_net_input_drive(ivl_nexus_t nex, ivl_nexus_ptr_t nptr)
fprintf(stderr, "internal error: no input to nexus %s\n",
ivl_nexus_name(nex));
assert(0);
return "C<z>";
return strdup("C<z>");
}
static void draw_modpath(const char*label, const char*driver,
@@ -870,7 +890,7 @@ static char* draw_net_input_x(ivl_nexus_t nex,
if (ndrivers == 1 && res == IVL_SIT_TRI) {
ivl_signal_t path_sig = find_modpath(nex);
if (path_sig) {
char*nex_str = strdup(draw_net_input_drive(nex, drivers[0]));
char*nex_str = draw_net_input_drive(nex, drivers[0]);
char modpath_label[64];
snprintf(modpath_label, sizeof modpath_label,
"V_%p/m", path_sig);
@@ -878,7 +898,7 @@ static char* draw_net_input_x(ivl_nexus_t nex,
nex_private = strdup(modpath_label);
free(nex_str);
} else {
nex_private = strdup(draw_net_input_drive(nex, drivers[0]));
nex_private = draw_net_input_drive(nex, drivers[0]);
}
return nex_private;
}
@@ -899,8 +919,9 @@ static char* draw_net_input_x(ivl_nexus_t nex,
fprintf(vvp_out, ", RS_%p/%d/%d",
nex, level - 1, idx*4);
} else {
fprintf(vvp_out, ", %s",
draw_net_input_drive(nex, drivers[idx]));
char*drive = draw_net_input_drive(nex, drivers[idx]);
fprintf(vvp_out, ", %s", drive);
free(drive);
}
}
for ( ; idx < inst+4 ; idx += 1) {
@@ -1070,6 +1091,7 @@ static void draw_net_in_scope(ivl_signal_t sig)
} else {
/* If this is an isolated word, it uses its
own name. */
assert(word_count == 1);
fprintf(vvp_out, "v%p_%u .net%s%s \"%s\", %d %d, %s;"
" %u drivers%s\n",
sig, iword, vec8, datatype_flag,
@@ -1081,15 +1103,37 @@ static void draw_net_in_scope(ivl_signal_t sig)
nex_data->net = sig;
nex_data->net_word = iword;
} else if (dimensions > 0) {
/* In this case, we have an alias to an existing
signal array. this typically is an instance of
port collapsing that the elaborator combined to
discover that the entire array can be collapsed,
so the word count for the signal and the alias
*must* match. */
assert(word_count == ivl_signal_array_count(nex_data->net));
if (iword == 0) {
fprintf(vvp_out, "v%p .array \"%s\", v%p; Alias to %s\n",
sig, vvp_mangle_name(ivl_signal_basename(sig)),
nex_data->net, ivl_signal_basename(nex_data->net));
}
/* An alias for the individual words? */
#if 0
fprintf(vvp_out, "v%p_%u .alias%s v%p, %d %d, v%p_%u;\n",
sig, iword, datatype_flag, sig,
msb, lsb, nex_data->net, nex_data->net_word);
#endif
} else {
/* Finally, we may have an alias that is a word
connected to another word. Again, this is a
case of port collapsing. */
assert(word_count == 1);
/* Detect that this is an alias of nex_data->net. Create
a different kind of node that refers to the alias
source data instead of holding our own data. */
fprintf(vvp_out, "v%p_0 .alias%s \"%s\", %d %d, v%p_%u;\n",
sig, datatype_flag,
/* For the alias, create a different kind of node
that refers to the alias source data instead of
holding our own data. */
fprintf(vvp_out, "v%p_%u .alias%s \"%s\", %d %d, v%p_%u;\n",
sig, iword, datatype_flag,
vvp_mangle_name(ivl_signal_basename(sig)),
msb, lsb, nex_data->net, nex_data->net_word);
}
@@ -2366,186 +2410,5 @@ int draw_scope(ivl_scope_t net, ivl_scope_t parent)
/*
* $Log: vvp_scope.c,v $
* Revision 1.160 2007/04/12 04:40:37 steve
* nexus vectors of VT_BOOL objects. (ravi@bluespec)
*
* Revision 1.159 2007/04/10 03:40:04 steve
* Allow nexus aliases to array words.
*
* Revision 1.158 2007/04/10 01:26:15 steve
* variable arrays generated without writing a record for each word.
*
* Revision 1.157 2007/04/02 01:12:34 steve
* Seperate arrayness from word count
*
* Revision 1.156 2007/03/22 16:08:18 steve
* Spelling fixes from Larry
*
* Revision 1.155 2007/03/02 06:13:22 steve
* Add support for edge sensitive spec paths.
*
* Revision 1.154 2007/03/01 06:19:39 steve
* Add support for conditional specify delay paths.
*
* Revision 1.153 2007/02/26 19:49:50 steve
* Spelling fixes (larry doolittle)
*
* Revision 1.152 2007/01/17 04:39:18 steve
* Remove dead code related to memories.
*
* Revision 1.151 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.150 2006/11/23 22:42:48 steve
* Do not intertangle modpaths due to references to input nets.
*
* Revision 1.149 2006/11/22 06:09:08 steve
* Get the .event input from the signal instead of the signal input.
*
* Revision 1.148 2006/10/01 23:51:15 steve
* Modpath is input to net, draw .modpath to account.
*
* Revision 1.147 2006/09/23 04:57:19 steve
* Basic support for specify timing.
*
* Revision 1.146 2006/07/30 02:51:36 steve
* Fix/implement signed right shift.
*
* Revision 1.145 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.144 2006/04/22 04:27:36 steve
* Get tail counts right in nested concatenations.
*
* Revision 1.143 2006/04/10 00:37:42 steve
* Add support for generate loops w/ wires and gates.
*
* Revision 1.142 2006/03/18 22:53:38 steve
* Support more parameter syntax.
*
* Revision 1.141 2006/03/15 05:52:20 steve
* Handle multiple part/bi devices connected together.
*
* Revision 1.140 2006/03/08 05:29:42 steve
* Add support for logic parameters.
*
* Revision 1.139 2006/01/02 05:33:20 steve
* Node delays can be more general expressions in structural contexts.
*
* Revision 1.138 2005/11/25 17:55:26 steve
* Put vec8 and vec4 nets into seperate net classes.
*
* Revision 1.137 2005/10/12 17:26:17 steve
* MUX nodes get inputs from nets, not from net inputs,
* Detect and draw alias nodes to reduce net size and
* handle force confusion.
*
* Revision 1.136 2005/10/11 18:54:10 steve
* Remove the $ from signal labels. They do not help.
*
* Revision 1.135 2005/10/11 18:30:50 steve
* Remove obsolete vvp_memory_label function.
*
* Revision 1.134 2005/10/10 04:16:13 steve
* Remove dead dram_input_from_net and lpm_inputs_a_b
*
* Revision 1.133 2005/09/20 18:34:01 steve
* Clean up compiler warnings.
*
* Revision 1.132 2005/08/06 17:58:16 steve
* Implement bi-directional part selects.
*
* Revision 1.131 2005/07/11 16:56:51 steve
* Remove NetVariable and ivl_variable_t structures.
*
* Revision 1.130 2005/07/07 16:22:50 steve
* Generalize signals to carry types.
*
* Revision 1.129 2005/06/17 03:46:52 steve
* Make functors know their own width.
*
* Revision 1.128 2005/05/24 01:44:28 steve
* Do sign extension of structuran nets.
*
* Revision 1.127 2005/05/08 23:44:08 steve
* Add support for variable part select.
*
* Revision 1.126 2005/04/24 23:44:02 steve
* Update DFF support to new data flow.
*
* Revision 1.125 2005/04/06 05:29:09 steve
* Rework NetRamDq and IVL_LPM_RAM nodes.
*
* Revision 1.124 2005/04/04 05:29:53 steve
* Generate the right coes for unconnected UDP port.
*
* Revision 1.123 2005/03/19 06:23:49 steve
* Handle LPM shifts.
*
* Revision 1.122 2005/03/18 02:56:04 steve
* Add support for LPM_UFUNC user defined functions.
*
* Revision 1.121 2005/03/09 05:52:04 steve
* Handle case inequality in netlists.
*
* Revision 1.120 2005/03/09 04:53:40 steve
* Generate code for new form of memory ports.
*
* Revision 1.119 2005/02/13 01:15:07 steve
* Replace supply nets with wires connected to pullup/down supply devices.
*
* Revision 1.118 2005/02/12 22:54:29 steve
* Implement a-b muxes as vector devices
*
* Revision 1.117 2005/02/12 06:25:15 steve
* Draw C4 and C8 constants to account for strength.
*
* Revision 1.116 2005/02/10 04:55:45 steve
* Get the C4 width right for undriven nexa.
*
* Revision 1.115 2005/02/08 00:12:36 steve
* Add the NetRepeat node, and code generator support.
*
* Revision 1.114 2005/02/04 05:13:57 steve
* Support .concat with arbitrary input counts.
*
* Revision 1.113 2005/02/03 04:56:21 steve
* laborate reduction gates into LPM_RED_ nodes.
*
* Revision 1.112 2005/01/22 16:22:13 steve
* LPM_CMP_NE/EQ are vectored devices.
*
* Revision 1.111 2005/01/22 01:06:55 steve
* Change case compare from logic to an LPM node.
*
* Revision 1.110 2005/01/16 04:20:32 steve
* Implement LPM_COMPARE nodes as two-input vector functors.
*
* Revision 1.109 2005/01/12 05:31:50 steve
* More robust input code generation for LPM_ADD.
*
* Revision 1.108 2005/01/12 03:16:35 steve
* More complete drawing of concat inputs.
*
* Revision 1.107 2005/01/10 01:42:59 steve
* Handle concatenations with up to 16 inputs.
*
* Revision 1.106 2005/01/09 20:16:01 steve
* Use PartSelect/PV and VP to handle part selects through ports.
*
* Revision 1.105 2004/12/29 23:52:09 steve
* Generate code for the .concat functors, from NetConcat objects.
* Generate C<> constants of correct widths for functor arguments.
*
* Revision 1.104 2004/12/11 02:31:29 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.103 2004/10/04 01:10:57 steve
* Clean up spurious trailing white space.
*/
+4 -4
View File
@@ -1,14 +1,14 @@
Summary: Icarus Verilog
Name: verilog
Version: 0.9.0.20070608
Version: 0.9.0.20070812
Release: 0
License: GPL
Group: Productivity/Scientific/Electronics
Source: verilog-20070608.tar.gz
Source: verilog-20070812.tar.gz
URL: http://www.icarus.com/eda/verilog/index.html
Packager: Stephen Williams <[email protected]>
BuildRoot: %{_tmppath}/%{name}-%{version}-20070608-%{release}-root
BuildRoot: %{_tmppath}/%{name}-%{version}-20070812-%{release}-root
BuildRequires: gcc-c++, zlib-devel, bison, flex, gperf, readline-devel
@@ -32,7 +32,7 @@ engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.
%prep
%setup -n verilog-20070608
%setup -n verilog-20070812
%build
%ifarch x86_64
+4 -3
View File
@@ -738,13 +738,14 @@ verinum operator + (const verinum&left, const verinum&right)
val_bits[idx] = add_with_carry(lpad, right[idx], carry);
}
val_bits[max] = add_with_carry(lpad, rpad, carry);
#if 0
if (signed_flag) {
val_bits[max] = add_with_carry(lpad, rpad, carry);
if (val_bits[max] != val_bits[max-1])
max += 1;
}
verinum val (val_bits, max, false);
#endif
verinum val (val_bits, max+1, false);
val.has_sign(signed_flag);
delete[]val_bits;
+66 -36
View File
@@ -26,54 +26,84 @@
# include "vpi_user.h"
# include <assert.h>
static PLI_INT32 sys_deposit_calltf(PLI_BYTE8*name)
static PLI_INT32 sys_deposit_compiletf(PLI_BYTE8 *name)
{
vpiHandle sys, argv, target, value;
s_vpi_value val;
vpiHandle callh = vpi_handle(vpiSysTfCall, 0);
vpiHandle argv = vpi_iterate(vpiArgument, callh);
vpiHandle target, value;
/* Check that there are arguments. */
if (argv == 0) {
vpi_printf("ERROR: %s requires two arguments.\n", name);
vpi_control(vpiFinish, 1);
return 0;
}
/* Check that there are at least two arguments. */
target = vpi_scan(argv); /* This should never be zero. */
value = vpi_scan(argv);
if (value == 0) {
vpi_printf("ERROR: %s requires two arguments.\n", name);
vpi_control(vpiFinish, 1);
return 0;
}
assert(target);
/* Check the targets type. It must be a net or a register. */
switch (vpi_get(vpiType, target)) {
case vpiNet:
case vpiReg:
break;
default:
vpi_printf("ERROR: invalid target type for %s.\n", name);
vpi_control(vpiFinish, 1);
return 0;
}
/* Check that there is at most two arguments. */
target = vpi_scan(argv);
if (target != 0) {
vpi_printf("ERROR: %s takes at most two arguments.\n", name);
vpi_control(vpiFinish, 1);
return 0;
}
sys = vpi_handle(vpiSysTfCall, 0);
assert(sys);
argv = vpi_iterate(vpiArgument, sys);
if (!argv)
{
vpi_printf("ERROR: %s requires parameters "
"(target, value)\n", name);
return 0;
}
target = vpi_scan(argv);
assert(target);
value = vpi_scan(argv);
assert(value);
vpi_free_object(argv);
}
val.format = vpiIntVal;
vpi_get_value(value, &val);
static PLI_INT32 sys_deposit_calltf(PLI_BYTE8 *name)
{
vpiHandle callh, argv, target, value;
s_vpi_value val;
callh = vpi_handle(vpiSysTfCall, 0);
argv = vpi_iterate(vpiArgument, callh);
target = vpi_scan(argv);
assert(target);
value = vpi_scan(argv);
assert(value);
val.format = vpiIntVal;
vpi_get_value(value, &val);
switch (vpi_get(vpiType, target))
{
default:
vpi_printf("ERROR: %s invalid target parameter\n", name);
break;
case vpiNet:
case vpiReg:
vpi_put_value(target, &val, 0, vpiNoDelay);
break;
}
return 0;
vpi_free_object(argv);
return 0;
}
void sys_deposit_register()
{
s_vpi_systf_data tf_data;
s_vpi_systf_data tf_data;
tf_data.type = vpiSysTask;
tf_data.tfname = "$deposit";
tf_data.calltf = sys_deposit_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = "$deposit";
vpi_register_systf(&tf_data);
tf_data.type = vpiSysTask;
tf_data.tfname = "$deposit";
tf_data.calltf = sys_deposit_calltf;
tf_data.compiletf = sys_deposit_compiletf;
tf_data.sizetf = 0;
tf_data.user_data = "$deposit";
vpi_register_systf(&tf_data);
}
+6 -54
View File
@@ -724,8 +724,9 @@ static int format_str(vpiHandle scope, unsigned int mcd,
idx = 0;
while (*cp) {
size_t cnt = strcspn(cp, "%\\");
size_t cnt = strcspn(cp, "%");
if (cnt > 0) {
/* String of not-escape characters... */
if (cnt >= sizeof buf)
cnt = sizeof buf - 1;
strncpy(buf, cp, cnt);
@@ -733,9 +734,10 @@ static int format_str(vpiHandle scope, unsigned int mcd,
my_mcd_printf(mcd, "%s", buf);
cp += cnt;
} else if (*cp == '%') {
} else {
int leading_zero = -1, ljust = 1, fsize = -1, ffsize = -1;
assert(*cp == '%');
cp += 1;
if (*cp == '-') {
ljust=-1;
@@ -755,56 +757,6 @@ static int format_str(vpiHandle scope, unsigned int mcd,
argc, argv, idx);
cp += 1;
} else {
cp += 1;
switch (*cp) {
case 0:
break;
case 'n':
my_mcd_printf(mcd, "\n");
cp += 1;
break;
case 't':
my_mcd_printf(mcd, "\t");
cp += 1;
break;
case '\\':
my_mcd_printf(mcd, "\\");
cp += 1;
break;
case '"':
my_mcd_printf(mcd, "\"");
cp += 1;
break;
case '0':
case '1':
case '2':
case '3':
case '4':
case '5':
case '6':
case '7':
if (isdigit(cp[0])
&& isdigit(cp[1])
&& isdigit(cp[2])) {
/* handle octal escapes (e.g. "\015" is CR)*/
my_mcd_printf(mcd, "%c",
(cp[2] - '0') +
8 * ((cp[1] - '0') +
8 * (cp[0] - '0')));
cp += 3;
} else {
my_mcd_printf(mcd, "%c", *cp);
cp += 1;
}
break;
default:
my_mcd_printf(mcd, "%c", *cp);
cp += 1;
}
}
}
@@ -1283,12 +1235,12 @@ static PLI_INT32 sys_timeformat_compiletf(PLI_BYTE8*xx)
if (vpi_get(vpiType, tmp) != vpiConstant) {
vpi_printf("$timeformat's arguments must be");
vpi_printf(" constant.\n");
vpi_control(vpiFinish, -1);
vpi_control(vpiFinish, 1);
}
} else {
vpi_printf("$timeformat requires zero or four");
vpi_printf(" arguments!\n");
vpi_control(vpiFinish, -1);
vpi_control(vpiFinish, 1);
return 0;
}
}
+4 -4
View File
@@ -41,14 +41,14 @@ static PLI_INT32 sys_fopen_compiletf(PLI_BYTE8*name)
if (argv == 0) {
vpi_printf("%s: file name argument missing.\n", name);
vpi_sim_control(vpiFinish, -1);
vpi_control(vpiFinish, 1);
return -1;
}
item = vpi_scan(argv);
if (item == 0) {
vpi_printf("%s: file name argument missing.\n", name);
vpi_sim_control(vpiFinish, -1);
vpi_control(vpiFinish, 1);
return -1;
}
@@ -62,12 +62,12 @@ static PLI_INT32 sys_fopen_compiletf(PLI_BYTE8*name)
if (! is_constant(item)) {
vpi_printf("ERROR: %s mode argument must be a constant\n", name);
vpi_sim_control(vpiFinish, -1);
vpi_control(vpiFinish, 1);
}
if (vpi_get(vpiConstType, item) != vpiStringConst) {
vpi_printf("ERROR: %s mode argument must be a string.\n", name);
vpi_sim_control(vpiFinish, -1);
vpi_control(vpiFinish, 1);
}
item = vpi_scan(argv);
+51 -6
View File
@@ -25,14 +25,59 @@
# include "vpi_user.h"
# include <string.h>
static PLI_INT32 sys_finish_calltf(PLI_BYTE8*name)
static PLI_INT32 sys_finish_compiletf(PLI_BYTE8 *name)
{
if (strcmp((char*)name,"$stop") == 0) {
vpi_sim_control(vpiStop, 0);
vpiHandle callh = vpi_handle(vpiSysTfCall, 0);
vpiHandle argv = vpi_iterate(vpiArgument, callh);
vpiHandle arg;
/* The argument is optional. */
if (argv == 0) return 0;
arg = vpi_scan(argv);
/* A string diagnostic messege level makes no sense. */
if (vpi_get(vpiType, arg) == vpiConstant &&
vpi_get(vpiConstType, arg) == vpiStringConst) {
vpi_printf("Error: %s does not take a string argument.\n", name);
vpi_control(vpiFinish, 1);
return 0;
}
/* These functions take at most one argument (diagnostic message). */
arg = vpi_scan(argv);
if (arg != 0) {
vpi_printf("Error: %s takes at most one argument.\n", name);
vpi_control(vpiFinish, 1);
return 0;
}
/* vpi_scan returning 0 (NULL) has already freed argv. */
return 0;
}
static PLI_INT32 sys_finish_calltf(PLI_BYTE8 *name)
{
vpiHandle callh, argv, arg;
s_vpi_value val;
long diag_msg = 1;
/* Get the argument list and look for the diagnostic message level. */
callh = vpi_handle(vpiSysTfCall, 0);
argv = vpi_iterate(vpiArgument, callh);
if (argv) {
arg = vpi_scan(argv);
vpi_free_object(argv);
val.format = vpiIntVal;
vpi_get_value(arg, &val);
diag_msg = val.value.integer;
}
if (strcmp((char*)name, "$stop") == 0) {
vpi_control(vpiStop, diag_msg);
return 0;
}
vpi_sim_control(vpiFinish, 0);
vpi_control(vpiFinish, diag_msg);
return 0;
}
@@ -43,7 +88,7 @@ void sys_finish_register()
tf_data.type = vpiSysTask;
tf_data.tfname = "$finish";
tf_data.calltf = sys_finish_calltf;
tf_data.compiletf = 0;
tf_data.compiletf = sys_finish_compiletf;
tf_data.sizetf = 0;
tf_data.user_data = (PLI_BYTE8*)"$finish";
vpi_register_systf(&tf_data);
@@ -51,7 +96,7 @@ void sys_finish_register()
tf_data.type = vpiSysTask;
tf_data.tfname = "$stop";
tf_data.calltf = sys_finish_calltf;
tf_data.compiletf = 0;
tf_data.compiletf = sys_finish_compiletf;
tf_data.sizetf = 0;
tf_data.user_data = (PLI_BYTE8*)"$stop";
vpi_register_systf(&tf_data);
+13 -13
View File
@@ -42,7 +42,7 @@ static PLI_INT32 sys_test_plusargs_compiletf(PLI_BYTE8*xx)
if (argv == 0) {
vpi_printf("ERROR: $test$plusargs requires one argument\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
@@ -54,7 +54,7 @@ static PLI_INT32 sys_test_plusargs_compiletf(PLI_BYTE8*xx)
if (vpi_get(vpiConstType, arg) != vpiStringConst) {
vpi_printf("ERROR: Argument of $test$plusargs "
" must be a constant string.\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
break;
@@ -62,7 +62,7 @@ static PLI_INT32 sys_test_plusargs_compiletf(PLI_BYTE8*xx)
default:
vpi_printf("ERROR: Argument of $test$plusargs "
" must be a constant string.\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
@@ -70,7 +70,7 @@ static PLI_INT32 sys_test_plusargs_compiletf(PLI_BYTE8*xx)
arg = vpi_scan(argv);
if (arg != 0) {
vpi_printf("ERROR: too many arguments to $test$plusargs\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
}
return 0;
@@ -134,7 +134,7 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
if (argv == 0) {
vpi_printf("ERROR: $value$plusargs requires two arguments\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
@@ -146,7 +146,7 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
if (vpi_get(vpiConstType, arg) != vpiStringConst) {
vpi_printf("ERROR: First argument of $value$plusargs "
" must be a constant string.\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
break;
@@ -154,7 +154,7 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
default:
vpi_printf("ERROR: First argument of $value$plusargs "
" must be a constant string.\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
break;
}
@@ -168,7 +168,7 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
if (cp == 0) {
vpi_printf("ERROR: Invalid argument format string"
": %s\n", fmt);
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
@@ -187,14 +187,14 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
default:
vpi_printf("ERROR: Invalid argument format string"
": %s\n", fmt);
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
if (*cp != 0) {
vpi_printf("ERROR: Trailing junk after value format"
": %s\n", fmt);
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
}
@@ -202,7 +202,7 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
arg = vpi_scan(argv);
if (argv == 0) {
vpi_printf("ERROR: $value$plusargs requires two arguments\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
@@ -215,14 +215,14 @@ static PLI_INT32 sys_value_plusargs_compiletf(PLI_BYTE8*xx)
default:
vpi_printf("ERROR: value field doesn\'t match format: %s\n",
value.value.str);
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
arg = vpi_scan(argv);
if (arg != 0) {
vpi_printf("ERROR: too many arguments to $value$plusargs\n");
vpi_sim_control(vpiFinish, 1);
vpi_control(vpiFinish, 1);
return 0;
}
+687 -208
View File
File diff suppressed because it is too large Load Diff
+8 -2
View File
@@ -3,5 +3,11 @@
# builtin (system) functions.
#
$random vpiSysFuncInt
$dist_uniform vpiSysFuncInt
$random vpiSysFuncInt
$dist_uniform vpiSysFuncInt
$dist_normal vpiSysFuncInt
$dist_exponential vpiSysFuncInt
$dist_poisson vpiSysFuncInt
$dist_chi_square vpiSysFuncInt
$dist_t vpiSysFuncInt
$dist_erlang vpiSysFuncInt
+2 -2
View File
@@ -305,8 +305,8 @@ extern PLI_INT32 vpi_remove_cb(vpiHandle ref);
* This function allows a vpi application to control the simulation
* engine. The operation parameter specifies the function to
* perform. The remaining parameters (if any) are interpreted by the
* operation. The vpi_sim_control definition was added to P1364-2000
* 14 July 1999. See PLI Task Force ID: PTF-161
* operation. The vpi_sim_control definition (now named vpi_control)
* was added to P1364-2000 14 July 1999. See PLI Task Force ID: PTF-161
*
* vpiFinish - perform the $finish operation, as soon as the user
* function returns. This operation takes a single
+6
View File
@@ -380,6 +380,12 @@ declared seperately, this statement collects them together:
the .var or .net statements after this array statement, that have the
same "name" are collected, in order, as words.
The syntax below is different, in that it creates an alias for an
existing array. The dimensions and storage are taken from the .array
at <src>.
<label> .array "name", <src> ;
MEMORY STATEMENTS:
Memories are arrays of words, each word a vvp_vector4_t vector of the
+36
View File
@@ -465,6 +465,42 @@ void compile_array_port(char*label, char*array, char*addr)
// The input_connect arranges for the array string to be free'ed.
}
void compile_array_alias(char*label, char*name, char*src)
{
vvp_array_t mem = array_find(src);
assert(mem);
struct __vpiArray*obj = (struct __vpiArray*)
malloc(sizeof (struct __vpiArray));
obj->base.vpi_type = &vpip_arraymem_rt;
obj->scope = vpip_peek_current_scope();
obj->name = vpip_name_string(name);
obj->array_count = mem->array_count;
// XXXX Need to set an accurate range of addreses.
vpip_make_dec_const(&obj->first_addr, mem->first_addr.value);
vpip_make_dec_const(&obj->last_addr, mem->last_addr.value);
// Share the words with the source array.
obj->words = mem->words;
obj->ports_ = 0;
assert(array_table);
assert(!array_find(label));
symbol_value_t v;
v.ptr = obj;
sym_set_value(array_table, label, v);
compile_vpi_symbol(label, &obj->base);
vpip_attach_to_current_scope(&obj->base);
free(label);
free(name);
free(src);
}
/*
* $Log: array.cc,v $
* Revision 1.2 2007/04/10 01:26:16 steve
+32
View File
@@ -36,6 +36,7 @@
# include <malloc.h>
#endif
# include <iostream>
# include <list>
# include <stdlib.h>
# include <string.h>
# include <assert.h>
@@ -608,6 +609,16 @@ static void compile_array_lookup(struct vvp_code_s*code, char*label)
resolv_submit(res);
}
static list<struct __vpiSysTaskCall*> scheduled_compiletf;
void compile_compiletf(struct __vpiSysTaskCall*obj)
{
if (obj->defn->info.compiletf == 0)
return;
scheduled_compiletf.push_back(obj);
}
/*
* When parsing is otherwise complete, this function is called to do
* the final stuff. Clean up deferred linking here.
@@ -667,6 +678,24 @@ void compile_cleanup(void)
delete_symbol_table(sym_functors);
sym_functors = 0;
if (verbose_flag) {
fprintf(stderr, " ... Compiletf functions\n");
fflush(stderr);
}
assert(vpi_mode_flag == VPI_MODE_NONE);
vpi_mode_flag = VPI_MODE_COMPILETF;
while (! scheduled_compiletf.empty()) {
struct __vpiSysTaskCall*obj = scheduled_compiletf.front();
scheduled_compiletf.pop_front();
vpip_cur_task = obj;
obj->defn->info.compiletf (obj->defn->info.user_data);
vpip_cur_task = 0;
}
vpi_mode_flag = VPI_MODE_NONE;
}
void compile_vpi_symbol(const char*label, vpiHandle obj)
@@ -1197,6 +1226,9 @@ void compile_resolver(char*label, char*type, unsigned argc, struct symb_s*argv)
if (strcmp(type,"tri") == 0) {
obj = new resolv_functor(vvp_scalar_t(BIT4_Z, 0));
} else if (strncmp(type,"tri$",4) == 0) {
obj = new resolv_functor(vvp_scalar_t(BIT4_Z, 0), strdup(type+4));
} else if (strcmp(type,"tri0") == 0) {
obj = new resolv_functor(vvp_scalar_t(BIT4_0, 5));
+14 -116
View File
@@ -23,6 +23,7 @@
#endif
# include <stdio.h>
# include <fstream>
# include "parse_misc.h"
# include "vpi_user.h"
# include "vvp_net.h"
@@ -44,6 +45,12 @@ extern void compile_cleanup(void);
extern bool verbose_flag;
/*
* If this file opened, then write debug information to this
* file. This is used for debugging the VVP runtime itself.
*/
extern ofstream debug_file;
/*
* Connect a list of symbols to a contiguous set of ipoints.
* Constants C<?> are handled by setting the ival of the ipoint.
@@ -107,6 +114,12 @@ extern void compile_concat(char*label, unsigned w0, unsigned w1,
unsigned w2, unsigned w3,
unsigned argc, struct symb_s*argv);
/*
* Arrange for the system task/function call to have its compiletf
* function called.
*/
extern void compile_compiletf(struct __vpiSysTaskCall*);
/*
* Compile delay nodes of various form.
*/
@@ -251,6 +264,7 @@ extern void compile_real_array(char*label, char*name,
int msb, int lsb);
extern void compile_net_array(char*label, char*name,
int last, int first);
extern void compile_array_alias(char*label, char*name, char*src);
extern void compile_array_port(char*label, char*name, char*addr);
@@ -370,120 +384,4 @@ extern void compile_alias_real(char*label, char*name,
int msb, int lsb,
unsigned argc, struct symb_s*argv);
/*
* $Log: compile.h,v $
* Revision 1.88 2007/04/10 01:26:16 steve
* variable arrays generated without writing a record for each word.
*
* Revision 1.87 2007/03/02 06:13:22 steve
* Add support for edge sensitive spec paths.
*
* Revision 1.86 2007/03/01 06:19:39 steve
* Add support for conditional specify delay paths.
*
* Revision 1.85 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.84 2006/11/22 06:10:05 steve
* Fix spurious event from net8 that is forced.
*
* Revision 1.83 2006/09/23 04:57:19 steve
* Basic support for specify timing.
*
* Revision 1.82 2006/07/30 02:51:36 steve
* Fix/implement signed right shift.
*
* Revision 1.81 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.80 2006/03/18 22:51:10 steve
* Syntax for carrying sign with parameter.
*
* Revision 1.79 2006/03/08 05:29:42 steve
* Add support for logic parameters.
*
* Revision 1.78 2006/01/02 05:32:07 steve
* Require explicit delay node from source.
*
* Revision 1.77 2005/11/25 17:55:26 steve
* Put vec8 and vec4 nets into seperate net classes.
*
* Revision 1.76 2005/10/12 17:23:15 steve
* Add alias nodes.
*
* Revision 1.75 2005/07/14 23:34:19 steve
* gcc4 compile errors.
*
* Revision 1.74 2005/07/06 04:29:25 steve
* Implement real valued signals and arith nodes.
*
* Revision 1.73 2005/06/17 03:46:52 steve
* Make functors know their own width.
*
* Revision 1.72 2005/05/24 01:43:27 steve
* Add a sign-extension node.
*
* Revision 1.71 2005/05/08 23:40:14 steve
* Add support for variable part select.
*
* Revision 1.70 2005/04/28 04:59:53 steve
* Remove dead functor code.
*
* Revision 1.69 2005/04/24 20:07:26 steve
* Add DFF nodes.
*
* Revision 1.68 2005/04/03 05:45:51 steve
* Rework the vvp_delay_t class.
*
* Revision 1.67 2005/04/01 06:02:45 steve
* Reimplement combinational UDPs.
*
* Revision 1.66 2005/03/18 02:56:04 steve
* Add support for LPM_UFUNC user defined functions.
*
* Revision 1.65 2005/03/09 05:52:04 steve
* Handle case inequality in netlists.
*
* Revision 1.64 2005/03/09 04:52:40 steve
* reimplement memory ports.
*
* Revision 1.63 2005/03/03 04:33:10 steve
* Rearrange how memories are supported as vvp_vector4 arrays.
*
* Revision 1.62 2005/02/07 22:42:42 steve
* Add .repeat functor and BIFIF functors.
*
* Revision 1.61 2005/02/03 04:55:13 steve
* Add support for reduction logic gates.
*
* Revision 1.60 2005/01/22 01:06:20 steve
* Implement the .cmp/eeq LPM node.
*
* Revision 1.59 2005/01/09 20:11:15 steve
* Add the .part/pv node and related functionality.
*
* Revision 1.58 2004/12/29 23:45:13 steve
* Add the part concatenation node (.concat).
*
* Add a vvp_event_anyedge class to handle the special
* case of .event statements of edge type. This also
* frees the posedge/negedge types to handle all 4 inputs.
*
* Implement table functor recv_vec4 method to receive
* and process vectors.
*
* Revision 1.57 2004/12/11 02:31:29 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.56 2004/10/04 01:10:59 steve
* Clean up spurious trailing white space.
*
* Revision 1.55 2004/06/30 02:15:57 steve
* Add signed LPM divide.
*/
#endif
+18
View File
@@ -0,0 +1,18 @@
DEBUG AIDS FOR VVP
Debuging vvp can be fiendishly difficult, so there are some built in
debugging aids. These are enabled by setting the environment variable
VVP_DEBUG to the path to an output file. Then, various detailed debug
tools can be enabled as described below.
* .resolv
The .resolv can print debug information along with a label by
specifying the debug output label on the .resolv line:
.resolv tri$<label>
In this case, the "$" character directly after the "tri" enables debug
dumps for this node, and the <label> is the label to prepend to log
messages from this node.
+9
View File
@@ -47,6 +47,8 @@
# include <windows.h>
#endif
ofstream debug_file;
#if defined(__MINGW32__) && !defined(HAVE_GETOPT_H)
extern "C" int getopt(int argc, char*argv[], const char*fmt);
extern "C" int optind;
@@ -205,6 +207,13 @@ int main(int argc, char*argv[])
return -1;
}
/* If the VVP_DEBUG variable is set, then it contains the path
to the vvp debug file. Open it for output. */
if (char*path = getenv("VVP_DEBUG")) {
debug_file.open(path, ios_base::out);
}
design_path = argv[optind];
/* This is needed to get the MCD I/O routines ready for
+3
View File
@@ -196,6 +196,9 @@ statement
| T_LABEL K_ARRAY_PORT T_SYMBOL ',' T_SYMBOL ';'
{ compile_array_port($1, $3, $5); }
| T_LABEL K_ARRAY T_STRING ',' T_SYMBOL ';'
{ compile_array_alias($1, $3, $5); }
/* The .ufunc functor is for implementing user defined functions, or
other thread code that is automatically invoked if any of the
bits in the symbols list change. */
+90 -59
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2005 Stephen Williams (steve@icarus.com)
* Copyright (c) 2005-2007 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -30,12 +30,65 @@
# include <malloc.h>
#endif
class vvp_reduce_and : public vvp_net_fun_t {
/*
* All the reduction operations take a single vector input and produce
* a scalar result. The vvp_reduce_base class codifies these general
* charactoristics, leaving only the calculation of the result for the
* base class.
*/
class vvp_reduce_base : public vvp_net_fun_t {
public:
vvp_reduce_base();
virtual ~vvp_reduce_base();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
void recv_vec4_pv(vvp_net_ptr_t ptr, const vvp_vector4_t&bit,
unsigned base, unsigned wid, unsigned vwid);
virtual vvp_bit4_t calculate_result() const =0;
protected:
vvp_vector4_t bits_;
};
vvp_reduce_base::vvp_reduce_base()
{
}
vvp_reduce_base::~vvp_reduce_base()
{
}
void vvp_reduce_base::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
{
bits_ = bit;
vvp_bit4_t res = calculate_result();
vvp_vector4_t rv (1, res);
vvp_send_vec4(prt.ptr()->out, rv);
}
void vvp_reduce_base::recv_vec4_pv(vvp_net_ptr_t prt, const vvp_vector4_t&bit,
unsigned base, unsigned wid, unsigned vwid)
{
if (bits_.size() == 0) {
bits_ = vvp_vector4_t(vwid);
}
assert(bits_.size() == vwid);
assert(bit.size() == wid);
bits_.set_vec(base, bit);
vvp_bit4_t res = calculate_result();
vvp_vector4_t rv (1, res);
vvp_send_vec4(prt.ptr()->out, rv);
}
class vvp_reduce_and : public vvp_reduce_base {
public:
vvp_reduce_and();
~vvp_reduce_and();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
vvp_bit4_t calculate_result() const;
};
vvp_reduce_and::vvp_reduce_and()
@@ -46,23 +99,22 @@ vvp_reduce_and::~vvp_reduce_and()
{
}
void vvp_reduce_and::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
vvp_bit4_t vvp_reduce_and::calculate_result() const
{
vvp_bit4_t res = BIT4_1;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
res = res & bit.value(idx);
for (unsigned idx = 0 ; idx < bits_.size() ; idx += 1)
res = res & bits_.value(idx);
vvp_vector4_t rv (1, res);
vvp_send_vec4(prt.ptr()->out, rv);
return res;
}
class vvp_reduce_or : public vvp_net_fun_t {
class vvp_reduce_or : public vvp_reduce_base {
public:
vvp_reduce_or();
~vvp_reduce_or();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
vvp_bit4_t calculate_result() const;
};
vvp_reduce_or::vvp_reduce_or()
@@ -73,23 +125,22 @@ vvp_reduce_or::~vvp_reduce_or()
{
}
void vvp_reduce_or::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
vvp_bit4_t vvp_reduce_or::calculate_result() const
{
vvp_bit4_t res = BIT4_0;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
res = res | bit.value(idx);
for (unsigned idx = 0 ; idx < bits_.size() ; idx += 1)
res = res | bits_.value(idx);
vvp_vector4_t rv (1, res);
vvp_send_vec4(prt.ptr()->out, rv);
return res;
}
class vvp_reduce_xor : public vvp_net_fun_t {
class vvp_reduce_xor : public vvp_reduce_base {
public:
vvp_reduce_xor();
~vvp_reduce_xor();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
vvp_bit4_t calculate_result() const;
};
vvp_reduce_xor::vvp_reduce_xor()
@@ -100,23 +151,22 @@ vvp_reduce_xor::~vvp_reduce_xor()
{
}
void vvp_reduce_xor::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
vvp_bit4_t vvp_reduce_xor::calculate_result() const
{
vvp_bit4_t res = BIT4_0;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
res = res ^ bit.value(idx);
for (unsigned idx = 0 ; idx < bits_.size() ; idx += 1)
res = res ^ bits_.value(idx);
vvp_vector4_t rv (1, res);
vvp_send_vec4(prt.ptr()->out, rv);
return res;
}
class vvp_reduce_nand : public vvp_net_fun_t {
class vvp_reduce_nand : public vvp_reduce_base {
public:
vvp_reduce_nand();
~vvp_reduce_nand();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
vvp_bit4_t calculate_result() const;
};
vvp_reduce_nand::vvp_reduce_nand()
@@ -127,23 +177,22 @@ vvp_reduce_nand::~vvp_reduce_nand()
{
}
void vvp_reduce_nand::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
vvp_bit4_t vvp_reduce_nand::calculate_result() const
{
vvp_bit4_t res = BIT4_1;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
res = res & bit.value(idx);
for (unsigned idx = 0 ; idx < bits_.size() ; idx += 1)
res = res & bits_.value(idx);
vvp_vector4_t rv (1, ~res);
vvp_send_vec4(prt.ptr()->out, rv);
return ~res;
}
class vvp_reduce_nor : public vvp_net_fun_t {
class vvp_reduce_nor : public vvp_reduce_base {
public:
vvp_reduce_nor();
~vvp_reduce_nor();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
vvp_bit4_t calculate_result() const;
};
vvp_reduce_nor::vvp_reduce_nor()
@@ -154,23 +203,22 @@ vvp_reduce_nor::~vvp_reduce_nor()
{
}
void vvp_reduce_nor::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
vvp_bit4_t vvp_reduce_nor::calculate_result() const
{
vvp_bit4_t res = BIT4_0;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
res = res | bit.value(idx);
for (unsigned idx = 0 ; idx < bits_.size() ; idx += 1)
res = res | bits_.value(idx);
vvp_vector4_t rv (1, ~res);
vvp_send_vec4(prt.ptr()->out, rv);
return ~res;
}
class vvp_reduce_xnor : public vvp_net_fun_t {
class vvp_reduce_xnor : public vvp_reduce_base {
public:
vvp_reduce_xnor();
~vvp_reduce_xnor();
void recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit);
vvp_bit4_t calculate_result() const;
};
vvp_reduce_xnor::vvp_reduce_xnor()
@@ -181,15 +229,14 @@ vvp_reduce_xnor::~vvp_reduce_xnor()
{
}
void vvp_reduce_xnor::recv_vec4(vvp_net_ptr_t prt, const vvp_vector4_t&bit)
vvp_bit4_t vvp_reduce_xnor::calculate_result() const
{
vvp_bit4_t res = BIT4_0;
for (unsigned idx = 0 ; idx < bit.size() ; idx += 1)
res = res ^ bit.value(idx);
for (unsigned idx = 0 ; idx < bits_.size() ; idx += 1)
res = res ^ bits_.value(idx);
vvp_vector4_t rv (1, ~res);
vvp_send_vec4(prt.ptr()->out, rv);
return ~res;
}
static void make_reduce(char*label, vvp_net_fun_t*red, struct symb_s arg)
@@ -238,19 +285,3 @@ void compile_reduce_xnor(char*label, struct symb_s arg)
vvp_reduce_xnor* reduce = new vvp_reduce_xnor;
make_reduce(label, reduce, arg);
}
/*
* $Log: reduce.cc,v $
* Revision 1.4 2006/05/01 20:47:03 steve
* Forgot to invert nand output.
*
* Revision 1.3 2006/05/01 18:44:08 steve
* Reduce steps to make logic output.
*
* Revision 1.2 2005/06/22 00:04:49 steve
* Reduce vvp_vector4 copies by using const references.
*
* Revision 1.1 2005/02/03 04:55:13 steve
* Add support for reduction logic gates.
*
*/
+11 -37
View File
@@ -22,13 +22,14 @@
# include "resolv.h"
# include "schedule.h"
# include "compile.h"
# include "statistics.h"
# include <iostream>
# include <assert.h>
resolv_functor::resolv_functor(vvp_scalar_t hiz_value)
: hiz_(hiz_value)
resolv_functor::resolv_functor(vvp_scalar_t hiz_value, const char*debug_l)
: hiz_(hiz_value), debug_label_(debug_l)
{
}
@@ -72,11 +73,10 @@ void resolv_functor::recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit)
vvp_vector8_t out (bit);
for (unsigned idx = 0 ; idx < 4 ; idx += 1) {
if (val_[idx].size() == 0)
continue;
if (idx == pdx)
continue;
if (val_[idx].size() == 0)
continue;
out = resolve(out, val_[idx]);
}
@@ -87,43 +87,17 @@ void resolv_functor::recv_vec8(vvp_net_ptr_t port, vvp_vector8_t bit)
}
}
if (debug_label_ && debug_file.is_open())
debug_file << "[" << schedule_simtime() << "] "
<< debug_label_ << ": Resolv out=" << out
<< " in=" << val_[0] << ", " << val_[1]
<< ", " << val_[2] << ", " << val_[3] << endl;
vvp_send_vec8(ptr->out, out);
}
/*
* $Log: resolv.cc,v $
* Revision 1.26 2005/06/22 18:30:12 steve
* Inline more simple stuff, and more vector4_t by const reference for performance.
*
* Revision 1.25 2005/06/22 00:04:49 steve
* Reduce vvp_vector4 copies by using const references.
*
* Revision 1.24 2005/06/15 00:47:15 steve
* Resolv do not propogate inputs that do not change.
*
* Revision 1.23 2005/04/13 06:34:20 steve
* Add vvp driver functor for logic outputs,
* Add ostream output operators for debugging.
*
* Revision 1.22 2005/03/12 04:27:43 steve
* Implement VPI access to signal strengths,
* Fix resolution of ambiguous drive pairs,
* Fix spelling of scalar.
*
* Revision 1.21 2005/02/13 05:26:30 steve
* tri0 and tri1 resolvers must replace HiZ with 0/1 after resolution.
*
* Revision 1.20 2005/01/09 20:11:16 steve
* Add the .part/pv node and related functionality.
*
* Revision 1.19 2004/12/31 06:00:06 steve
* Implement .resolv functors, and stub signals recv_vec8 method.
*
* Revision 1.18 2004/12/11 02:31:30 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
*/
+4 -1
View File
@@ -40,7 +40,7 @@
class resolv_functor : public vvp_net_fun_t {
public:
explicit resolv_functor(vvp_scalar_t hiz_value);
explicit resolv_functor(vvp_scalar_t hiz_value, const char* debug =0);
~resolv_functor();
void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit);
@@ -51,7 +51,10 @@ class resolv_functor : public vvp_net_fun_t {
private:
vvp_vector8_t val_[4];
// Bit value to emit for HiZ bits.
vvp_scalar_t hiz_;
// True if debugging is enabled
const char* debug_label_;
};
/*
+38 -53
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 2001-2007 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -219,6 +219,14 @@ inline void event_time_s::operator delete(void*obj, size_t size)
*/
static struct event_time_s* sched_list = 0;
/*
* This is a list of initialization events. The setup puts
* initializations in this list so that they happen before the
* simulation as a whole starts. This prevents time-0 triggers of
* certain events.
*/
static struct event_s* schedule_init_list = 0;
/*
* This flag is true until a VPI task or function finishes the
* simulation.
@@ -521,6 +529,26 @@ void schedule_set_vector(vvp_net_ptr_t ptr, double bit)
schedule_event_(cur, 0, SEQ_ACTIVE);
}
void schedule_init_vector(vvp_net_ptr_t ptr, vvp_vector4_t bit)
{
struct assign_vector4_event_s*cur = new struct assign_vector4_event_s;
cur->ptr = ptr;
cur->val = bit;
cur->base = 0;
cur->vwid = 0;
cur->next = schedule_init_list;
schedule_init_list = cur;
}
void schedule_init_vector(vvp_net_ptr_t ptr, double bit)
{
struct assign_real_event_s*cur = new struct assign_real_event_s;
cur->ptr = ptr;
cur->val = bit;
cur->next = schedule_init_list;
schedule_init_list = cur;
}
void schedule_generic(vvp_gen_event_t obj, vvp_time64_t delay,
bool sync_flag, bool ro_flag)
{
@@ -575,6 +603,15 @@ void schedule_simulate(void)
// Execute pre-simulation callbacks
vpiPresim();
// Execute initialization events.
while (schedule_init_list) {
struct event_s*cur = schedule_init_list;
schedule_init_list = cur->next;
cur->run_run();
delete cur;
}
signals_capture();
while (schedule_runnable && sched_list) {
@@ -645,57 +682,5 @@ void schedule_simulate(void)
/*
* $Log: schedule.cc,v $
* Revision 1.45 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.44 2006/09/29 16:55:04 steve
* Allow rosync events to create new rosync events.
*
* Revision 1.43 2006/09/29 01:24:34 steve
* rwsync callback fixes from Ben Staveley (with modifications.)
*
* Revision 1.42 2006/08/06 18:17:00 steve
* Fix typo in initialize of new event_time cell.
*
* Revision 1.41 2006/02/02 02:44:00 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.40 2005/09/20 18:34:02 steve
* Clean up compiler warnings.
*
* Revision 1.39 2005/07/06 04:29:25 steve
* Implement real valued signals and arith nodes.
*
* Revision 1.38 2005/06/22 18:30:12 steve
* Inline more simple stuff, and more vector4_t by const reference for performance.
*
* Revision 1.37 2005/06/12 01:10:26 steve
* Remove useless references to functor.h
*
* Revision 1.36 2005/06/09 05:04:45 steve
* Support UDP initial values.
*
* Revision 1.35 2005/06/02 16:02:11 steve
* Add support for notif0/1 gates.
* Make delay nodes support inertial delay.
* Add the %force/link instruction.
*
* Revision 1.34 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.33 2005/03/06 17:25:03 steve
* Remove dead code from scheduler.
*
* Revision 1.32 2005/03/06 17:07:48 steve
* Non blocking assign to memory words.
*
* Revision 1.31 2005/02/12 03:26:14 steve
* Support scheduling vvp_vector8_t objects.
*
* Revision 1.30 2005/01/29 17:53:25 steve
* Use scheduler to initialize constant functor inputs.
*/
+15 -57
View File
@@ -1,7 +1,7 @@
#ifndef __schedule_H
#define __schedule_H
/*
* Copyright (c) 2001-2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 2001-2007 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -67,14 +67,26 @@ extern void schedule_assign_memory_word(vvp_memory_t mem,
vvp_time64_t delay);
/*
* This is very similar to schedule_assign_vector, but generates an
* event in the active queue. It is used at link time to set an initial
* value (a compile time constant) to the input of a functor. This
* event in the active queue. It is used at link time to assign a
* constant value (i.e. C4<...>) to the input of a functor. This
* creates an event in the active queue.
*/
extern void schedule_set_vector(vvp_net_ptr_t ptr, vvp_vector4_t val);
extern void schedule_set_vector(vvp_net_ptr_t ptr, vvp_vector8_t val);
extern void schedule_set_vector(vvp_net_ptr_t ptr, double val);
/*
* The schedule_init_vector function assigns an initial value to a
* functor. The assignment is put into a pre-simulation queue that is
* run before the rest of the simulation runs. This is used to assign
* initial values to variables and have them propagate through the
* net. Doing the init before the rest of the scheduler starts
* prevents threads being triggered by the initialization of the
* variable, but still allows the initial value to be driven
* (propagated as events) through the rest of the net.
*/
extern void schedule_init_vector(vvp_net_ptr_t ptr, vvp_vector4_t val);
extern void schedule_init_vector(vvp_net_ptr_t ptr, double val);
/*
* Create a generic event. This supports scheduled events that are not
@@ -146,58 +158,4 @@ extern unsigned long count_prop_events;
extern unsigned long count_thread_events;
extern unsigned long count_event_pool;
/*
* $Log: schedule.h,v $
* Revision 1.29 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.28 2006/09/29 01:24:34 steve
* rwsync callback fixes from Ben Staveley (with modifications.)
*
* Revision 1.27 2006/02/02 02:44:00 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.26 2005/09/20 18:34:02 steve
* Clean up compiler warnings.
*
* Revision 1.25 2005/07/06 04:29:25 steve
* Implement real valued signals and arith nodes.
*
* Revision 1.24 2005/06/22 18:30:12 steve
* Inline more simple stuff, and more vector4_t by const reference for performance.
*
* Revision 1.23 2005/06/09 05:04:45 steve
* Support UDP initial values.
*
* Revision 1.22 2005/06/02 16:02:11 steve
* Add support for notif0/1 gates.
* Make delay nodes support inertial delay.
* Add the %force/link instruction.
*
* Revision 1.21 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.20 2005/03/06 17:07:48 steve
* Non blocking assign to memory words.
*
* Revision 1.19 2005/02/12 03:26:14 steve
* Support scheduling vvp_vector8_t objects.
*
* Revision 1.18 2005/01/29 17:53:25 steve
* Use scheduler to initialize constant functor inputs.
*
* Revision 1.17 2004/12/11 02:31:30 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.16 2003/09/09 00:56:45 steve
* Reimpelement scheduler to divide nonblocking assign queue out.
*
* Revision 1.15 2003/02/22 02:52:06 steve
* Check for stopped flag in certain strategic points.
*/
#endif
+6 -33
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2005 Stephen Williams (steve@icarus.com)
* Copyright (c) 2005-2007 Stephen Williams (steve@icarus.com)
*
* (This is a rewrite of code that was ...
* Copyright (c) 2001 Stephan Boettcher <stephan@nevis.columbia.edu>)
@@ -223,7 +223,11 @@ void vvp_udp_comb_s::compile_table(char**tab)
cur.mask0 = 0;
cur.mask1 = 0;
cur.maskx = 0;
assert(port_count() <= sizeof(cur.mask0));
if (port_count() > 8*sizeof(cur.mask0)) {
fprintf(stderr, "internal error: primitive port count=%u "
" > %d\n", port_count(), sizeof(cur.mask0));
assert(port_count() <= 8*sizeof(cur.mask0));
}
for (unsigned pp = 0 ; pp < port_count() ; pp += 1) {
unsigned long mask_bit = 1UL << pp;
or_based_on_char(cur, tab[idx][pp], mask_bit);
@@ -939,34 +943,3 @@ void compile_udp_functor(char*label, char*type,
wide_inputs_connect(core, argc, argv);
free(argv);
}
/*
* $Log: udp.cc,v $
* Revision 1.35 2007/03/04 06:26:33 steve
* UDP schedules its output instead of pushing it.
*
* Revision 1.34 2006/05/18 05:13:45 steve
* Synchronous primitives only follow edges.
*
* Revision 1.33 2005/06/11 16:21:08 steve
* UD delays use delay node.
*
* Revision 1.32 2005/06/11 02:04:48 steve
* Handle all edge types of a synchronous UDP.
*
* Revision 1.31 2005/06/09 05:04:45 steve
* Support UDP initial values.
*
* Revision 1.30 2005/06/09 04:12:30 steve
* Support sequential UDP devices.
*
* Revision 1.29 2005/04/04 05:13:59 steve
* Support row level wildcards.
*
* Revision 1.28 2005/04/03 05:45:51 steve
* Rework the vvp_delay_t class.
*
* Revision 1.27 2005/04/01 06:02:45 steve
* Reimplement combinational UDPs.
*
*/
+16
View File
@@ -125,6 +125,16 @@ static void string_value(vpiHandle ref, p_vpi_value vp)
assert(0);
break;
case vpiIntVal:
vp->value.integer = 0;
for(int i=0; i<size;i ++){
for(int bit=7;bit>=0; bit--){
vp->value.integer <<= 1;
vp->value.integer += (rfp->value[i]>>bit)&1;
}
}
break;
default:
fprintf(stderr, "ERROR (vpi_const.cc): vp->format: %d\n", vp->format);
assert(0);
@@ -168,6 +178,12 @@ static const struct __vpirt vpip_string_temp_rt = {
free_temp_string
};
/*
* Strings are described at the level of the vvp source as a string
* with literal characters or octal escapes. No other escapes are
* included, they are processed already by the compiler that generated
* the vvp source.
*/
static void vpip_process_string(struct __vpiStringConst*obj)
{
char*chr = obj->value;
+6 -2
View File
@@ -833,13 +833,17 @@ extern "C" PLI_INT32 vpi_flush(void)
extern "C" void vpi_sim_vcontrol(int operation, va_list ap)
{
long diag_msg;
switch (operation) {
case vpiFinish:
schedule_finish(0);
diag_msg = va_arg(ap, long);
schedule_finish(diag_msg);
break;
case vpiStop:
schedule_stop(0);
diag_msg = va_arg(ap, long);
schedule_stop(diag_msg);
break;
default:
+8 -117
View File
@@ -262,9 +262,12 @@ static unsigned signal_width(const struct __vpiSignal*rfp)
static void signal_get_IntVal(struct __vpiSignal*rfp, s_vpi_value*vp)
{
unsigned wid = signal_width(rfp);
unsigned iwid = 8 * sizeof vp->value.integer;
vvp_fun_signal_vec*vsig = dynamic_cast<vvp_fun_signal_vec*>(rfp->node->fun);
assert(wid <= 8 * sizeof vp->value.integer);
if (wid > iwid) {
wid = iwid;
}
vp->value.integer = 0;
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
@@ -344,6 +347,7 @@ static void signal_get_StrengthVal(struct __vpiSignal*rfp, s_vpi_value*vp)
}
}
vp->value.strength = op;
}
/*
@@ -696,6 +700,9 @@ static struct __vpiSignal* allocate_vpiSignal(void)
/*
* Construct a vpiNet object. Give the object specified dimensions,
* and point to the specified functor for the lsb.
*
* The name is the PLI name for the object. If it is nil, then this is
* actually the word of an array and has no name of its own.
*/
vpiHandle vpip_make_net(const char*name, int msb, int lsb,
bool signed_flag, vvp_net_t*node)
@@ -715,119 +722,3 @@ vpiHandle vpip_make_net(const char*name, int msb, int lsb,
return &obj->base;
}
/*
* $Log: vpi_signal.cc,v $
* Revision 1.76 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.75 2006/12/09 19:06:53 steve
* Handle vpiRealVal reads of signals, and real anyedge events.
*
* Revision 1.74 2006/02/21 05:31:54 steve
* Put strings for reg objects.
*
* Revision 1.73 2006/02/21 02:39:27 steve
* Support string values for memory words.
*
* Revision 1.72 2005/11/30 00:42:14 steve
* vpi_signal supports vvp_fun_signal_vec types.
*
* Revision 1.71 2005/11/25 17:55:26 steve
* Put vec8 and vec4 nets into seperate net classes.
*
* Revision 1.70 2005/09/21 01:04:59 steve
* Support put_value of string values.
*
* Revision 1.69 2005/07/14 23:34:19 steve
* gcc4 compile errors.
*
* Revision 1.68 2005/06/13 00:54:04 steve
* More unified vec4 to hex string functions.
*
* Revision 1.67 2005/06/12 01:10:26 steve
* Remove useless references to functor.h
*
* Revision 1.66 2005/04/13 06:34:20 steve
* Add vvp driver functor for logic outputs,
* Add ostream output operators for debugging.
*
* Revision 1.65 2005/03/12 04:27:43 steve
* Implement VPI access to signal strengths,
* Fix resolution of ambiguous drive pairs,
* Fix spelling of scalar.
*
* Revision 1.64 2005/03/03 04:33:10 steve
* Rearrange how memories are supported as vvp_vector4 arrays.
*
* Revision 1.63 2004/12/11 02:31:30 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.62 2004/05/19 03:26:25 steve
* Support delayed/non-blocking assignment to reals and others.
*
* Revision 1.61 2004/03/09 03:11:02 steve
* Get vpiModule of signals.
*
* Revision 1.60 2004/02/20 01:52:25 steve
* vpiStringVal does not include leading nulls.
*
* Revision 1.59 2004/02/19 21:31:59 steve
* vpiStringVal writes need to set all the bits of a reg.
*
* Revision 1.58 2003/08/15 18:23:56 steve
* vpiIntVal treats x and z bits as 0.
*
* Revision 1.57 2003/06/04 01:56:20 steve
* 1) Adds configure logic to clean up compiler warnings
* 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
* tf_isetrealdelay, acc_handle_scope
* 3) makes acc_next reentrant
* 4) adds basic vpiWire type support
* 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
* 6) add vpiLeftRange/RigthRange to signals
*
* Revision 1.56 2003/05/02 04:29:57 steve
* Add put_value with transport delay.
*
* Revision 1.55 2003/04/12 18:56:57 steve
* Add vpoiScalarVal support for signals.
*
* Revision 1.54 2003/03/06 04:32:00 steve
* Use hashed name strings for identifiers.
*
* Revision 1.53 2003/02/16 23:40:05 steve
* Permanent allocate vpiSignals more efficiently.
*
* Revision 1.52 2003/02/09 23:33:26 steve
* Spelling fixes.
*
* Revision 1.51 2003/01/07 18:07:50 steve
* Allocate res-buf in bigger chunks
*
* Revision 1.50 2002/11/25 23:33:45 steve
* Support put of vpiStringVal to signals.
*
* Revision 1.49 2002/09/11 16:06:57 steve
* Fix wrecked rbuf in vpi_get_str of signals and memories.
*
* Revision 1.48 2002/09/10 02:27:11 steve
* Actually set strength pointer when getting strength val.
*
* Revision 1.47 2002/09/06 04:56:29 steve
* Add support for %v is the display system task.
* Change the encoding of H and L outputs from
* the bufif devices so that they are logic x.
*
* Revision 1.46 2002/08/12 01:35:09 steve
* conditional ident string using autoconfig.
*
* Revision 1.45 2002/07/23 15:11:41 steve
* integral type/ptrdiff_t warning.
*/
+2 -132
View File
@@ -27,6 +27,7 @@
*/
# include "vpi_priv.h"
# include "vthread.h"
# include "compile.h"
# include <stdio.h>
#ifdef HAVE_MALLOC_H
# include <malloc.h>
@@ -544,16 +545,7 @@ vpiHandle vpip_build_vpi_call(const char*name, unsigned vbit, int vwid,
obj->fnet = fnet;
obj->userdata = 0;
/* If there is a compiletf function, call it here. */
if (obj->defn->info.compiletf) {
assert(vpi_mode_flag == VPI_MODE_NONE);
vpi_mode_flag = VPI_MODE_COMPILETF;
vpip_cur_task = obj;
obj->defn->info.compiletf (obj->defn->info.user_data);
vpip_cur_task = 0;
vpi_mode_flag = VPI_MODE_NONE;
}
compile_compiletf(obj);
return &obj->base;
}
@@ -630,125 +622,3 @@ void* vpi_get_userdata(vpiHandle ref)
return rfp->userdata;
}
/*
* $Log: vpi_tasks.cc,v $
* Revision 1.35 2007/04/12 04:45:53 steve
* Support for vpi_get_value of scaler values. (ravi@bluespec)
*
* Revision 1.34 2007/04/12 04:33:39 steve
* Add support for vpiSize on system task handle. (ravi@bluespec.com)
*
* Revision 1.33 2006/09/22 22:33:00 steve
* Correct return code for vpi_put_userdata.
*
* Revision 1.32 2006/06/18 04:15:50 steve
* Add support for system functions in continuous assignments.
*
* Revision 1.31 2005/09/20 18:34:02 steve
* Clean up compiler warnings.
*
* Revision 1.30 2005/08/29 02:38:50 steve
* Eliminate int to vvp_bit4_t casts.
*
* Revision 1.29 2004/10/04 01:10:59 steve
* Clean up spurious trailing white space.
*
* Revision 1.28 2004/06/30 03:00:36 steve
* Some explination of vpi_func arguments.
*
* Revision 1.27 2004/05/19 03:30:46 steve
* Support delayed/non-blocking assignment to reals and others.
*
* Revision 1.26 2004/02/18 02:51:59 steve
* Fix type mismatches of various VPI functions.
*
* Revision 1.25 2003/12/07 20:05:56 steve
* Ducument lxt2 access.
*
* Revision 1.24 2003/06/18 00:54:28 steve
* Account for all 64 bits in results of $time.
*
* Revision 1.23 2003/03/14 05:00:44 steve
* Support vpi_get of vpiTimeUnit.
*
* Revision 1.22 2003/03/13 05:07:10 steve
* signed/unsigned warnings.
*
* Revision 1.21 2003/03/07 02:44:14 steve
* Support vector put of function return values.
*
* Revision 1.20 2003/03/03 03:27:35 steve
* Support vpiName for system task/function calls.
*
* Revision 1.19 2003/01/27 00:14:37 steve
* Support in various contexts the $realtime
* system task.
*
* Revision 1.18 2003/01/09 04:09:44 steve
* Add vpi_put_userdata
*
* Revision 1.17 2002/12/21 00:55:58 steve
* The $time system task returns the integer time
* scaled to the local units. Change the internal
* implementation of vpiSystemTime the $time functions
* to properly account for this. Also add $simtime
* to get the simulation time.
*
* Revision 1.16 2002/08/12 01:35:09 steve
* conditional ident string using autoconfig.
*
* Revision 1.15 2002/06/02 19:05:50 steve
* Check for null pointers from users.
*
* Revision 1.14 2002/05/18 02:34:11 steve
* Add vpi support for named events.
*
* Add vpi_mode_flag to track the mode of the
* vpi engine. This is for error checking.
*
* Revision 1.13 2002/05/09 03:34:31 steve
* Handle null time and calltf pointers.
*
* Revision 1.12 2002/05/03 15:44:11 steve
* Add vpiModule iterator to vpiScope objects.
*
* Revision 1.11 2002/04/07 02:34:10 steve
* Set vpip_cur_task while calling compileft
*
* Revision 1.10 2001/09/15 18:27:05 steve
* Make configure detect malloc.h
*
* Revision 1.9 2001/08/03 06:50:44 steve
* Detect system function used as a task.
*
* Revision 1.8 2001/06/25 03:12:06 steve
* Give task/function definitions a vpi type object.
*
* Revision 1.7 2001/05/20 00:46:12 steve
* Add support for system function calls.
*
* Revision 1.6 2001/05/10 00:26:53 steve
* VVP support for memories in expressions,
* including general support for thread bit
* vectors as system task parameters.
* (Stephan Boettcher)
*
* Revision 1.5 2001/04/18 04:21:23 steve
* Put threads into scopes.
*
* Revision 1.4 2001/03/22 22:38:14 steve
* Detect undefined system tasks at compile time.
*
* Revision 1.3 2001/03/18 04:35:18 steve
* Add support for string constants to VPI.
*
* Revision 1.2 2001/03/18 00:37:55 steve
* Add support for vpi scopes.
*
* Revision 1.1 2001/03/16 01:44:34 steve
* Add structures for VPI support, and all the %vpi_call
* instruction. Get linking of VPI modules to work.
*
*/
+7 -212
View File
@@ -868,9 +868,9 @@ bool of_CMPS(vthread_t thr, vvp_code_t cp)
/* Correct the lt bit to account for the sign of the parameters. */
if (lt != BIT4_X) {
/* If both numbers are negative, then switch the
direction of the lt. */
if ((sig1 == BIT4_1) && (sig2 == BIT4_1) && (eq != BIT4_0))
/* If both numbers are negative (and not equal) then
switch the direction of the lt. */
if ((sig1 == BIT4_1) && (sig2 == BIT4_1) && (eq != BIT4_1))
lt = ~lt;
/* If the first is negative and the last positive, then
@@ -2118,6 +2118,10 @@ bool of_LOAD_VEC(vthread_t thr, vvp_code_t cp)
/* For the %load to work, the functor must actually be a
signal functor. Only signals save their vector value. */
vvp_fun_signal_vec*sig = dynamic_cast<vvp_fun_signal_vec*> (net->fun);
if (sig == 0) {
cerr << "%%load/v error: Net arg not a vector signal? "
<< typeid(*net->fun).name() << endl;
}
assert(sig);
vvp_vector4_t sig_value = sig->vec4_value();
@@ -3489,214 +3493,5 @@ bool of_JOIN_UFUNC(vthread_t thr, vvp_code_t cp)
/*
* $Log: vthread.cc,v $
* Revision 1.166 2007/06/13 01:03:57 steve
* Detect and use the nan function.
*
* Revision 1.165 2007/06/12 02:36:58 steve
* handle constant inf values.
*
* Revision 1.164 2007/06/07 03:20:16 steve
* Properly handle signed conversion to real
*
* Revision 1.163 2007/06/05 21:52:22 steve
* int vs long expressions on 64bit arch (ldoolitt)
*
* Revision 1.162 2007/04/14 04:43:02 steve
* Finish up part select of array words.
*
* Revision 1.161 2007/02/14 05:58:14 steve
* Add the mov/wr opcode.
*
* Revision 1.160 2007/02/05 01:08:10 steve
* Handle relink of continuous assignment.
*
* Revision 1.159 2007/01/31 22:28:55 steve
* Fix missing check for thread bits width in ADDI
*
* Revision 1.158 2007/01/16 05:44:16 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.157 2006/10/05 01:23:54 steve
* Handle non-constant delays on indexed non-blocking assignments.
*
* Revision 1.156 2006/08/09 05:19:08 steve
* Add support for real valued modulus.
*
* Revision 1.155 2006/08/08 05:11:37 steve
* Handle 64bit delay constants.
*
* Revision 1.154 2006/08/04 04:37:37 steve
* Support release of a for/linked reg.
*
* Revision 1.153 2006/04/27 04:38:00 steve
* schedule takes relative, not absolute, time.
*
* Revision 1.152 2006/02/02 05:48:45 steve
* real-to-integer conversions round, not truncate.
*
* Revision 1.151 2006/02/02 02:44:00 steve
* Allow part selects of memory words in l-values.
*
* Revision 1.150 2005/11/26 17:16:05 steve
* Force instruction that can be indexed.
*
* Revision 1.149 2005/11/25 17:55:26 steve
* Put vec8 and vec4 nets into seperate net classes.
*
* Revision 1.148 2005/09/19 21:45:37 steve
* Spelling patches from Larry.
*
* Revision 1.147 2005/09/17 04:01:02 steve
* Add the load/v.p instruction.
*
* Revision 1.146 2005/09/14 02:50:07 steve
* Add word integer compares.
*
* Revision 1.145 2005/08/30 00:49:21 steve
* minor correction to address check in of_MOV1XZ
*
* Revision 1.144 2005/08/29 04:46:13 steve
* Minor cleanup.
*
* Revision 1.143 2005/08/27 03:28:57 steve
* Fix bit destination address in of_AND
*
* Revision 1.142 2005/08/27 02:34:42 steve
* Bring threads into the vvp_vector4_t structure.
*
* Revision 1.141 2005/06/26 01:57:22 steve
* Make bit masks of vector4_t 64bit aware.
*
* Revision 1.140 2005/06/19 18:42:00 steve
* Optimize the LOAD_VEC implementation.
*
* Revision 1.139 2005/06/14 01:44:10 steve
* Add the assign_v0_d instruction.
*
* Revision 1.138 2005/06/12 01:25:27 steve
* Remove useless references to functor.h
*
* Revision 1.137 2005/06/02 16:02:11 steve
* Add support for notif0/1 gates.
* Make delay nodes support inertial delay.
* Add the %force/link instruction.
*
* Revision 1.136 2005/05/17 20:51:06 steve
* Clean up instruction type reverences to bits.
*
* Revision 1.135 2005/05/07 03:15:42 steve
* Implement non-blocking part assign.
*
* Revision 1.134 2005/05/01 22:05:21 steve
* Add cassign/link instruction.
*
* Revision 1.133 2005/03/22 05:18:34 steve
* The indexed set can write a vector, not just a bit.
*
* Revision 1.132 2005/03/06 17:07:48 steve
* Non blocking assign to memory words.
*
* Revision 1.131 2005/03/05 05:45:18 steve
* Check that lead.mv vector width matches word.
*
* Revision 1.130 2005/03/03 04:33:10 steve
* Rearrange how memories are supported as vvp_vector4 arrays.
*
* Revision 1.129 2005/02/14 01:50:23 steve
* Signals may receive part vectors from %set/x0
* instructions. Re-implement the %set/x0 to do
* just that. Remove the useless %set/x0/x instruction.
*
* Revision 1.128 2005/02/12 06:13:22 steve
* Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values.
*
* Revision 1.127 2005/01/28 05:34:25 steve
* Add vector4 implementation of .arith/mult.
*
* Revision 1.126 2005/01/22 00:58:22 steve
* Implement the %load/x instruction.
*
* Revision 1.125 2004/12/17 04:47:47 steve
* Replace single release with release/net and release/reg.
*
* Revision 1.124 2004/12/15 17:17:42 steve
* Add the force/v instruction.
*
* Revision 1.123 2004/12/11 02:31:30 steve
* Rework of internals to carry vectors through nexus instead
* of single bits. Make the ivl, tgt-vvp and vvp initial changes
* down this path.
*
* Revision 1.122 2004/10/04 01:11:00 steve
* Clean up spurious trailing white space.
*
* Revision 1.121 2004/06/19 16:17:02 steve
* Watch type of mak bit matches masked value.
*
* Revision 1.120 2004/06/19 15:52:53 steve
* Add signed modulus operator.
*
* Revision 1.119 2004/06/04 23:26:34 steve
* Pick sign bit from the right place in the exponent number.
*
* Revision 1.118 2004/05/19 03:26:25 steve
* Support delayed/non-blocking assignment to reals and others.
*
* Revision 1.117 2003/11/10 20:19:32 steve
* Include config.h
*
* Revision 1.116 2003/09/26 02:15:15 steve
* Slight performance tweaks of scheduler.
*
* Revision 1.115 2003/09/01 04:03:38 steve
* 32bit vs 64bit handling in SUBI.
*
* Revision 1.114 2003/08/01 00:58:03 steve
* Initialize allocated memory.
*
* Revision 1.113 2003/07/21 02:39:15 steve
* Overflow of unsigned when calculating unsigned long value.
*
* Revision 1.112 2003/07/03 20:03:36 steve
* Remove the vvp_cpoint_t indirect code pointer.
*
* Revision 1.111 2003/06/18 03:55:19 steve
* Add arithmetic shift operators.
*
* Revision 1.110 2003/06/17 21:28:59 steve
* Remove short int restrictions from vvp opcodes. (part 2)
*
* Revision 1.109 2003/06/17 19:17:42 steve
* Remove short int restrictions from vvp opcodes.
*
* Revision 1.108 2003/05/26 04:44:54 steve
* Add the set/x0/x instruction.
*
* Revision 1.107 2003/05/07 03:39:12 steve
* ufunc calls to functions can have scheduling complexities.
*
* Revision 1.106 2003/03/28 02:33:57 steve
* Add support for division of real operands.
*
* Revision 1.105 2003/03/13 04:36:57 steve
* Remove the obsolete functor delete functions.
*
* Revision 1.104 2003/02/27 20:36:29 steve
* Add the cvt/vr instruction.
*
* Revision 1.103 2003/02/22 06:26:58 steve
* When checking for stop, remember to reschedule.
*
* Revision 1.102 2003/02/22 02:52:06 steve
* Check for stopped flag in certain strategic points.
*
* Revision 1.101 2003/02/09 23:33:26 steve
* Spelling fixes.
*
* Revision 1.100 2003/02/06 17:41:47 steve
* Add the %sub/wr instruction.
*/
+16 -5
View File
@@ -1368,11 +1368,12 @@ void vvp_net_fun_t::recv_vec4(vvp_net_ptr_t, const vvp_vector4_t&)
assert(0);
}
void vvp_net_fun_t::recv_vec4_pv(vvp_net_ptr_t, const vvp_vector4_t&,
unsigned, unsigned, unsigned)
void vvp_net_fun_t::recv_vec4_pv(vvp_net_ptr_t, const vvp_vector4_t&bits,
unsigned base, unsigned wid, unsigned vwid)
{
fprintf(stderr, "internal error: %s: recv_vec4_pv not implemented\n",
typeid(*this).name());
cerr << "internal error: " << typeid(*this).name() << ": "
<< "recv_vect_pv(" << bits << ", " << base
<< ", " << wid << ", " << vwid << ") not implemented" << endl;
assert(0);
}
@@ -1760,12 +1761,22 @@ double vvp_fun_signal_real::real_value() const
return bits_;
}
/*
* Testing for equality, we want a bitwise test instead of an
* arithmetic test because we want to treat for example -0 different
* from +0.
*/
bool bits_equal(double a, double b)
{
return memcmp(&a, &b, sizeof a) == 0;
}
void vvp_fun_signal_real::recv_real(vvp_net_ptr_t ptr, double bit)
{
switch (ptr.port()) {
case 0:
if (!continuous_assign_active_) {
if (needs_init_ || (bits_ != bit)) {
if (needs_init_ || !bits_equal(bits_,bit)) {
bits_ = bit;
needs_init_ = false;
vvp_send_real(ptr.ptr()->out, bit);
+9 -38
View File
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2003 Stephen Williams (steve@icarus.com)
* Copyright (c) 2003-2007 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@@ -23,6 +23,7 @@
# include "compile.h"
# include "vpi_priv.h"
# include "array.h"
# include "schedule.h"
# include <stdio.h>
# include <stdlib.h>
# include <string.h>
@@ -48,6 +49,7 @@ static void __compile_var_real(char*label, char*name,
if (name) {
assert(!array);
vpip_attach_to_current_scope(obj);
schedule_init_vector(vvp_net_ptr_t(net,0), fun->real_value());
}
if (array) {
assert(!name);
@@ -95,6 +97,7 @@ static void __compile_var(char*label, char*name,
if (name) {
assert(!array);
vpip_attach_to_current_scope(obj);
schedule_init_vector(vvp_net_ptr_t(node,0), vsig->vec4_value());
}
// If this is an array word, then it does not have a name, and
// it is attached to the addressed array.
@@ -165,10 +168,14 @@ static void __compile_net(char*label, char*name,
/* Make the vpiHandle for the reg. */
vpiHandle obj = vpip_make_net(name, msb, lsb, signed_flag, node);
/* This attaches the label to the vpiHandle */
compile_vpi_symbol(label, obj);
vpip_attach_to_current_scope(obj);
/* If this is an array word, then attach it to the
array. Otherwise, attach it to the current scope. */
if (array)
array_attach_word(array, array_addr, obj);
else
vpip_attach_to_current_scope(obj);
free(label);
if (name) free(name);
@@ -265,39 +272,3 @@ void compile_alias_real(char*label, char*name, int msb, int lsb,
free(argv[0].text);
free(argv);
}
/*
* $Log: words.cc,v $
* Revision 1.9 2007/04/10 01:26:16 steve
* variable arrays generated without writing a record for each word.
*
* Revision 1.8 2007/01/16 05:44:17 steve
* Major rework of array handling. Memories are replaced with the
* more general concept of arrays. The NetMemory and NetEMemory
* classes are removed from the ivl core program, and the IVL_LPM_RAM
* lpm type is removed from the ivl_target API.
*
* Revision 1.7 2005/11/27 16:47:14 steve
* Fix type safety warning from gcc.
*
* Revision 1.6 2005/11/25 17:55:26 steve
* Put vec8 and vec4 nets into seperate net classes.
*
* Revision 1.5 2005/10/12 17:28:07 steve
* Fix compile of net/real aliases.
*
* Revision 1.4 2005/10/12 17:23:16 steve
* Add alias nodes.
*
* Revision 1.3 2005/07/06 04:29:25 steve
* Implement real valued signals and arith nodes.
*
* Revision 1.2 2003/02/11 05:20:45 steve
* Include vpiRealVar objects in vpiVariables scan.
*
* Revision 1.1 2003/01/25 23:48:06 steve
* Add thread word array, and add the instructions,
* %add/wr, %cmp/wr, %load/wr, %mul/wr and %set/wr.
*
*/