b658a3b41f
Missing PSpec.cc file.
2006-09-26 19:48:40 +00:00
0edb5a7547
Basic support for specify timing.
2006-09-23 04:57:19 +00:00
0e2c6544b9
Proper error message when logic array pi count is bad.
2006-09-22 22:14:27 +00:00
fc0695beb6
Handle 64bit delay constants.
2006-08-08 05:11:37 +00:00
71faebd6df
Make elaborate_expr methods aware of the width that the context
...
requires of it. In the process, fix sizing of the width of unary
minus is context determined sizes.
2006-06-02 04:48:49 +00:00
a8b86ea3bb
More explicit datatype setup.
2006-05-01 20:47:58 +00:00
0c9fb766b6
Get the data type of part select results right.
2006-04-30 05:17:48 +00:00
4493e3f928
Chop down assign r-values that elaborate too wide.
2006-04-26 04:43:50 +00:00
f001d0001a
Add support for generate loops w/ wires and gates.
2006-04-10 00:37:42 +00:00
e8efa6df53
Fix instance arrays indexed by overridden parameters.
2006-03-30 01:49:07 +00:00
368c27c9e4
Handle complex net node delays.
2006-01-03 05:22:14 +00:00
58f182a159
Node delays can be more general expressions in structural contexts.
2006-01-02 05:33:19 +00:00
0e044d6684
More precise about r-value width of constants.
2005-11-26 00:35:42 +00:00
c02b3b8ac6
Reorganize signal part select handling, and add support for
...
indexed part selects.
Expand expression constant propagation to eliminate extra
sums in certain cases.
2005-11-10 13:28:11 +00:00
16dc3ab4d4
Error message for invalid for-loop index variable.
2005-09-27 04:51:37 +00:00
9fd16575d9
Support bool expressions and compares handle them optimally.
2005-09-14 02:53:13 +00:00
4a8be3db9c
Implement bi-directional part selects.
2005-08-06 17:58:16 +00:00
bc9f286954
More debug information.
2005-07-15 00:41:09 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
657ac8168e
Debug messages.
2005-06-17 05:06:47 +00:00
739a1839ed
Do sign extension of structuran nets.
2005-05-24 01:44:27 +00:00
7796c8bcfb
Parameters cannot have their width changed.
2005-05-17 20:56:55 +00:00
adbe734b6c
Some debug messages.
2005-05-13 05:12:39 +00:00
365cfedd55
Update DFF support to new data flow.
2005-04-24 23:44:01 +00:00
4ccbb4f0b2
Get rval width right for arguments into task calls.
2005-03-05 05:38:33 +00:00
257e1f9516
Support shifts and divide.
2005-02-19 02:43:38 +00:00
55b5bf9d39
distinguish between single port namy instances, and single instances many sub-ports.
2005-02-10 04:56:58 +00:00
ee5bb5fcaf
Add the NetRepeat node, and code generator support.
2005-02-08 00:12:36 +00:00
c23a35a033
Debug messages for PGAssign elaboration.
2005-01-30 01:42:05 +00:00
25de448d34
Remove obsolete NetSubnet class.
2005-01-22 18:16:00 +00:00
4d139b58aa
Properly pad vector widths in pgassign.
2005-01-12 03:17:36 +00:00
9e94afe399
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 20:16:00 +00:00
8f2d679c8a
Unify elaboration of l-values for all proceedural assignments,
...
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
3947d7dd33
Force r-value padded to width.
2004-12-15 17:09:11 +00:00
d19e76a193
Fix r-value width of continuous assign.
2004-12-12 18:13:39 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
c10e572091
Support degenerat wait statements.
2004-09-05 21:07:26 +00:00
9de786fc44
Add support for module instance arrays.
2004-09-05 17:44:41 +00:00
8bf434754f
Propagate source line number in synthetic delay statements.
2004-06-30 15:32:02 +00:00
76c0fe459c
Only pad the width of vector r-values.
2004-06-20 15:59:06 +00:00
9949040285
Add support for the default_nettype directive.
2004-06-13 04:56:53 +00:00
5472b27e1f
Rewire/generalize parsing an elaboration of
...
function return values to allow for better
speed and more type support.
2004-05-31 23:34:36 +00:00
55ba131997
Handle wait with constant-false expression.
2004-05-25 03:42:58 +00:00
c6453a0854
primitive ports can bind bi name.
2004-03-08 00:47:44 +00:00
413932e406
Verilog2001 new style port declartions for primitives.
2004-03-08 00:10:29 +00:00
9531920685
MOre thorough use of elab_and_eval function.
2004-03-07 20:04:10 +00:00
177b6ffb6a
Addtrbute keys are perm_strings.
2004-02-20 18:53:33 +00:00
27af95d402
Use perm_strings for named langiage items.
2004-02-18 17:11:54 +00:00
6a02613fca
Get rid of useless warning.
2004-01-21 04:35:03 +00:00
e617e4a98c
Handle wide expressions in wait condition.
2004-01-13 03:42:49 +00:00
ee172bdccf
Attach line number information to for loop parts.
2003-10-26 04:49:51 +00:00
39b2928ad8
Summary list of missing modules.
2003-09-25 00:25:14 +00:00
6abe797963
Evaluate nb-assign r-values using elab_and_eval.
2003-09-20 06:08:53 +00:00
94a71fdee8
Evaluate gate array index constants using elab_and_eval.
2003-09-20 06:00:37 +00:00
1f0c274e82
Obsolete find_symbol and find_event from the Design class.
2003-09-20 01:05:35 +00:00
178847fc53
Spelling fixes.
2003-09-13 01:01:51 +00:00
cee34f8a8a
Support time0 resolution of combinational threads.
2003-09-04 20:28:05 +00:00
7c1401a2ba
Spelling patch.
2003-08-28 04:11:17 +00:00
c96598a429
Primitive outputs have same limitations as continuous assignment.
2003-08-05 03:01:58 +00:00
004ecd08dd
Elide empty begin-end in conditionals.
2003-07-02 04:19:16 +00:00
61195c5daa
Harmless fixup of warnings.
2003-06-21 01:21:42 +00:00
b43c543455
Handle assign of real to vector.
2003-06-13 19:10:20 +00:00
17e93b7cbe
Implement the wait statement behaviorally instead of as nets.
2003-05-19 02:50:58 +00:00
d958fd2c36
Fix truncation of signed constant in constant addition.
2003-05-04 20:04:08 +00:00
5b726e09af
Include port name in port assignment error message.
2003-04-24 05:25:55 +00:00
d18934d444
Sign extend NetMult inputs if result is signed.
2003-03-29 05:51:25 +00:00
4e182ebf67
Some better internal error messages.
2003-03-26 06:16:38 +00:00
badad63ab4
All NetObj objects have lex_string base names.
2003-03-06 00:28:41 +00:00
4c67de5ca7
Add the lex_strings string handler, and put
...
scope names and system task/function names
into this table. Also, permallocate event
names from the beginning.
2003-03-01 06:25:30 +00:00
cd572a74ce
Add the portbind warning.
2003-02-22 04:12:49 +00:00
e571dd90d8
Calculate delay statement delays using elaborated
...
expressions instead of pre-elaborated expression
trees.
Remove the eval_pexpr methods from PExpr.
2003-02-08 19:49:21 +00:00
55af069fe8
Rewrite delay statement elaboration of handle real expressions.
2003-02-07 02:49:24 +00:00
e941e7e805
Spelling fixes.
2003-01-30 16:23:07 +00:00
8f0c02c0fa
Spelling fixes.
2003-01-27 05:09:17 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
f56d763411
Move strstream to ostringstream for compatibility.
2003-01-14 21:16:18 +00:00
dedae73761
Account for local units in calculated delays.
2002-12-21 19:42:17 +00:00
b89e138404
precalculate r-values of nb assignments and task arguments.
2002-12-05 04:15:14 +00:00
807a758f7c
Do not set width if width is already OK.
2002-11-26 03:35:13 +00:00
cfd8cbf850
Port expressions for output ports are lnets, not nets.
2002-11-09 19:20:48 +00:00
3fca25181a
Evaluate nonblocking assign r-values.
2002-08-28 18:54:36 +00:00
c0046e845e
Handle special case of empty system task argument list.
2002-08-15 02:11:54 +00:00
d4eaede435
Do not elide named blocks.
2002-08-13 05:35:00 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
37331d1c1b
Add port name to pin size error message.
2002-07-31 23:55:38 +00:00
843e1f9c44
Save event matching for nodangle.
2002-07-24 16:22:59 +00:00
15becdaee4
Need driver for sure in assign feedback and other cases.
2002-07-18 02:06:37 +00:00
80c9db3c88
Careful with assign to self.
2002-07-18 00:24:22 +00:00
3f1cd14f6c
Fix scope search for events.
2002-07-03 05:34:59 +00:00
cd94019733
Remove NetTmp and add NetSubnet class.
2002-06-19 04:20:03 +00:00
53d8cdd9f8
Add support for memory words in l-value of
...
non-blocking assignments, and remove the special
NetAssignMem_ and NetAssignMemNB classes.
2002-06-05 03:44:25 +00:00
91a755d0e8
Add support for memory words in l-value of
...
blocking assignments, and remove the special
NetAssignMem class.
2002-06-04 05:38:43 +00:00
422754f36f
Support carrying the scope of named begin-end
...
blocks down to the code generator, and have
the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
c787a36af2
Accept errors in memory index expression.
2002-05-12 19:16:58 +00:00
f5d3b78653
Use else clause instead of ! to preface wait events.
2002-05-07 05:06:07 +00:00
0696e3d558
Agressively evalutate case expressions.
2002-04-24 17:40:48 +00:00
0976fd393b
Do not allow implicit wires in sensitivity lists.
2002-04-22 00:53:39 +00:00
steve