There are internal types that are unbounded arrays. Allow subtype
syntax that creates bounded versions of these arrays, and elaborate
them as vectors at port boundaries. This makes some interesting types
work out.
Also start replacing vhdlint and vhdlreal with int64_t and double,
which are reasonable values for universal_integer and universal_real
from the VHDL standard. I need these cleaned up because the ints in
particular are used for the literal expressions in array index constraints.
Rather then just relying on comparing type names all throughout
elaboration, create type description data structures and use them
during elaboration to handle proper types.
Rather then leave net types to implicit declarations, write
declarations explicitly. This will become necessary when more
interesting types are supported.
Separate elaboration from code generation in the Entity, and add
to Architectures a code generator to handle some simple cases. At
this point we have the basic structure for the VHDL compiler.
Stephen Williams