ba274936e5
vhdlpp: Added 'image attribute for time type.
2016-01-06 15:30:24 +01:00
b711f16f05
vhdlpp: 'image attribute.
2016-01-06 15:30:06 +01:00
dff1ad08b0
vhdlpp: ExpAttribute split to Exp{Obj,Type}Attribute.
2016-01-06 15:30:06 +01:00
e0b2a5b337
vhdlpp: Refactored prange_t (class ExpRange).
2016-01-06 15:30:06 +01:00
2c010d34bb
vhdlpp: Unified Expression::evaluate() method.
2016-01-06 15:30:06 +01:00
9886b8cb36
vhdlpp: Distinguish character and an array of bits during emission.
2016-01-05 13:55:22 +01:00
ef3d0e4e0d
vhdlpp: ExpString::emit distinguishes between array and string types.
2016-01-05 13:55:22 +01:00
acb4ca8e47
vhdlpp: More descriptive error message for a missing function.
2016-01-05 13:55:22 +01:00
ba3c07a59a
vhdlpp: CHARACTER type is converted to bit[7:0] instead of byte.
...
This way it is possible to have limited size strings. Previously they
were translated to unpacked array of bytes, which cannot be assigned as
it was a string.
2015-11-24 17:19:33 +01:00
925827d2c2
vhdlpp: Escape quotation marks in emitted strings.
2015-11-23 16:25:08 +01:00
0569474d17
vhdlpp: Evaluate power (**) and division remainder (REM) operators.
2015-11-23 16:25:08 +01:00
c6f934964f
vhdlpp: NOT is translated to either ~(...) or !(...) depending on the argument type.
2015-06-24 23:53:32 +02:00
b666b9c0bf
vhdlpp: Fixed a few memory leaks.
2015-06-24 23:53:32 +02:00
169228ad0f
vhdlpp: Refactored the way of handling standard VHDL library functions.
2015-06-24 23:53:31 +02:00
5a0d967682
vhdlpp: More renaming in ExpConditional.
2015-06-24 23:53:31 +02:00
49efe6573c
vhdlpp: Minor ExpConditional refactoring.
...
Merged cond_ and true_clause_ to else_clause_ list to make
code more generic.
2015-06-24 23:53:31 +02:00
ea12c0fe23
vhdlp: Renamed ExpConditional::else_t to ExpConditional::option_t.
2015-06-24 23:53:31 +02:00
d6ff1946f9
vhdlpp: Support for time expressions.
2015-06-08 18:42:52 +02:00
c8fe897446
vhdlpp: and_reduce() and or_reduce() functions.
2015-04-24 13:46:30 +02:00
a5138e238f
vhdlpp: Added missing std_logic values in ExpChar and ExpString::emit().
2015-04-23 11:57:27 +02:00
d5ffb55bfd
Corrected ambiguous copyright info.
2015-03-27 18:57:40 +01:00
afaedbd06d
vhdlpp: Corrected to_integer() & resize() functions.
...
to_integer() handles sign and resize() really applies size casting.
2015-03-27 14:53:43 +01:00
d1dc98b7f7
vhdlpp: Changed the workaround for accessing localparam arrays & records.
2015-03-07 20:47:20 +01:00
1de3fb1625
vhdlpp: "resize" function.
2015-03-06 17:58:04 +01:00
e33b8b4dde
vhdlpp: VType::get_width() uses information from Scope to determine the type width.
2015-03-06 17:58:04 +01:00
9128eb67b9
vhdlpp: Evaluates attributes if possible.
2015-03-06 17:32:25 +01:00
afbda099fb
vhdlpp: Workaround to handle constant arrays of vectors & records.
2015-03-06 17:32:25 +01:00
a42b056b24
vhdlpp: Alternative way of accessing constant arrays of vectors.
2015-03-06 17:32:25 +01:00
5884879b02
vhdlpp: to_integer() function.
2015-02-19 17:07:41 +01:00
763c6fe3c9
vhdlpp: Support for shift operators (SRL, SRR, SRA, SLA).
...
To be done: ROR & ROL.
2015-02-17 10:15:57 +01:00
cdf18de10e
vhdlpp: Make integer expressions sized during the emission step.
2015-02-05 16:20:49 +01:00
51ce9f1a60
vhdlpp: Minor correction for casting to integer.
2015-02-05 11:25:03 +01:00
25c3798248
vhdlpp: Elaborate and emit functions work with ScopeBase instead of Architecture.
2015-02-04 16:57:43 +01:00
d4dd635bf6
vhdlpp: Added ExpNew class.
2015-02-04 16:57:43 +01:00
9b3bd039bb
vhdlpp: Added ExpCast class.
2015-02-04 16:57:42 +01:00
c55a013162
vhdlpp: Support for integer() function.
...
Note: I could not find any info about the integer() function, but it is
used in the VHDL standard packages (e.g. math_real, see:
http://www.csee.umbc.edu/portal/help/VHDL/packages/mathpack.vhd )
Real numbers are rounded, this is compatible with ModelSim behavior.
2014-10-17 14:53:59 +02:00
97df6183a9
vhdlpp: Emit '-' std_logic value as 'x'.
...
Note: It is not a direct ("don't care" vs "unknown"), but I could not
find anything that suits better.
2014-10-17 14:13:06 +02:00
76aab15798
vhdlpp: Minor code cleaning.
2014-10-15 10:51:21 +02:00
1333bc54a2
vhdlpp: Support for 'left & 'right attributes.
2014-10-08 10:05:04 +02:00
7b5470c8a7
vhdlpp: Subprogram class inherits from ScopeBase.
2014-09-30 15:00:55 +02:00
94abef195a
vhdlpp: Commented out named assignment for records.
2014-09-17 16:30:44 +02:00
54696e0127
vhdlpp: Elaboration & emit support for aggregate initializer expressions in records.
2014-09-17 11:24:16 +02:00
cb03802a17
vhdlpp: Added VTypeArray::basic_type() to cope with
...
arrays based on typedefs.
2014-09-15 12:10:05 +02:00
10446df80e
vhdlpp: Invert range in ExpAggregate when necessary.
2014-08-22 16:23:22 +02:00
0a2100c87f
vhdlpp: Turn on the reg_flag for types that cannot be packed.
2014-08-22 16:22:59 +02:00
5ed60a151f
Added support for real type in vhdlpp.
2014-08-06 15:00:35 +02:00
be17bfc0e9
Spelling fixes
...
Mostly comments.
One user-visible string ("Evalutated to ") changed in the debug_eval_tree case.
2014-01-30 15:34:20 -08:00
d630e4dfe9
Elaborate VHDL entity port types/expressions.
...
We need to elaborate expressions so that function calls in
expressions (i.e. ranges) get bound to their proper scope.
This binding is in turn used to emit package scopes. This
is particularly interesting for ports of entities.
2013-06-12 14:21:35 -07:00
0fcd2d9db6
Handle rising_edge and falling_edge functions.
2013-06-12 14:21:35 -07:00
bc77a19059
Use $ivl_unsigned to implement VHDL to_unsigned function.
...
The VHDL to_unsigned function with to arguments is best handled
in the ivl elaborator, so have it generate an $ivlh_to_unsigned
function call in the vhdlpp code, and implement it in the ivl
core.
Also, implement the 'length attribute as a $bits() call for
similar reasons.
2013-06-12 14:09:08 -07:00
Maciej Suminski
Larry Doolittle
Stephen Williams